UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 DESCRIPTION Original. 1.Add order information for lead free product 2.Revised timing read/write waveform 3.Add *VIL=-3.0V for pulse width less than 10ns into DC table UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 1 Draft Date Nov. 06 2002 May. 22 2003 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 GENERAL DESCRIPTION FEATURES The UT61L1024(E) is a 1,048,576-bit high-speed CMOS static random access memory organized as 131,072 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. Fast access time : 12/15ns (max.) Low power operating : 60mA (typ.) Single 3.0V~3.6V power supply Operating temperature : Extended : -20℃~80℃ All inputs and outputs TTL compatible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package : 32-pin 300 mil skinny PDIP 32-pin 300 mil SOJ 32-pin 450mil SOP 32-pin 8mm x 20mm TSOP-1 32-pin 8mm x 13.4mm STSOP The UT61L1024(E) is designed for high-speed system applications. It is particularly suited for use in high-density high-speed system applications. The UT61L1024(E) operates from a single 3.3V power supply and all inputs and outputs are fully TTL compatible. PIN CONFIGURATION FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER Vcc Vss I/O1-I/O8 CE CE2 OE I/O DATA CIRCUIT COLUMN I/O CONTROL CIRCUIT NC 1 32 Vcc A16 2 31 A15 30 CE2 A14 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O1 13 I/O2 14 I/O3 Vss UT61L1024(E) 2048 X 512 MEMORY ARRAY 29 WE 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O8 20 I/O7 19 I/O6 15 18 I/O5 16 17 I/O4 PDIP / SOJ/SOP WE PIN DESCRIPTION SYMBOL A0 - A16 I/O1 - I/O8 CE ,CE2 A11 1 32 OE A9 2 31 A10 A8 3 30 CE A13 4 29 I/O8 DESCRIPTION Address Inputs Data Inputs/Outputs Chip enable 1,2 Inputs WE 5 28 I/O7 CE2 6 27 I/O6 A15 7 26 I/O5 Vcc 8 WE Write Enable Input NC 9 Output Enable Input A16 OE VCC VSS NC A14 Power Supply Ground No Connection UT61L1024(E) 25 I/O4 24 Vss 10 23 I/O3 11 22 I/O2 A12 12 21 I/O1 A7 13 20 A0 A6 14 19 A1 A5 15 18 A2 A4 16 17 A3 TSOP-I/STSOP UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 2 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 ABSOLUTE MAXIMUM RATINGS* PARAMETER Terminal Voltage with Respect to Vss Operating Temperature Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec) SYMBOL VTERM TA TSTG PD IOUT Tsolder RATING -0.5 to 4.6 -20 to 80 -65 to 150 1 50 260 UNIT V ℃ ℃ W mA ℃ *Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. TRUTH TABLE MODE Standby Standby Output Disable Read Write Note: CE H X L L L CE2 X L H H H OE X X H L X WE X X H H L I/O OPERATION SUPPLY CURRENT High - Z High -Z High - Z DOUT DIN ISB,ISB1 ISB,ISB1 ICC ICC ICC H = VIH, L=VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS (VCC = 3.0V∼3.6V, TA = -20℃ to 80℃) PARAMETER Power Voltage Input High Voltage Input Low Voltage Input Leakage Current SYMBOL Vcc VIH * VIL ILI ILO Output Leakage Current Output High Voltage Output Low Voltage Operating Power Supply Current VOH VOL ICC Standby Power Supply Current ISB ISB1 TEST CONDITION VSS ≦VIN ≦VCC VSS ≦VI/O ≦VCC CE = VIH or CE2 = VIL or OE = VIH or WE = VIL IOH = - 4mA IOL = 8mA Cycle time=Min, II/O = 0mA . CE = VIL , CE2 = VIH CE = VIH or CE2 = VIL CE ≧VCC-0.2V ;or CE2≦0.2V - 12 - 15 MIN. 3.0 2.0 - 0.5 -1 MAX. 3.6 VCC+0.5 0.6 1 UNIT V V V µA -1 1 µA 2.2 - 0.4 100 90 20 V V mA mA mA - 3 mA Notes: 1. Overshoot : Vcc+3.0v for pulse width less than 8ns. 2. Undershoot : Vss-3.0v for pulse width less than 8ns. 3. Overshoot and Undershoot are sampled, not 100% tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 3 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 CAPACITANCE (TA=25℃, f=1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. - MAX. 8 10 UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 3ns 1.5V CL=30pF, IOH/IOL=-4mA/8mA AC ELECTRICAL CHARACTERISTICS (VCC = 3.0V∼3.6V , TA = -20℃ to 80℃) (1) READ CYCLE PARAMETER SYMBOL Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change tRC tAA tACE1, tACE1 tOE tCLZ1*, tCLZ2* tOLZ* tCHZ1*, tCHZ2* tOHZ* tOH UT61L1024-12 UT61L1024-15 MIN. MAX. MIN. MAX. 12 15 12 15 12 15 6 7 3 4 0 0 6 7 6 7 3 3 - UNIT ns ns ns ns ns ns ns ns ns (2) WRITE CYCLE PARAMETER SYMBOL Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z tWC tAW tCW1, tCW2 tAS tWP tWR tDW tDH tOW* tWHZ* UT61L1024-12 UT61L1024-15 MIN. MAX. MIN. MAX. 12 15 10 12 10 12 0 0 9 10 0 0 7 8 0 0 3 4 7 8 UNIT ns ns ns ns ns ns ns ns ns ns *These parameters are guaranteed by device characterization, but not production tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 4 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA tOH Dout tOH Previous data valid Data Valid READ CYCLE 2 ( CE and CE2 and OE Controlled) (1,3,4,5) t RC Address tAA CE tACE CE2 OE tCHZ tOE tOHZ tCLZ tOLZ Dout t OH High-Z Data Valid High-Z Notes : 1. WE is high for read cycle. 2.Device is continuously selected OE =low, CE =low, CE2=high. 3.Address must be valid prior to or coincident with CE =low, CE2=high; otherwise tAA is the limiting parameter. 4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL=5pF. Transition is measured±500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 5 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 WRITE CYCLE 1 ( WE Controlled) (1,2,3,5,6) tW C Address tAW CE t CW CE2 t AS tW P tW R WE t W HZ Dout tOW High-Z (4) (4) tDW Din t DH Data Valid WRITE CYCLE 2 ( CE and CE2 Controlled) (1,2,5,6) tW C A ddress tA W CE tW R tA S tC W CE2 tW P WE tW H Z D out H igh-Z (4) tD W tD H D in D ata V alid UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 6 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 Notes : 1. WE , CE must be high or CE2 must be low during all address transitions. 2.A write occurs during the overlap of a low CE , high CE2, low WE . 3. During a WE controlled write cycle with OE low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CE low transition and CE2 high transition occurs simultaneously with or after WE low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. DATA RETENTION CHARACTERISTICS (TA = -20℃ to 80℃) PARAMETER SYMBOL TEST CONDITION Vcc for Data Retention VDR CE ≧VCC-0.2V or CE2 ≤ 0.2V Vcc=2V Data Retention Current IDR CE ≧VCC-0.2V or CE2 ≤ 0.2V Chip Disable to Data See Data Retention Waveforms tCDR Retention Time Recovery Time tR MIN. MAX. UNIT 2.0 3.6 V - 3 mA 0 - ms 5 - ms DATA RETENTION WAVEFORM Low Vcc Data Retention Waveform (1) ( CE controlled) VDR ≧ 2V VCC Vcc(min.) Vcc(min.) tCDR CE VIH tR CE ≧ VCC-0.2V VIH Low Vcc Data Retention Waveform (2) (CE2 controlled) VDR ≧ 2V VCC CE2 VCC(min.) VCC(min.) tCDR tR VIL CE2 ≦ 0.2V UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 7 VIL P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 PACKAGE OUTLINE DIMENSION 32-pin Skinny PDIP Package Outline Dimension UNIT SYMBOL A B c D E E1 e1 eB L £c INCH(BASE) MM(REF) 0.130 ±0.005 0.018 ±0.004 0.010 ±0.004 1.600 ±0.005 0.315 ±0.010 0.288 ±0.004 0.100 (TYP) 0.350 ±0.020 0.125 (MIN) o o 0 ∼10 3.302 ±0.127 0.457 ±0.102 0.254 ±0.102 40.640 ±0.127 8.001 ±0.254 7.315 ±0.102 2.540 (TYP) 8.890 ±0.508 3.175 (MIN) o o 0 ∼10 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 8 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 32-pin 300mil SOJ Package Outline Dimension UNIT SYMBOL A A1 A2 B D E E1 e L y INCH(BASE) MM(REF) 0.148 (MAX) 0.026 (MIN) 0.100 ±0.005 0.018 (TYP) 0.830 (MAX) 0.335 (TYP) 0.300 ±0.005 0.050 (TYP) 0.086 ±0.010 0.003 (MAX) 3.759 (MAX) 0.660 (MIN) 2.540 ±0.127 0.457 (TYP) 21.082 (MAX) 8.509 (TYP) 7.620 ±0.127 1.270 (TYP) 2.184 ±0.254 0.076 (MAX) UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 9 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 32-pin 8mm × 20mm TSOP-I Package Outline Dimension HD C L 32 b E e 1 16 17 Seating Plane "A" y D 17 A A2 16 0.254 A1 0 GAUGE PLANE SEATING PLANE 32 1 "A" DETAIL VIEW L1 UNIT SYMBOL A A1 A2 b D E e HD L1 y Θ INCH(BASE) MM(REF) 0.047 (MAX) 0.004 ±0.002 0.039 ±0.002 0.008 + 0.002 - 0.001 0.724 ±0.004 0.315 ±0.004 0.020 (TYP) 0.787 ±0.008 0.0315 ±0.004 0.003 (MAX) o o 0 ∼5 1.20 (MAX) 0.10 ±0.05 1.00 ±0.05 0.20 + 0.05 -0.03 18.40 ±0.10 8.00 ±0.10 0.50 (TYP) 20.00 ±0.20 0.80 ±0.10 0.076 (MAX) o o 0 ∼5 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 10 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 32-pin 8mm x 13.4mm STSOP Package Outline Dimension HD cL 32 16 17 b E e 1 "A" Seating Plane D 16 y 17 0.254 A2 A GAUGE PLANE A1 0 SEATING PLANE L1 "A" DATAIL VIEW 32 1 UNIT SYMBOL A A1 A2 b D E e HD L1 y Θ INCH(BASE) MM(REF) 0.047 (MAX) 0.004 ±0.002 0.039 ±0.002 0.008 ±0.001 0.465 ±0.004 0.315 ±0.004 0.020 (TYP) 0.528 ±0.008 0.0315 ±0.004 0.003 (MAX) o o 0 ∼5 1.20 (MAX) 0.10 ±0.05 1.00 ±0.05 0.200 ±0.025 11.800 ±0.100 8.000 ±0.100 0.50 (TYP) 13.40 ±0.20. 0.80 ±0.10 0.076 (MAX) o o 0 ∼5 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 11 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 32-pin 450mil SOP Package Outline Dimension UNIT SYMBOL A A1 A2 b D E E1 e L L1 S y Θ INCH(BASE) MM(REF) 0.118 (MAX) 0.004 (MIN) 0.111 (MAX) 0.016 (TYP) 0.817 (MAX) 0.445 ±0.005 0.555 ±0.012 0.050 (TYP) 0.0347 ±0.008 0.055 ±0.008 0.026 (MAX) 0.004 (MAX) o o 0 ~10 2.997 (MAX) 0.102 (MIN) 2.82 (MAX) 0.406 (TYP) 20.75 (MAX) 11.303 ±0.127 14.097 ±0.305 1.270 (TYP) 0.881 ±0.203 1.397 ±0.203 0.660 (MAX) 0.101 (MAX) o o 0 ~10 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 12 P80040 UTRON UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM Rev 1.1 ORDERING INFORMATION PART NO. UT61L1024KC-12E UT61L1024KC-15E UT61L1024JC-12E UT61L1024JC-15E UT61L1024SC-12E UT61L1024SC-15E UT61L1024LC-12E UT61L1024LC-15E UT61L1024LS-12E UT61L1024LS-15E ACCESS TIME (ns) 12 15 12 15 12 15 12 15 12 15 PACKAGE 32PIN SKINNY PDIP 32PIN SKINNY PDIP 32PIN SOJ 32PIN SOJ 32PIN SOP 32PIN SOP 32PIN TSOP-1 32PIN TSOP-1 32PIN STSOP 32PIN STSOP ORDERING INFORMATION (for lead free product) PART NO. UT61L1024KCL-12E UT61L1024KCL-15E UT61L1024JCL-12E UT61L1024JCL-15E UT61L1024SCL-12E UT61L1024SCL-15E UT61L1024LCL-12E UT61L1024LCL-15E UT61L1024LSL-12E UT61L1024LSL-15E ACCESS TIME (ns) 12 15 12 15 12 15 12 15 12 15 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 13 PACKAGE 32PIN SKINNY PDIP 32PIN SKINNY PDIP 32PIN SOJ 32PIN SOJ 32PIN SOP 32PIN SOP 32PIN TSOP-1 32PIN TSOP-1 32PIN STSOP 32PIN STSOP P80040 UTRON Rev 1.1 UT61L1024(E) 128K X 8 BIT HIGH SPEED CMOS SRAM This page is left blank intentionally. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 14 P80040