UTRON Rev. 1.1 UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM REVISION HISTORY REVISION DESCRIPTION REV. 0.9 Original. REV. 1.0 1. The symbols CE1# ,OE# & WE# are revised as CE , OE & WE . 2. Icc1 is revise as Icc. 3. Icc2 is revise as Icc1. REV. 1.1 Add order information for lead free product UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 1 DATE Mar.15. 2001 Jul. 06. 2001 May. 16. 2003 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 FEATURES GENERAL DESCRIPTION Access time : 35/55/70ns (max.) Low power consumption : Operating : 60/50/40 mA (typical) Standby : 10µA (typical) L-version 1µA (typical) LL-version Wide range power supply : 2.7V to 5.5V All inputs and outputs TTL compatible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package : 32-pin 600 mil PDIP 32-pin 450 mil SOP 32-pin 8x20mm TSOP-1 32-pin 8x13.4mm STSOP The UT62W1024 is a 1,048,576-bit low power CMOS static random access memory organized as 131,072 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62W1024 is designed for low power application. It is particularly well suited for battery back-up nonvolatile memory application. The UT62W1024 operates from a wide range of 2.7V~ 5.5V power supply and all inputs and outputs are fully TTL compatible. PIN CONFIGURATION FUNCTIONAL BLOCK DIAGRAM DECODER Vcc Vss I/O DATA CIRCUIT I/O1-I/O8 COLUMN I/O 1 32 Vcc 2 31 A15 A14 3 30 CE2 A12 4 29 WE A7 5 28 A13 A6 6 A5 7 A4 8 A3 9 A2 10 UT62W1024 A0-A16 1024 X 1024 MEMORY ARRAY NC A16 27 A8 26 A9 25 A11 24 OE 23 A10 A1 11 22 CE A0 12 21 I/O8 I/O1 13 20 I/O7 I/O2 14 19 I/O6 I/O3 15 18 I/O5 Vss 16 17 I/O4 PDIP / SOP CE CE2 OE W CONTROL CIRCUIT A11 1 32 OE A9 2 31 A10 A8 3 30 A13 4 29 CE I/O8 E PIN DESCRIPTION WE 5 28 I/O7 CE2 6 27 I/O6 A15 7 26 I/O5 Vcc 8 NC 9 UT62W1024 25 I/O4 24 Vss SYMBOL A0 - A16 I/O1 - I/O8 CE ,CE2 DESCRIPTION Address Inputs Data Inputs/Outputs Chip enable 1,2 Inputs A16 10 23 I/O3 A14 11 22 I/O2 A12 12 21 I/O1 A7 13 20 A0 WE Write Enable Input A6 14 19 A1 15 18 A2 OE VCC VSS NC Output Enable Input A5 A4 16 17 A3 Power Supply Ground No Connection TSOP-I/STSOP UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 2 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 ABSOLUTE MAXIMUM RATINGS* PARAMETER Terminal Voltage with Respect to Vss Operating Temperature Storage Temperature Power Dissipation DC Output Current Soldering Temperature (under 10 sec) SYMBOL VTERM TA TSTG PD IOUT Tsolder RATING -0.5 to +4.6 0 to +70 -65 to +150 1 50 260 UNIT V ℃ ℃ W mA ℃ *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. TRUTH TABLE MODE Standby Standby Output Disable Read Write CE2 X L H H H CE H X L L L OE X X H L X WE X X H H L I/O OPERATION SUPPLY CURRENT High - Z High -Z High - Z DOUT DIN ISB,ISB1 ISB,ISB1 ICC ICC ICC Note: H = VIH, L=VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS ( Ⅰ ) (VCC = 2.7V~3.6V, Vss=0V, TA = 0℃ to 70℃) PARAMETER SYMBOL TEST CONDITION *1 Input High Voltage VIH *2 Input Low Voltage VIL Input Leakage Current IIL VSS ≦VIN ≦VCC Output Leakage Current IOL VSS ≦VI/O≦VCC CE =VIH or CE2=VIL or Output High Voltage Output Low Voltage Average Operating Power Supply Courrent VOH VOL ICC ICC1 Standby Power Supply Current ISB ISB1 OE =VIH or WE =VIL IOH= -1mA IOL= 4mA Cycle time =Min. 100% Duty, CE =VIL, CE2 = VIH, II/O = 0mA MIN. 2.0 - 0.5 -1 -35 -55 -70 Cycle time = 1µs, 100% Duty, CE ≦0.2V,CE2≧VCC-0.2V, CL=50PF CE =VIH or CE2 = VIL CE ≧VCC-0.2V or CE2≦0.2V -L LL TYP. MAX. VCC+0.5 0.6 1 -1 - 1 µA 2.2 - 40 35 30 0.4 60 50 40 V V mA mA mA - - 5 mA - - mA - 2.5 - 0.5 1.0 100 *4 20 40 *4 10 Notes: 1. Overshoot : Vcc+2.0v for pulse width less than 10ns. 2. Undershoot : Vss-2.0v for pulse width less than 10ns. 3. Overshoot and Undershoot are sampled, not 100% tested. 4. Those parameters are for reference only under 50 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 3 UNIT V V µA P80056 µA µA UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 DC ELECTRICAL CHARACTERISTICS (Ⅱ) (VCC = 4.5V~5.5V, Vss=0V, TA = 0℃ to 70℃) PARAMETER SYMBOL TEST CONDITION *1 Input High Voltage VIH *2 Input Low Voltage VIL Input Leakage Current IIL VSS ≦VIN ≦VCC Output Leakage Current IOL VSS ≦VI/O≦VCC CE =VIH or CE2=VIL or Output High Voltage Output Low Voltage Average Operating Power Supply Courrent VOH VOL ICC ICC1 Standby Power Supply Current ISB ISB1 OE =VIH or WE =VIL IOH=-1mA IOL= 4mA Cycle time =Min. 100% Duty, CE =VIL, CE2 = VIH, CL=100PF -35 -55 -70 Cycle time = 1µs, 100% Duty, CE ≦0.2V,CE2≧VCC-0.2V, II/O = 0mA CE =VIH or CE2 = VIL CE ≧VCC-0.2V or CE2≦0.2V -L LL MIN. 2.2 - 0.5 -1 TYP. - MAX. VCC+0.5 0.8 1 UNIT V V µA -1 - 1 µA 2.4 - 60 50 -40 0.4 100 85 70 V V mA mA mA - - 5 mA - - mA - 2.5 - 0.5 1.0 100 *3 20 40 *3 10 *1. VIH(max)=Vcc+3.0v for pulse width less than 10ns. *2. VIL(min)=Vss-3.0v for pulse width less than 10ns. *3. Those parameters are for reference only under 50℃ UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 4 P80056 µA µA UTRON Rev. 1.1 UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM CAPACITANCE (TA=25℃, f=1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. - MAX. 8 10 UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0V to 3.0V 5ns 1.5V CL=100pF, IOH/IOL=-1mA/4mA(VCC=5V) CL=50pF, IOH/IOL=-1mA/2mA(VCC=3.3V) AC ELECTRICAL CHARACTERISTICS (VCC = 2.7V~5.5V, V SS=0V , TA = 0℃ to 70℃) (1) READ CYCLE PARAMETER SYMBOL UT62W1024-35 UT62W1024-55 UT62W1024-70 MIN. MAX. MIN. MAX. MIN. MAX. Read Cycle Time tRC 35 55 70 Address Access Time tAA 35 55 70 Chip Enable Access Time tACE 35 55 70 Output Enable Access Time tOE 25 30 35 Chip Enable to Output in Low-Z tCLZ* 10 10 10 Output Enable to Output in Low-Z tOLZ* 5 5 5 Chip Disable to Output in High-Z tCHZ* 25 30 35 Output Disable to Output in High-Z tOHZ* 25 30 35 Output Hold from Address Change tOH 5 5 5 - (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write-Time Output Active from End of Write Write to Output in High-Z SYMBOL UT62W1024-35 UT62W1024-55 MIN. MAX. MIN. MAX. tWC 35 55 tAW 30 50 tCW 30 50 tAS 0 0 tWP 25 40 tWR 0 0 tDW 20 25 tDH 0 0 tOW* 5 5 tWHZ* 15 20 UT62W1024-70 MIN. 70 60 60 0 45 0 30 0 5 - UNIT ns ns ns ns ns ns ns ns ns UNIT MAX. 25 *These parameters are guaranteed by device characterization, but not production tested. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 5 P80056 ns ns ns ns ns ns ns ns ns ns UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA tOH Dout tOH Previous data valid Data Valid READ CYCLE 2 ( CE and CE2 and OE Controlled) (1,3,4,5) t RC Address tAA CE tACE CE2 OE tCHZ tOE tOHZ tCLZ tOLZ Dout t OH High-Z Data Valid High-Z Notes : 1. WE is high for read cycle. 2.Device is continuously selected OE =low, CE =low, CE2=high. 3.Address must be valid prior to or coincident with CE =low, CE2=high; otherwise tAA is the limiting parameter. 4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL=5pF. Transition is measured± 500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 6 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 WRITE CYCLE 1 ( WE Controlled) (1,2,3,5,6) tW C Address tAW CE t CW CE2 t AS tW P tW R WE t W HZ Dout tOW High-Z (4) (4) tDW Din t DH Data Valid WRITE CYCLE 2 ( CE and CE2 Controlled) (1,2,5,6) tW C A ddress tA W CE tW R tA S tC W CE2 tW P WE tW H Z D out H igh-Z (4) tD W tD H D in D ata V alid UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 7 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 Notes : 1. WE , CE must be high or CE2 must be low during all address transitions. 2.A write occurs during the overlap of a low CE , high CE2, low WE . 3. During a WE controlled write cycle with OE low, tWP must be greater than tWHZ+tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CE low transition and CE2 high transition occurs simultaneously with or after WE low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ± 500mV from steady state. DATA RETENTION CHARACTERISTICS (TA = 0℃ to 70℃) PARAMETER Vcc for Data Retention Data Retention Current SYMBOL TEST CONDITION VDR CE ≧VCC-0.2V or CE2 ≤ 0.2V IDR Vcc=3V Chip Disable to Data Retention Time Recovery Time tCDR CE ≧VCC-0.2V or CE2 ≤ 0.2V See Data Retention Waveforms (below) MIN. 2.0 -L - - LL - tR TYP. - MAX. - 0 - 80 20* 20 10* - tRC* - - 2 0.5 UNIT V µA µA ns ns tRC* = Read Cycle Time *Those parameters are for reference only under 50℃ DATA RETENTION WAVEFORM Low Vcc Data Retention Waveform (1) ( CE controlled) VDR ≧ 2V VCC Vcc(min.) Vcc(min.) tCDR CE VIH tR CE ≧ VCC-0.2V VIH Low Vcc Data Retention Waveform (2) (CE2 controlled) VDR ≧ 2V VCC CE2 VCC(min.) VCC(min.) tCDR tR VIL CE2 ≦ 0.2V UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 8 VIL P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 PACKAGE OUTLINE DIMENSION 32 pin 600 mil PDIP Package Outline Dimension UNIT SYMBOL A1 A2 B B1 c D E E1 e eB L S Q1 INCH(BASE) MM(REF) 0.010 (MIN) 0.150 ± 0.005 0.018 ± 0.005 0.050 ± 0.005 0.010 ± 0.004 1.650 ± 0.005 0.600 ± 0.010 0.544 ± 0.004 0.100 (TYP) 0.640± 0.020 0.130 ± 0.010 0.075 ± 0.010 0.070 ± 0.005 0.254 (MIN) 3.810 ± 0.127 0.457± 0.127 1.270± 0.127 0.254± 0.102 41.910 ± 0.127 15.240 ± 0.254 13.818 ± 0.102 2.540 (TYP) 16.256 ± 0.508 3.302 ± 0.254 1.905 ± 0.254 1.778 ± 0.127 Note: 1. D/E1/S DIMENSION DO NOT INCLUDE MOLD FLASH. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 9 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 32 pin 450mil SOP Package Outline Dimension UNIT SYMBOL A A1 A2 b c D E E1 e L L1 S y Θ INCH(BASE) 0.118 (MAX) 0.004(MIN) 0.111(MAX) 0.016(TYP) 0.008(TYP) 0.817(MAX) 0.445 ± 0.005 0.555 ± 0.012 0.050(TYP) 0.0347 ± 0.008 0.055 ± 0.008 0.026(MAX) 0.004(MAX) o o 0 -10 MM(REF) 2.997 (MAX) 0.102(MIN) 2.82(MAX) 0.406(TYP) 0.203(TYP) 20.75(MAX) 11.303 ± 0.127 14.097 ± 0.305 1.270(TYP) 0.881 ± 0.203 1.397 ± 0.203 0.066 (MAX) 0.101(MAX) o o 0 -10 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 10 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 32 pin TSOP-I Package Outline Dimension UNIT SYMBOL A A1 A2 b c D E e HD L L1 y Θ INCH(BASE) MM(REF) 0.047 (MAX) 0.004 ± 0.002 0.039 ± 0.002 0.008 + 0.002 - 0.001 0.005 (TYP) 0.724 ± 0.004 0.315 ± 0.004 0.020 (TYP) 0.787 ± 0.008 0.0197 ± 0.004 0.0315 ± 0.004 0.003 (MAX) o o 0 ∼5 1.20 (MAX) 0.10 ± 0.05 1.00 ± 0.05 0.20 + 0.05 -0.03 0.127 (TYP) 18.40 ± 0.10 8.00 ± 0.10 0.50 (TYP) 20.00 ± 0.20 0.50 ± 0.10 0.08 ± 0.10 0.076 (MAX) o o 0 ∼5 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 11 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 32 pin 8mm x 13.4mm STSOP Package Outline Dimension HD cL 12° (2x) 32 16 17 12° (2x) b E e 1 "A" Seating Plane D y 12° (2X) 16 17 0.254 A2 c A GAUGE PLANE A1 0 SEATING PLANE L 12° (2X) L1 "A" DATAIL VIEW 1 32 UNIT SYMBOL A A1 A2 b c D E e HD L L1 y Θ INCH(BASE) MM(REF) 0.049 (MAX) 1.25 (MAX) ± 0.005 0.002 0.130 ± 0.05 0.039 ± 0.002 1.00 ± 0.05 0.008 ± 0.01 0.20± 0.025 0.005 (TYP) 0.127 (TYP) 0.465 ± 0.004 11.80 ± 0.10 0.315 ± 0.004 8.00 ± 0.10 0.020 (TYP) 0.50 (TYP) 0.528± 0.008 13.40 ± 0.20. 0.0197 ± 0.004 0.50 ± 0.10 0.0315 ± 0.004 0.8 ± 0.10 0.003 (MAX) 0.076 (MAX) o o o o 0 ∼5 0 ∼5 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 12 P80056 UTRON UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM Rev. 1.1 ORDERING INFORMATION PART NO. UT62W1024PC-35L UT62W1024PC-35LL UT62W1024SC-35L UT62W1024SC-35LL UT62W1024LC-35L UT62W1024LC-35LL UT62W1024LS-35L UT62W1024LS-35LL UT62W1024PC-55L UT62W1024PC-55LL UT62W1024SC-55L UT62W1024SC-55LL UT62W1024LC-55L UT62W1024LC-55LL UT62W1024LS-55L UT62W1024LS-55LL UT62W1024PC-70L UT62W1024PC-70LL UT62W1024SC-70L UT62W1024SC-70LL UT62W1024LC-70L UT62W1024LC-70LL UT62W1024LS-70L UT62W1024LS-70LL ACCESS TIME (ns) 35 35 35 35 35 35 35 35 55 55 55 55 55 55 55 55 70 70 70 70 70 70 70 70 STANDBY CURRENT (µA) 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 13 PACKAGE 32 PIN PDIP 32 PIN PDIP 32 PIN SOP 32 PIN SOP 32 PIN TSOP-I 32 PIN TSOP-I 32 PIN STSOP 32 PIN STSOP 32 PIN PDIP 32 PIN PDIP 32 PIN SOP 32 PIN SOP 32 PIN TSOP-I 32 PIN TSOP-I 32 PIN STSOP 32 PIN STSOP 32 PIN PDIP 32 PIN PDIP 32 PIN SOP 32 PIN SOP 32 PIN TSOP-I 32 PIN TSOP-I 32 PIN STSOP 32 PIN STSOP P80056 UTRON Rev. 1.1 UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM ORDERING INFORMATION (for lead free product) PART NO. UT62W1024PCL-35L UT62W1024PCL-35LL UT62W1024SCL-35L UT62W1024SCL-35LL UT62W1024LCL-35L UT62W1024LCL-35LL UT62W1024LSL-35L UT62W1024LSL-35LL UT62W1024PCL-55L UT62W1024PCL-55LL UT62W1024SCL-55L UT62W1024SCL-55LL UT62W1024LCL-55L UT62W1024LCL-55LL UT62W1024LSL-55L UT62W1024LSL-55LL UT62W1024PCL-70L UT62W1024PCL-70LL UT62W1024SCL-70L UT62W1024SCL-70LL UT62W1024LCL-70L UT62W1024LCL-70LL UT62W1024LSL-70L UT62W1024LSL-70LL ACCESS TIME (ns) 35 35 35 35 35 35 35 35 55 55 55 55 55 55 55 55 70 70 70 70 70 70 70 70 STANDBY CURRENT (µA) 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 500 50 UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 14 PACKAGE 32 PIN PDIP 32 PIN PDIP 32 PIN SOP 32 PIN SOP 32 PIN TSOP-I 32 PIN TSOP-I 32 PIN STSOP 32 PIN STSOP 32 PIN PDIP 32 PIN PDIP 32 PIN SOP 32 PIN SOP 32 PIN TSOP-I 32 PIN TSOP-I 32 PIN STSOP 32 PIN STSOP 32 PIN PDIP 32 PIN PDIP 32 PIN SOP 32 PIN SOP 32 PIN TSOP-I 32 PIN TSOP-I 32 PIN STSOP 32 PIN STSOP P80056 UTRON Rev. 1.1 UT62W1024 128K X 8 BIT WIDE RANGE LOW POWER CMOS SRAM THIS PAGE IS LEFT BLANK INTENTIONALLY. UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919 15 P80056