Am7945 Subscriber Line Interface Circuit DISTINCTIVE CHARACTERISTICS ■ Programmable constant-current feed ■ On-chip Thermal Management (TMG) feature ■ Current gain = 200 ■ Programmable loop-detect threshold ■ Two-wire impedance set by single external impedance ■ Low power Standby state ■ On-hook transmission ■ Ground-key detector ■ On-chip ring relay driver and relay snubber circuit ■ Tip Open state for ground-start lines ■ –19 V to –56.5 V battery operation ■ Ideal for low-cost PABX and key telephone systems BLOCK DIAGRAM TMG Ring Relay Driver A(TIP) RINGOUT C1 C2 Input Decoder and Control HPA Two-Wire Interface Ground-Key Detector C3 E0 E1 DET HPB RSN Signal Transmission B(RING) VTX Off-Hook Detector RD Power-Feed Controller DA DB RDC CAS Ring-Trip Detector VBAT BGND VCC VEE AGND/DGND Publication# 080138 Rev: D Amendment: /0 Issue Date: October 1999 ORDERING INFORMATION Standard Products Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am7945 J C TEMPERATURE RANGE C = Commercial (0°C to 70°C)* PACKAGE TYPE J = 32-pin Plastic Leaded Chip Carrier (PL 032) DEVICE NUMBER/DESCRIPTION Am7945 Subscriber Line Interface Circuit Valid Combinations Am7945 JC Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local Legerity sales office to confirm availability of specific valid combinations and to check on newly released combinations, and to obtain additional data on Legerity’s standard military–grade products. Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. 2 Am7945 Data Sheet CONNECTION DIAGRAM Top View NC VCC NC BGND B(RING) A(TIP) DB 32-Pin PLCC 4 3 2 1 32 31 30 DA NC 7 27 RD TMG 8 26 HPB VBAT 9 25 NC C3 10 24 HPA E1 11 23 VTX C2 12 22 VEE DET 13 21 RSN 14 15 16 17 18 19 20 AGND/DGND 28 RDC 6 NC RINGOUT CAS TP E0 29 NC 5 C1 TP Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate. 3. NC = No Connect SLIC Products 3 PIN DESCRIPTIONS Pin Names Type Description AGND/DGND Gnd Analog and digital ground A(TIP) Output Output of A(TIP) power amplifier BGND Gnd Battery (power) ground B(RING) Output Output of B(RING) power amplifier C3–C1 Input Decoder. TTL compatible. C3 is MSB and C1 is LSB. CAS Capacitor Anti-saturation pin for capacitor to filter reference voltage when operating in anti-saturation region. DA Input Ring-Trip Negative. Negative input to ring-trip comparator. DB Input Ring-Trip Positive. Positive input to ring-trip comparator. DET Output Switchhook Detector. When enabled, a logic Low indicates the selected detector is tripped. The detect condition is selected by the logic inputs (C3–C1, E0, E1). The output is opencollector with a built-in 15 kΩ pull-up resistor. E0 Input Ground-Key Enable. A logic High enables DET. A logic Low disables DET (PLCC only). E1 Input Ground-Key Enable. E1 = Low connects the ground-key or ring-trip detector to DET. E1 = High connects the off-hook or ring-trip detector to DET (PLCC only). HPA Capacitor High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor. HPB Capacitor High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor. RD Resistor Detect Resistor. Threshold modification and filter point for the off-hook detector. RDC Resistor DC Feed Resistor. Connection point for the DC feed current programming network. The other end of the network connects to the receiver summing node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. RINGOUT Output Ring Relay Driver. Open-collector driver with emitter internally connected to BGND. RSN Input Receive Summing Node. The metallic current (both AC and DC) between A(TIP) and B(RING) is equal to 200 times the current into this pin. Networks that program receive gain, two-wire impedance, and feed resistance all connect to this node. TMG — Thermal Management. Connect an external resistor between this pin and the VBAT pin to reduce on-chip power dissipation in the normal polarity, Active state only. See Table 2. TP Thermal Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. VBAT Battery Battery supply VCC Power +5 V power supply VEE Power –5 V power supply VTX Output Transmit Audio. This output is a unity gain version of the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. 4 Am7945 Data Sheet ABSOLUTE MAXIMUM RATINGS OPERATING RANGES Storage temperature . . . . . . . . . . . . –55°C to +150°C Commercial (C) Devices With respect to AGND/DGND: Ambient temperature . . . . . . . . . . . . . . 0°C to +70°C* VCC. . . . . . . . . . . . . . . . . . . . . . . . . . .–0.4 V to +7.0 V VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .4.75 V to 5.25 V VEE . . . . . . . . . . . . . . . . . . . . . . . . . . .+0.4 V to –7.0 V VEE . . . . . . . . . . . . . . . . . . . . . . . . .–4.75 V to –5.25 V VBAT VBAT . . . . . . . . . . . . . . . . . . . . . . . . . –19 V to –56.5 V Continuous . . . . . . . . . . . . . . . . . . +0.4 V to –70 V 10 ms . . . . . . . . . . . . . . . . . . . . . . +0.4 V to –75 V AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V BGND. . . . . . . . . . . . . . . . . . . . . . . . . . . .+3 V to –3 V BGND with respect to AGND/DGND . . . . . . . . . . . –100 mV to +100 mV A(TIP) or B(RING) with respect to BGND: Load resistance on VTX to GND . . . . . . . . 10 kΩ min Continuous . . . . . . . . . . . . . . . . . . . .–70 V to +1 V 10 ms (f = 0.1 Hz) . . . . . . . . . . . . . . . –70 V to +5 V 1 ms (f = 0.1 Hz) . . . . . . . . . . . . . . . . –80 V to +8 V 10 µs (f = 0.1 Hz) . . . . . . . . . . . . .–100 V to +12 V Current from A(TIP) or B(RING). . . . . . . . . . ±150 mA Current from TMG . . . . . . . . . . . . . . . . . . . . . 100 mA The Operating Ranges define those limits over which the functionality of the device is guaranteed by production testing. * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. Voltage on RINGOUT: During transient . . . . . . . . . . . . . . BGND to +10 V During steady state . . . . . . . . . . . . . BGND to +7 V Current through relay drivers . . . . . . . . . . . . . . 60 mA DA and DB inputs Voltage on ring-trip inputs . . . . . . . . . . .VBAT to 0 V Current into ring-trip inputs . . . . . . . . . . . . ±10 mA C3–C1, E0, E1 to AGND/DGND . . . . . . . . . –0.4 V to VCC + 0.4 V Maximum power dissipation, TA = 85°C No heat sink (See note): In 32-pin PLCC package. . . . . . . . . . . . . . . . 1.4 W Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . θJA In 32-pin PLCC package. . . . . . . . . . . .43°C/W typ Note: Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165°C. The device should never be exposed to this temperature. Operation above 145°C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. SLIC Products 5 ELECTRICAL CHARACTERISTICS The Am7945 device is tested under the following conditions unless otherwise noted: BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 900 Ω. The device is not tested in Polarity Reversal state. Description Test Conditions (See Note 1) Min Analog output (VTX) impedance Typ 0°C to +70°C –40°C to +85°C Analog (RSN) input impedance 300 Hz to 3.4 kHz –37 –40 1 Longitudinal impedance at A or B Unit Note Ω 3 Analog output (VTX) offset Overload level Max +37 +40 mV 20 Ω 35 Ω +2.5 4 4 4-wire and 2-wire, Active state –2.5 Vpk 2a On hook, RLAC = 900 Ω, Active or OHT state 0.95 Vrms 2b 26 dB 4, 8 Transmission Performance 2-wire return loss (See Test Circuit D) 200 to 3.4 kHz Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C); RL = 740 Ω at BAT = 48 V Longitudinal to metallic L-T, L-4 normal polarity 200 Hz to 1 kHz 1 kHz to 3.4 kHz 0°C to +70°C –40°C to +85°C 52 50 0°C to +70°C –40°C to +85°C 52 50 Longitudinal signal generation 4-L 300 Hz to 800 Hz, normal polarity 40 Longitudinal current per pin Active state and OHT state 20 4 dB 4 27 mArms Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) BAT = –48 V, RL = 900 Ω Gain accuracy 0 dBm, 1 kHz 0°C to +70°C –40°C to +85°C –0.15 –0.20 +0.15 +0.20 4 4 Gain accuracy, OHT state –10 dBm, On hook, RLAC = 900 Ω –1.0 +1.0 Variation with frequency 300 to 3.4 kHz, relative to 1 kHz 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 +7 dBm to –55 dBm, reference 0 dBm 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 4 4 3 4 Gain tracking dB 4 Balance Return Signal (4- to 4-Wire, See Test Circuit B) BAT = –48 V, RL = 900 Ω Gain accuracy 0 dBm, 1 kHz 0°C to +70°C –40°C to +85°C –0.15 –0.20 +0.15 +0.20 Variation with frequency 300 to 3.4 kHz, relative to 1 kHz 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 +3 dBm to –55 dBm, reference 0 dBm 0°C to +70°C –40°C to +85°C –0.10 –0.15 +0.10 +0.15 Gain tracking Group delay f = 1 kHz 4 dB 3, 4 4 µs Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) BAT = –48 V, RL = 900 Ω Harmonic distortion 300 Hz to 3.4 kHz 6 2-wire level = 0 dBm 2-wire level = +7 dBm Am7945 Data Sheet –64 –55 –50 –40 3 4 dB 4, 8 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note dBrnc 4 Idle Channel Noise (2-Wire and 4-Wire) C-message weighted Psophometric weighted 2-wire, 0°C to +70°C –40°C to +85°C +7 +7 +10 +12 4-wire, 0°C to +70°C –40°C to +85°C +7 +7 +10 +12 2-wire, 0°C to +70°C –40°C to +85°C –83 –83 –78 0°C to +70°C –40°C to +85°C 4-wire, 4 dBmp –83 –83 –75 4 Line Characteristics, Active State (See Figure 1) Short loops, Active state BAT = –48 V, RLDC = 600 Ω 24.7 Long loops, Active state BAT = –48 V, RLDC = 1.9 kΩ 17.5 OHT state BAT = –48 V, RLDC = 600 Ω 15.5 Standby state V BAT – 3 V I L = -----------------------------R L + 1800 0.7IL IL 15.0 17.4 TA = 25°C 1.3IL Tip Open state, RL = 0 Ω 100 Disconnect state, RL = 0 Ω 100 µA Tip Open state, Bwire to GND 21 30 44 Tip Open state, Bwire = BAT + 6 V 20 30 45 100 130 ILLIM (ITIP + IRING) Tip and ring shorted to GND Ground-start signaling (tip voltage) Active state, RTIP to –48 V = 7.0 kΩ RRING to GND = 100 kΩ –7.5 Active and OHT state, BAT = –48 V 40.5 Open circuit voltage 20.5 mA RL = 600 Ω, BAT = –48 V TA = 70°C Loop current 29.3 mA –5.0 V 42.0 Power Dissipation, BAT = –48 V On hook, Open Circuit state 25 100 On hook, OHT state 120 210 160 195 230 280 35 100 On hook, Active state RTMG = Open RTMG = 1700 Ω On hook, Standby state Off hook, OHT state RL = 300 Ω, RTMG = ∞, BAT = –48 V 735 1100 Off hook, Active state RL = 300 Ω, RTMG = ∞, BAT = –48 V RL = 300 Ω, RTMG = ∞ 1.25 0.57 1.60 0.85 Off hook, Standby state RL = 600 Ω, TA = 25°C 0.68 1.0 SLIC Products mW W 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit Note Supply Currents, BAT = –48 V VCC, On-hook supply current Open Circuit state OHT state Standby state Active state 1.7 4.9 2.2 6.3 2.5 7.5 3.0 8.5 VEE, On-hook supply current Open Circuit state OHT state Standby state Active state 0.7 2.0 0.77 2.1 2.0 3.5 2.0 5.0 VBAT, On-hook supply current Open Circuit state OHT state Standby state Active state 0.18 1.9 0.45 4.2 1.0 4.7 1.5 5.7 mA Power-Supply Rejection Ratio (VRIPPLE = 50 mVrms), Active Normal State VCC 50 Hz to 3.4 kHz 30 40 VEE 50 Hz to 3.4 kHz 28 35 VBAT 50 Hz to 3.4 kHz 28 50 Effective internal resistance CAS pin to GND 85 170 RFI rejection 100 kHz to 30 MHz (See Figure E) dB 255 kΩ 1.0 mVrms +12 % 10.0 kΩ 5 4 Off-Hook Detector Current threshold 375 I DET = --------RD –12 Ground-Key Detector Thresholds, Active State, BAT = –48 V Ground-key resistance threshold B(RING) to GND Ground-key current threshold B(RING) to GND 2.0 5.0 9 mA –0.5 –0.05 µA –50 0 Ring-Trip Detector Input Bias current Offset voltage Source resistance = 2 MΩ +50 mV Logic Inputs (C3–C1, E0, E1) Input High voltage 2.0 V Input Low voltage Input High current 0.8 All inputs except C3 and E1 –75 40 Input C3 –75 200 Input E1 –75 45 Input Low current –0.4 µA mA Logic Output (DET) Output Low voltage IOUT = 0.8 mA Output High voltage IOUT = –0.1 mA 8 Am7945 Data Sheet 0.4 V 2.4 6 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ Max Unit +0.25 +0.4 V 100 µA Note Relay Driver Output (RINGOUT) On voltage 35 mA sink Off leakage VOH = +5 V Zener breakover 100 µA Zener On voltage 30 mA 6 7.2 V 10 RELAY DRIVER SCHEMATIC RINGOUT BGND SWITCHING CHARACTERISTICS (32-Pin PLCC only) Symbol Parameter E1 Low to DET High (E0 = 1) tgkde Temperature Ranges Test Conditions E1 Low to DET Low (E0 = 1) Ground-Key Detect state RL open, RG connected (See Figure H) Min Typ Max 0°C to +70°C –40°C to +85°C 3.8 4.0 0°C to +70°C –40°C to +85°C 1.1 1.6 0°C to +70°C –40°C to +85°C 1.1 1.6 tgkdd E0 High to DET Low (E1 = 0) tgkd0 E0 Low to DET High (E1 = 0) 0°C to +70°C –40°C to +85°C 3.8 4.0 E1 High to DET Low (E0 = 1) 0°C to +70°C –40°C to +85°C 1.2 1.7 0°C to +70°C –40°C to +85°C 3.8 4.0 0°C to +70°C –40°C to +85°C 1.1 1.6 0°C to +70°C –40°C to +85°C 3.8 4.0 tshde E1 High to DET High (E0 = 1) tshdd E0 High to DET Low (E1 = 1) tshd0 E0 Low to DET High (E1 = 1) Switchhook Detect state RL = 600 Ω, RG open (See Figure G) SLIC Products Unit Note µs 4 9 SWITCHING WAVEFORMS E1 to DET E1 DET tgkde tshde tshde tgkde E0 to DET E1 E0 DET tshdd Note: All delays measured at 1.4 V level. tshd0 tgkdd tgkd0 Notes: 1. Unless otherwise noted, test conditions are VCC = +5 V, VEE = –5 V, CHP = 0.33 µF, RDC1 = RDC2 = 9.26 kΩ, CDC = 0.33 µF, RD = 35.4 kΩ, CCAS = 0.33 µF, no fuse resistors, BAT = –48 V, RL = 900 Ω, and RTMG = 1700 Ω. 2. a. Overload level is defined when THD = 1%. b. Overload level is defined when THD = 1.5% 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance matches the programmed impedance. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. This parameter is tested at 1 kHz with a termination impedance of 900 Ω and an RL of 600 Ω in production. Performance at other frequencies is guaranteed by characterization. 6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only. 7. Assumes the following ZT networks: (900 Ω): (600 Ω): RSN VTX 90 kΩ RSN VTX 90 kΩ 60 kΩ 60 kΩ 150 pF 150 pF 8. Group delay can be considerably reduced by using a ZT network such as that shown in Note 7 above. The network reduces the group delay to less than 2 µs. The effect of group delay on the linecard performance may be compensated for by using the QSLAC™ or DSLAC™ device. 10 Am7945 Data Sheet Table 1. SLIC Decoding DET Output State C3 C2 C1 2-Wire Status E1 = 1 E1 = 0 0 0 0 0 Open Circuit Ring trip Ring trip 1 0 0 1 Ringing Ring trip Ring trip 2 0 1 0 Active Loop detector Ground key 3 0 1 1 On-Hook TX (OHT) Loop detector Ground key 4 1 0 0 Tip Open Loop detector Ground key 5 1 0 1 Standby Loop detector Ground key 6 1 1 0 Reserved 7 1 1 1 Reserved Note: E0 High enables DET. Table 2. User-Programmable Components Z T = 200 ( Z 2WIN – 2R F ) ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZL 200 • Z T - • -----------------------------------------------------Z RX = ---------G 42L Z T + 200 ( Z L + 2 • R F ) ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the desired receive gain. 500 R DC1 + R DC2 = ------------I LOOP RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ILOOP is the desired loop current in the constant-current region. R DC1 + R DC2 C DC = 1.5 ms • ------------------------------R DC1 • R DC2 375 R D = --------- , IT RD and CD form the network connected from RD to –5 V and IT is the threshold current between on hook and off hook. 0.5 ms C D = ----------------RD 500 V • 0.66 I OHT = -------------------------------R DC1 + R DC2 OHT loop current (constant-current region). 1 C CAS = ---------------------------5 3.4 • 10 πf c CCAS is the regulator filter capacitor and fc is the desired filter cutoff frequency. Thermal Management Equations (Normal Active and Tip Open States) RTMG is connected from TMG to VBAT and is used to limit power dissipation within the SLIC in Normal Active and Tip Open states only. V BAT – 6 V R TMG ≥ ------------------------------ILOOP 2 V BAT – 6 V – ( I L • R L ) P RTMG = ------------------------------------------------------------R TMG Power dissipated in the TMG resistor, RTMG, during Active and Tip Open states. 2 P SLIC = V BAT • I L – ( P RTMG – R L ( I L ) ) + 0.12 W Power dissipated in the SLIC while in Active and Tip Open states. SLIC Products 11 DC FEED CHARACTERISTICS VBAT = –51.3 V 3 4 2 VBAT = –47.3 V 1 Active state OHT state RDC1 + RDC2 = RDC = 18.52 kΩ Notes: 1. Constant-current region: Active state: 500 I L = ---------R DC OHT state: 2 500 I L = --- • ---------3 R DC 2. Anti-sat (battery tracking) turn-on: V AB = 1.017 V BAT – 10.7 3. Open circuit voltage: V AB = 1.017 V BAT – 6.3 4. Anti-sat (battery tracking) region: R DC V AB = 1.017 V BAT – 6.3 – I L --------120 a. VA–VB (VAB) Voltage vs. Loop Current (Typical) 12 Am7945 Data Sheet DC FEED CHARACTERISTICS (continued) 30 Loop Current (mA) 25 20 15 10 5 0 0 1000 2000 3000 4000 5000 6000 Load Resistance (Ω) RDC1 + RDC2 = RDC = 18.52 kΩ VBAT = –47.3 V b. Loop Current vs. Load Resistance (Typical) A RSN a RL IL RDC1 SLIC b RDC2 CDC RDC B Feed current programmed by RDC1 and RDC2 c. Feed Programming Figure 1. DC Feed Characteristics SLIC Products 13 TEST CIRCUITS A(TIP) A(TIP) VTX VTX RL SLIC 2 SLIC AGND VL RT VAB RL RL VAB RT AGND RRX 2 RRX RSN B(RING) RSN B(RING) IL2-4 = 20 log (VTX / VAB) VRX IL4-2 = 20 log (VAB / VRX) BRS = 20 log (VTX / VRX) B. Four- to Two-Wire Insertion Loss and Balance Return Signal A. Two- to Four-Wire Insertion Loss ZD 1 ωC << RL A(TIP) A(TIP) RL S1 VTX VTX 2 R SLIC C AGND VL VL S2 RL VM R RRX RSN 2 B(RING) S2 Open, S1 Closed L-T Long. Bal. = 20 log (VAB / VL) L-4 Long. Bal. = 20 log (VTX / VL) RT1 AGND VS RT VAB SLIC CT1 RT2 ZIN RSN B(RING) VRX Note: ZD is the desired impedance (e.g., the characteristic impedance of the line). RL = –20 log (2 VM / VS) S2 Closed, S1 Open 4-L Long. Sig. Gen. = 20 log (VL / VRX) D. Two-Wire Return Loss Test Circuit C. Longitudinal Balance 14 RRX Am7945 Data Sheet TEST CIRCUITS (continued) C1 L1 RF1 A(TIP) HF GEN 50 Ω 200 Ω 50 Ω 200 Ω 50 Ω L2 C2 RF2 CAX 33 nF CBX 33 nF B(RING) VTX SLIC under test 1.5 Vrms 80% Amplitude Modulated 100 kHz to 30 MHz E. RFI Test Circuit VCC 6.2 kΩ A(TIP) A(TIP) DET 15 pF RL = 600 Ω B(RING) RG B(RING) 2 kΩ at VBAT = –48 V E1 F. Loop-Detector Switching G. Ground-Key Switching SLIC Products 15 TEST CIRCUITS (continued) +5 V –5 V DA VCC VEE RD DB RD VTX 2.2 nF VTX A(TIP) A(TIP) RT HPA CHP HPB B(RING) B(RING) RRX VRX RSN RDC1 2.2 nF RDC2 RDC CDC RINGOUT AGND/ DGND BGND BAT VBAT D6 E1 C3 C2 C1 BATTERY GROUND DET TMG ANALOG GROUND CAS RTMG 1700 Ω CCAS H. Am7945 Test Circuit 16 Am7945 Data Sheet DIGITAL GROUND PHYSICAL DIMENSIONS PL032 .447 .453 .485 .495 .009 .015 .585 .595 .042 .056 .125 .140 Pin 1 I.D. .080 .095 .547 .553 SEATING PLANE .400 REF. .490 .530 .013 .021 .050 REF. .026 .032 TOP VIEW SIDE VIEW 16-038FPO-5 PL 032 DA79 6-28-94 ae REVISION SUMMARY Revision A to B • Minor changes were made to the data sheet style and format to conform to Legerity standards. Revision B to Revision C • In the Pin Description table, inserted/changed TP pin description to: “Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation.” Revision C to Revision D • Deleted information on the Ceramic DIP and Plastic DIP packages. • The PL032 package was added to the new Physical Dimensions section. • Updated the Pin Description table to correct inconsistencies. SLIC Products 17 Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system cost of our customers’ products. By combining process, design, systems architecture, and a complete set of software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places Legerity in a class by itself. The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity’s Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Legerity’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity’s product could create a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice. © 1999 Legerity, Inc. All rights reserved. Trademarks Legerity, the Legerity logo and combinations thereof, DSLAC and QSLAC are trademarks of Legerity, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. P.O. Box 18200 Austin, Texas 78760-8200 Telephone: (512) 228-5400 Fax: (512) 228-5510 North America Toll Free: (800) 432-4009 To contact the Legerity Sales Office nearest you, or to download or order product literature, visit our website at www.legerity.com. To order literature in North America, call: (800) 572-4859 or email: [email protected] To order literature in Europe or Asia, call: 44-0-1179-341607 or email: Europe — [email protected] Asia — [email protected]