2 Micron CMOS Process Family Features • Double Poly / Double Metal • 4 µm Poly and Metal 1 Pitch • 320 ps Delay per stage (Ring Osc.) Process parameters Process Parameters • 5.5 Volts Maximum Operating Voltage 2µm • 2.7~3.6 Volts Low Voltage Option Units • Shrinkable to Mitel 1.5µm Process (5 volts & 3volts) Metal I pitch (width / space) 2/2 µm • ProToDuctionTM Option for low cost prototypes Metal II pitch (width / space) 2.6 / 2.4 µm • 150mm Wafers Poly pitch (width / space) 2/2 µm Description Contact 2x2 µm Via 2.4 x 2.4 µm Gate geometry 2 µm P-well junction depth 4 µm N+ junction depth 0.20 µm P+ junction depth 0.28 µm The 2µm P-Well process provides flexibility, speed and packing density needed in mixed signal designs. The aggressive design rules make it comparable to most 1.5µm processes. Also, the MOSFET transistors are designed with very shallow sourcedrain junctions and a thin gate oxide to improve speed. A low voltage option is available for 3 volts applications. It offers low and matched threshold voltages for improved dynamic range needed in mixed analog/digital applications. Gate oxide thickness 325 Å Inter poly oxide thick. 500 Å MOSFET Electrical parameters Electrical Parameters 2 MICRON - 5 volts N Channel min. typ. Vt (10x2µm) 0.55 Ids (10x2µm) 0.70 max. 0.85 2 MICRON - 3 volts P Channel min. typ. 0.55 160 0.70 max. 0.85 N Channel min. typ. 0.35 70 0.50 max. 0.65 P Channel min. typ. 0.35 175 0.50 80 Units Conditions V saturation max. 0.65 µA/µm Vds=Vgs=5volts Gain β (10x2µm) 325 120 325 120 µA/V Body Factor (50x50µm) 0.40 0.40 0.35 0.35 Ðv 13 V Ids=100nA mV/dec. Vds=0.1v µA/µm Vds=5.5v; Vgs=2.7v 17 V Ids = 14µA 1.7 µm L drawn = 2µm Bvdss 10 12 Subthreshold Slope 100 Substrate Current 0.25 Field Threshold 10 L Effective www.dalsasemi.com 18 1.8 10 13 10 12 10 100 0.34 0.25 10 17 1.7 10 0.34 18 1.8 For More Information: DALSA Semiconductor Sales 18 Boulevard de l’Aéroport Bromont, Québec, Canada J2L 1S7 10 Tel : Fax email: 2 (450) 534-2321 ext. 1448 (800) 718-9701 (450) 534-3201 [email protected] 2 Micron CMOS Process Family (cont’d) Capacitances (fF/µm2) Resistances (¾ /sq.) 2 µm 5 volts & 3 volts 2 µm 5 volts & 3 volts min. typ. Pwell min. Temp. coef. (Ω/sq/o C) max. 13000 3000 3600 4200 32 N+ 35 45 55 .06 P+ 80 100 120 .15 Poly gate 15 20 25 .02 Poly capacitor 75 100 125 .06 0.038 Metal II 0.038 Inter-poly .62 .73 .84 Gate oxide 0.99 1.06 1.15 N+ Junction .195 P+ Junction .138 Bipolar gain1 2 µm 5 volts min. FIG 1: I-V Characteristics for a 50x2µm N-MOSFET (2µm 5 volts process) 8 max. 300 condition : Vce = 5 volts FIG 2: I-V Characteristics for a 50x2µm P-MOSFET (2µm 5 volts process) -3.5 Vgs = 5 volts Vgs = -5 volts 7 -3.0 6 -2.5 Vgs = 4 volts Vgs = -4 volts 5 Ids (mA) 4 Vgs = 3 volts 3 -2.0 -1.5 Vgs = -3 volts -1.0 2 Vgs = 2 volts Vgs = -2 volts -0.5 1 0 0 1 2 3 4 0 5 0 -1 -2 Vds (volts) FIG 3: Subthreshold Characteristics at Vds=0.1 volts for a 50x2µm N-MOSFET (2µm 5 volts Process) -4 -5 FIG 4: Subthreshold Characteristics at Vds=-0.1 volts for a 50x2µm P-MOSFET (2µm 5 volts Process) 10-04 180 10-03 10-04 -60 10-05 150 10-05 10-06 10-07 60 10-10 Ids (A) 90 10-09 Ids (µA) 10-08 -50 10-06 120 10-07 -40 10-08 -30 10-09 10-10 -20 10-11 10-11 30 10-12 10-13 -3 Vds (volts) 0 0.5 1.0 1.5 0 2.0 -10 10-12 10-13 0 0 Vgs (volts) Note: These values are for guidance only. Many of them can be adjusted to suit customer requirements. For full process specifications contact a Dalsa Semiconductor sales office or representative. -0.5 -1.0 Vgs (volts) -1.5 -2.0 Ids (µA) Ids (mA) typ. NPN vertical 1Test Ids (A) max. 140 Pfield in Pwell Metal I typ.