ETC SRDA05

SRDA05−4R2
Low Capacitance Surface
Mount TVS for High−Speed
Data Interfaces
The SRDA05−4 transient voltage suppressor is designed to protect
equipment attached to high speed communication lines from ESD,
EFT, and lightning.
Features:
SO−8 LOW CAPACITANCE
VOLTAGE SUPPRESSOR
500 WATTS PEAK POWER
6 VOLTS
• SO−8 Package
• Peak Power − 500 Watts 8 x 20 S
• ESD Rating:
•
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IEC 61000−4−2 (ESD) 15 kV (air) 8 kV (contact)
IEC 61000−4−4 (EFT) 40 A (5/50 ns)
IEC 61000−4−5 (lightning) 23 (8/20 s)
UL Flammability Rating of 94V−0
PIN CONFIGURATION
AND SCHEMATIC
Typical Applications:
• High Speed Communication Line Protection
I/O 1 1
MAXIMUM RATINGS
Rating
Peak Power Dissipation
8 x 20 S @ TA = 25°C (Note 1)
Junction and Storage
Temperature Range
Lead Solder Temperature −
Maximum 10 Seconds Duration
Symbol
Value
Unit
Ppk
500
W
TJ, Tstg
−55 to
+150
°C
TL
260
°C
8 REF 2
REF 1 2
7 I/O 4
REF 1 3
6 I/O 3
I/O 2 4
5 REF 2
8
1
SO−8
CASE 751
PLASTIC
1. Non−repetitive current pulse 8 x 20 S exponential decay waveform
MARKING DIAGRAM
SRDA5
LYWW
SRDA5= Device Code
L
= Location Code
Y
= Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping†
SRDA05−4R2
SO−8
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2004
March, 2004 − Rev. 3
1
Publication Order Number:
SRDA05−4R2/D
SRDA05−4R2
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Min
Typ
Max
Unit
VBR
6.0
−
−
V
Reverse Leakage Current @ VRWN = 5.0 Volts
IR
N/A
−
10
A
Maximum Clamping Voltage @ IPP = 1.0 A, 8 x 20 S
VC
N/A
−
9.8
V
Maximum Clamping Voltage @ IPP = 10 A, 8 x 20 S
VC
N/A
−
12
V
Between I/O Pins and Ground @ VR = 0 Volts, 1.0 MHz
Capacitance
−
10
15
pF
Between I/O Pins @ VR = 0 Volts, 1.0 MHz
Capacitance
−
5
8
pF
Reverse Breakdown Voltage @ It = 1.0 mA
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted)
UNIDIRECTIONAL (Circuit tied to Pins 1 and 3 or 2 and 3)
Parameter
Symbol
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
VBR
IT
VBR
IF
VC VBR VRWM
IR VF
IT
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ VRWM
Breakdown Voltage @ IT
Test Current
IPP
Maximum Temperature Coefficient of VBR
IF
Forward Current
VF
Forward Voltage @ IF
ZZT
Maximum Zener Impedance @ IZT
IZK
Reverse Current
ZZK
Maximum Zener Impedance @ IZK
Uni−Directional TVS
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2
V
SRDA05−4R2
9
8
8
7
IR, REVERSE LEAKAGE (A)
VZ, REVERSE BREAKDOWN (V)
TYPICAL CHARACTERISTICS
7
6
5
4
3
2
1
0
−100
−50
0
50
100
T, TEMPERATURE (°C)
150
6
5
4
3
2
1
0
−100
200
VC, CLAMPING VOLTAGE (V)
% OF PEAK PULSE CURRENT
70
60
HALF VALUE IRSM/2 @ 20 s
50
40
30
tP
20
10
0
0
20
40
200
35
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 s
80
150
100
Figure 2. Reverse Leakage versus
Temperature
PEAK VALUE IRSM @ 8 s
tr
90
50
T, TEMPERATURE (°C)
Figure 1. Reverse Breakdown versus
Temperature
100
0
−50
60
30
25
20
15
10
5
0
80
0
10
20
30
40
50
60
70
80
IPP, PEAK PULSE CURRENT (A)
t, TIME (s)
Figure 3. 8 × 20 s Pulse Waveform
Figure 4. Clamping Voltage versus Peak Pulse
Current
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3
90
SRDA05−4R2
PACKAGE DIMENSIONS
SO−8
CASE 751−07
ISSUE AB
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDAARD IS 751−07
−X−
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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Phone: 81−3−5773−3850
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For additional information, please contact your
local Sales Representative.
SRDA05−4R2/D