WL600C 2.4 - 2.5GHz RF and IF Circuit Preliminary Information DS4581 The WL600C is a 2.4-2.5GHz RF transmitter and receiver chip for use in digital radio, and operates from a supply voltage of 2.7 - 3.6V. It is designed to work with the Zarlink Semiconductor WL800 frequency synthesiser and the WL102 WLAN controller chip which together make up the DE6038 frequency hopping Wireless Local Area Network (WLAN) transceiver. The receiver circuit contains a low noise amplifier, image rejecting mixer, IF limiting strip with RSSI and a quadrature demodulator. There is also a power amplifier driver stage and ramp control facility for use in transmit. ISSUE 2.1 August 1997 Ordering Information WL600C/KG/GP1R PIN 1 Features PIN 48 • Part of DE6038 chipset (WL800, WL102) • High level of integration • Low noise figure • Low power consumption • High data rates with comparator for 2 level FSK • Minimal external components • 48 lead LQFP package PIN 1 IDENT Absolute Maximum Ratings Supply voltage Vcc Transmit/Receive and standby input 4V -0.5 to Vcc +0.5V Current consumption TBD Junction temperature Tj 150° ESD protection 2KV Related Documents Datasheets WL800/102 DE6038 LQFP48 Figure 1 - Pin connections - top view Pin Description Pin Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 QUAD+ QUADGND_IF DEMOD_OUT+ DEMOD_OUTRSSI CLAMP_SET CCA_THRESHOLD VCC_IFSTRIP DECOUPLE_LOGDECOUPLE_LOG+ IF_IN+ IF_INCCAB GND_IF BUFFER_IN+ BUFFER_INVCC_DATA RXD RXDB GND_RF IF_OUTIF_OUT+ GND_PADDLE 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 VCC_RF GND_RF VCC_LNA GND_RF RF_IN LNA_DEGEN LNA_DEGEN DRIVE VCC_PA GND_RF RAMP_CAP PA_ON STDBYB TX/RXB GND_LO LO_IN VCC_LO DATA_IN+ DATA_INBUFFER_OUTBUFFER_OUT+ CLAMPCLAMP+ GND_PADDLE WL600C Preliminary Information 22 IMAGE REJECT MIXER 29 23 46 47 7 42 43 PHASE SHIFT DATA SLICE 19 20 ACTIVE CLAMP CIRCUIT PHASE SHIFT LNA 16 BUFFER AMP IMAGE REJECT MIXER X2 44 45 17 PHASE SHIFT 10 11 PA DRIVE BUFFER 1 IF STRIP 32 2 4 5 LO BUFFER DETECTORS COMPARATOR 14 35 40 12 13 6 8 Figure 2 - WL600C block diagram DEVICE PIN OUT 2 Pin Ref Type Description 1 QUAD+ I/O Quadrature demodulator tank circuit connection 2 QUAD - I/O Quadrature demodulator tank circuit connection 3 GND_IF GND Ground for IF strip circuitry 4 DEMOD_OUT + OUT Demodulator output 5 6 DEMOD_OUT RSSI OUT OUT Demodulator output RSSI detector analogue output 7 CLAMP_SET IN Sets clamp knee voltage 8 CCA_THRESHOLD IN Sets level at which CCA comparator will switch 9 10 VCC_IFSTRIP DECOUPLE_LOG - VCC I/O 11 DECOUPLE_LOG + I/O 12 IF_IN + IN Log amp input, AC couple 13 IF_IN - IN Log amp input, AC couple 14 CCAB OUT CCA comparator output: signal = logic high, clear = logic low 15 16 GND_IF BUFFER_IN + GND IN Ground for IF strip circuitry x 2 buffer input 17 BUFFER_IN - IN 18 19 VCC_DATA RXD VCC OUT Power supply for log amp, demod, and internal references Decoupling for log amp feedback network, AC couple Decoupling for log amp feedback network, AC couple x 2 buffer input Power supply for clamp, data comparator and buffer amp Data comparator output Preliminary Information WL600C Pin Ref Type Description 20 RXDB OUT Data comparator output 21 GND_RF GND Ground for LNA, mixer, IF summation, and PA driver circuits 22 IF_OUT- OUT Downconverter output, requires external load and RFC 23 IF_OUT+ OUT Downconverter output, requires external load and RFC 24 GND_PADDLE GND Ground for substrate and package paddle 25 VCC_RF VCC Power supply for mixer, summation, and PA ramp circuits 26 GND_RF GND Ground for LNA, mixer, IF summation, and PA driver circuits 27 VCC_LNA VCC Power supply for LNA 28 GND_RF GND Ground for LNA, mixer, IF summation, and PA driver circuits 29 RF_IN IN LNA input, AC couple 30 LNA_DEGEN I/O LNA degeneration, connect to ground 31 LNA_DEGEN I/O 32 DRIVE OUT LNA degeneration, connect to ground Power amplifier driver output, requires external load and RFC 33 VCC_PA VCC Power supply for power amplifier driver 34 GND_RF GND Ground for LNA, mixer, IF summation, and PA driver circuits 35 36 RAMP_CAP PA_ON I/O IN 37 STDBYB IN 38 TX/RXB IN 39 GND_LO GND PA ramp circuit timing capacitor connection PA ramp circuit control input: PA on = logic high, PA off = logic low Power down control input: active= logic high, standby = logic low Transmit/Receive control input: transmit = logic high, receive = logic low Ground for LO buffer, phaseshifter, and standby circuitry 40 LO_IN IN 41 VCC_LO VCC Local oscillator input, AC couple 42 DATA_IN+ IN Data comparator input 43 DATA_IN- IN Data comparator input 44 BUFFER_OUT- OUT x2 buffer output 45 BUFFER_OUT+ OUT x2 buffer output 46 CLAMP - I/O Data clamp, knee voltage set by pin 7, AC couple 47 CLAMP + I/O Data clamp, knee voltage set by pin 7, AC couple 48 GND_PADDLE GND Power supply for LO buffer, phaseshifter, and standby circuitry Ground for substrate and package paddle 3 WL600C Preliminary Information Electrical Characteristics These characteristics are guaranteed over the following conditions (unless otherwise stated): TAMB = -20°C to + 85°C VCC = 2.7V to 3.6V, Characteristic Value Min Typ Unit Condition Max Supply current (transmit) 50 mA Supply current (Receive) 60 mA Supply current in standby 0.3 mA PA DRIVER & RAMP CIRCUIT Logic low voltage 0 0.8 V Ramp down Logic high voltage Vcc-0.7 Vcc V Ramp up 10 µA Logic Input current Ramp capacitor charge Current Ramp capacitor voltage swing 250 µA 1 V Output power -2 2 dBm Output band 2.4 2.5 GHz Max to Min power out ratio 20 dB RECEIVER LOW NOISE AMPLIFIER & MIXERS Conversion gain 19 3rd order intercept point -10 dBm 1dB input gain compression -22 dBm Noise figure Input impedance 22 7 2.4GHz 13+j20 2.45GHz 15+j30 2.5GHz 20+j50 Image frequency rejection dB 10 Local oscillator input impedance IF output impedance Matched to 50Ohms Ohms 25 Local oscillator input level dB Differential into 600Ohms dB -16 dBm 15-j40 Ohms 600 Ohms With external 900Ω resistor TRANSMIT/RECEIVE INPUT Logic low voltage 0 0.8 V Receive mode Logic high voltage Vcc-0.7 Vcc V Transmit mode 10 µA Input current 4 Preliminary Information WL600C Electrical Characteristics (cont) These characteristics are guaranteed over the following conditions (unless otherwise stated): TAMB = -20°C to + 85°C VCC = 2.7V to 3.6V, Characteristic Value Min Typ Unit Condition Max LIMITING STRIP Maximum input frequency 50 Noise figure 3.5 Input resistance 6 1200 Capacitance 70 Limiting point -78 dB Ohms 0.5 Limiting strip gain MHz Set by external 1k8 resistor pF dB -75 dBm ±3 dB RSSI Rise time 100 ns Non linearity Maximum output voltage 1.9 V Output voltage @ -70dBm input 1.3 V 6 kOhms Output impedance Input = 0dBm CLEAR CHANNEL ASSESSMENT COMPARATOR Logic high voltage 2.2 V Logic low voltage Threshold input limits 1 Input current 0.5 V 2 V 1 µA DEMODULATOR Detect output voltage 0.4 Vp-p Differential. 150kHz deviation Quad circuit (2.2µH/40kΩ) Detected signal bandwidth Output pull down current Output DC common mode 3 MHz 350 µA Vcc-1.5 V Dependent on Quad circuit CLAMP CIRCUIT Knee voltage range Clamp set range 0.1 0.350 V 1 2 V Inversely proportional to knee voltage DC bias at inputs Vcc-1 V Slope resistance 100 Ohms OUTPUT COMPARATOR Input offset voltage 5 mV Input current 1 µA Output rise/fall time 11 Output voltage swing Input common mode range Output common mode 15 20 400 1 Vcc-0.7 Vcc-0.85 ns For load capacitiance 0-10pF mV pk-pk differential V V 5 WL600C Preliminary Information Electrical Characteristics (cont) These characteristics are guaranteed over the following conditions (unless otherwise stated): TAMB = -20°C to + 85°C VCC = 2.7V to 3.6V, Characteristic Value Min Typ Unit Condition Max BUFFER AMP Buffer amplifier gain Input common mode range 2 1.2 Output common mode Vcc-0.5 Vcc-1.5 Max difference between inputs 450 Output pull down current V V mV Amp will limit outside this range µA 350 STANDBY INPUT Chip must be in receive mode when switching to/from standby Logic low voltage 0 0.8 V Circuit powered down Logic high voltage Vcc-0.7 Vcc V Circuit powered up Input current µA 100 µs Standby to receive time Functional Description Receive The RF input stage of the WL600C receiver is a 2.5GHz low noise amplifier (LNA). The output of the single ended LNA is split and fed into the inputs of two mixers which form an image rejecting down converter. An external oscillator (2.357 → 2.457GHz)is fed through an RC phase shift network to provide the required quadrature local oscillator signal. The mixer outputs are fed through further phase shift networks and are combined to form a differential 43MHz IF signal which is used to drive the 43MHz SAW filter. The output of the SAW filter is fed into a differential limiting strip which provides the IF gain. The strip has a series of detectors whose output provides an analog voltage indicating receive signal strength (RSSI). Alternatively, for basic applications a comparator connected to the RSSI detectors can be used. When the RSSI signal is greater than a value set by the CCA_THRESHOLD input the clear channel assessment (CCAB) output goes high. A conventional quadrature demodulator (with external tuned circuit to supply the quadrature drive) provides the analogue data stream which is then AC coupled to a data slice comparator. A clamp circuit is connected between the comparator inputs to provide DC restoration of the AC coupled signal. The comparator output then goes to the data and clock recovery circuits on a CMOS integrated circuit (such as the WL102). 6 Transmit The local oscillator signal is also used in transmit at a higher frequency (2.4 →2.5GHz) and is buffered and amplified on the WL600C. This provides the drive to the transmit power amplifier (also off chip). A ramp circuit is included to control the drive level to the power amplifier in a controlled manner. This is done at the start and end of a transmit sequence and should be used to prevent the generation of spectral “splash”. A single external capacitor controls the rate of increase and decrease of the power drive level. Preliminary Information WL600C Control Waveforms TX/RXB PA_ON Ramp_Cap RF output PA_Drive Figure 3 - Transmit control waveforms Control Logic Control Line Logic ‘0’ Logic ‘1’ TX/RXB Receive Transmit PA_ON PA off PA on STDBYB Standby Active 7 For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. 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Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in an I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2002, Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE