ETC WS128K32

WS128K32-XG2TXE
HI-RELIABILITY PRODUCT
128Kx32 SRAM MULTICHIP PACKAGE, RADIATION TOLERANT
FEATURES
■ 5 Volt Power Supply
■ Access Times of 35, 45, 55ns
■ Packaging
• 68 lead, 22.4mm CQFP (G2T), 4.57mm (0.180"),
(Package 509)
■ Organized as 128Kx32; User Configurable as 256Kx16
or 512Kx8
■ Low Power Data Retention
■ Low Power CMOS
■ TTL Compatible Inputs and Outputs
■ Built in Decoupling Caps and Multiple Ground Pins for
Low Noise Operation
■ Weight:
WS128K32-XG2TXE - 8 grams typical
■ Radiation tolerant with epitaxial layer on die.
■ Commercial, Industrial and Military Temperature
Ranges
■ 6T memory cells provide excellent protection against
soft errors
*
FIG. 1
This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
PIN CONFIGURATION FOR WS128K32-XG2TXE
PIN DESCRIPTION
NC
A0
A1
A2
A3
A4
A5
CS3
GND
CS4
WE1
A6
A7
A8
A9
A10
VCC
TOP VIEW
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
ADVANCED*
I/O0-31
Data Inputs/Outputs
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
A0-16
Address Inputs
WE1-4
Write Enables
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
Output Enable
VCC
Power Supply
GND
Ground
The WEDC 68 lead G2T CQFP
fills the same fit and function
as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2T has the
TCE and lead inspection
advantage of the CQFP form.
NC
Not Connected
BLOCK DIAGRAM
WE1 CS 1
WE2 CS2
WE3 CS 3
WE 4CS4
OE
A0-16
NC
NC
NC
WE4
WE3
WE2
OE
CS2
NC
A16
CS1
A15
A14
A13
A12
A11
VCC
Chip Selects
OE
0.940"
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
128K x 8
8
I/O0-7
December 2000 Rev. 0
CS1-4
1
128K x 8
8
I/O8-15
128K x 8
8
I/O16-23
128K x 8
8
I/O24-31
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32-XG2TXE
ABSOLUTE MAXIMUM RATINGS
Parameter
TRUTH TABLE
Symbol
Min
Max
Unit
CS
OE
WE
Mode
Data I/O
Power
TA
-55
+125
°C
°C
H
L
L
L
X
L
X
H
X
H
L
H
Standby
Read
Write
Out Disable
High Z
Data Out
Data In
High Z
Standby
Active
Active
Active
Operating Temperature
TSTG
-65
+150
Signal Voltage Relative to GND
VG
-0.5
Vcc+0.5
V
Junction Temperature
TJ
150
°C
7.0
V
Storage Temperature
Supply Voltage
-0.5
VCC
CAPACITANCE
(TA = +25°C)
Parameter
RECOMMENDED OPERATING CONDITIONS
Symbol
Conditions
Max
OE capacitance
COE
VIN = 0 V, f = 1.0 MHz
CWE
VIN = 0 V, f = 1.0 MHz
50
Unit
pF
Symbol
Min
Max
Unit
WE1-4 capacitance
CQFP G2T
Supply Voltage
VCC
4.5
5.5
V
CS1-4 capacitance
CCS
VIN = 0 V, f = 1.0 MHz
20
pF
Input High Voltage
VIH
2.2
V CC + 0.3
V
Data I/O capacitance
CI/O
VI/O = 0 V, f = 1.0 MHz
20
pF
Input Low Voltage
VIL
-0.3
+0.8
V
Address input capacitance
CAD
VIN = 0 V, f = 1.0 MHz
50
pF
Operating Temp. (Mil.)
TA
-55
+125
°C
Parameter
pF
20
This parameter is guaranteed by design but not tested.
RADIATION CHARACTERISTICS
Total Dose (TM1019.5)
Functional
Parametric
Latch-up
25°C
SEU LET
Threshold
VCC Max
(Krads)
(Krads)
30
30
Typical Iccsb (mA) (MeV/mg/cm2)
1.2
Cross
Section
(VCC MIN)
/BIT
(MeV/mg/cm2)
(E-6 cm2)
2
0.2
>100
DC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, T A = -55°C to +125°C)
Parameter
Sym
Conditions
Units
Min
Max
10
µA
Input Leakage Current
ILI
VCC = 5.5, VIN = GND to VCC
Output Leakage Current
ILO
CS = VIH, OE = VIH, VOUT = GND to VCC
10
µA
Operating Supply Current
ICC
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5
520
mA
Standby Current
ISB
CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5
8
mA
Output Low Voltage
VOL
IOL = 8mA, VCC = 4.5
0.4
V
Output High Voltage
VOH
IOH = -4OmA, VCC = 4.5
2.4
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DATA RETENTION CHARACTERISTICS
(TA = -55°C to +125°C)
Characteristic
Data Retention Voltage
Sym
VCC
Conditions
VCC = 2.0V
Data Retention Quiescent Current
ICCDR
Chip Disable to Data Retention Time (1)
TCDR
Operation Recovery Time (1)
TR
Min
2
Max
-
Units
V
CS ≥ VCC -0.2V
-
1
mA
VIN ≥ VCC -0.2V
0
-
ns
TRC
-
ns
or VIN ≤ 0.2V
NOTE: Parameter guaranteed, but not tested.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
2
WS128K32-XG2TXE
AC CHARACTERISTICS
(V CC = 5.0V, GND = 0V, T A = -55°C to +125°C)
Parameter
Symbol
Read Cycle
-35
Min
Read Cycle Time
t RC
Address Access Time
t AA
Output Hold from Address Change
t OH
Chip Select Access Time
t ACS
-45
Max
35
Min
-55
Max Min
45
55
35
0
Units
Max
ns
45
0
55
ns
55
ns
30
ns
0
35
ns
45
Output Enable to Output Valid
t OE
Chip Select to Output in Low Z
t CLZ 1
3
15
3
20
3
Output Enable to Output in Low Z
t OLZ 1
0
0
0
Chip Disable to Output in High Z
t CHZ 1
20
20
20
ns
Output Disable to Output in High Z
t OHZ 1
12
15
20
ns
ns
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(VCC = 5.0V, GND = 0V, TA = -55°C to +125°C)
Parameter
Symbol
Write Cycle
-35
Min
-45
Max
Min
-55
Max
Min
Units
Max
Write Cycle Time
t WC
35
45
55
ns
Chip Select to End of Write
t CW
25
35
45
ns
Address Valid to End of Write
t AW
25
35
45
ns
Data Valid to End of Write
t DW
20
25
25
ns
Write Pulse Width
t WP
25
35
45
ns
Address Setup Time
t AS
0
0
0
ns
Address Hold Time
t AH
0
0
0
ns
Output Active from End of Write
t OW 1
0
0
0
Write Enable to Output in High Z
t WHZ 1
Data Hold Time
t DH
10
0
15
ns
20
0
0
ns
ns
1. This parameter is guaranteed by design but not tested.
FIG. 2
AC TEST CONDITIONS
AC TEST CIRCUIT
Parameter
I OL
Current Source
VZ
D.U.T.
≈ 1.5V
(Bipolar Supply)
C eff = 50 pf
I OH
Current Source
3
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
NOTES:
VZ is programmable from -2V to +7V.
I OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of V OH and VOL.
I OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32-XG2TXE
FIG.3
TIMING WAVEFORM - READ CYCLE
tRC
ADDRESS
tAA
CS
tRC
tCHZ
tACS
ADDRESS
tCLZ
tAA
OE
tOE
tOLZ
tOH
DATA I/O
PREVIOUS DATA VALID
DATA I/O
DATA VALID
tOHZ
DATA VALID
HIGH IMPEDANCE
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
READ CYCLE 2 (WE = VIH)
FIG.4
WRITE CYCLE - WE CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
CS
tAS
tWP
WE
tOW
tWHZ
tDW
DATA I/O
tDH
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
FIG. 5
WRITE CYCLE - CS CONTROLLED
tWC
WS32K32-XHX
ADDRESS
tAS
tAW
tAH
tCW
CS
tWP
WE
tDW
DATA I/O
DATA VALID
WRITE CYCLE 2, CS CONTROLLED
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
4
tDH
WS128K32-XG2TXE
PACKAGE 509:
68 LEAD, LOW PROFILE CERAMIC QUAD FLAT PACK, CQFP (G2T)
25.15 (0.990) ± 0.26 (0.010) SQ
4.57 (0.180) MAX
22.36 (0.880) ± 0.26 (0.010) SQ
0.27 (0.011) ± 0.04 (0.002)
0.25 (0.010) REF
Pin 1
R 0.25
(0.010)
24.03 (0.946)
± 0.26 (0.010)
0.19 (0.007)
± 0.06 (0.002)
1° / 7°
1.0 (0.040)
± 0.127 (0.005)
23.87
(0.940) REF
DETAIL A
1.27 (0.050) TYP
SEE DETAIL "A"
0.38 (0.015) ± 0.05 (0.002)
20.3 (0.800) REF
The WEDC 68 lead G2T CQFP
fills the same fit and function
as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2T has the
TCE and lead inspection
advantage of the CQFP form.
0.940"
TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS128K32-XG2TXE
ORDERING INFORMATION
W S 128K 32 - XXX X X E X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
E = Epitaxial Layer on die
DEVICE GRADE:
M = Military Screened -55°C to +125°C
I = Industrial
-40°C to +85°C
C = Commercial
0°C to +70°C
PACKAGE TYPE:
G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509)
ACCESS TIME (ns)
ORGANIZATION, 128Kx32
User configurable as 256Kx16 or 512Kx8
SRAM
WHITE ELECTRONIC DESIGNS CORPORATION
* Low Power Data Retention only available in G2T Package Type
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
6