ETC WEDPS512K32-XBX

WEDPS512K32-XBX
White Electronic Designs
512Kx32 SRAM MULTI-CHIP PACKAGE
FEATURES
n Commercial, Industrial and Military Temperature Ranges
n Access Times of 12, 15, 17, 20, ns
n TTL Compatible Inputs and Outputs
n Packaging
n 5 Volt Power Supply
n Low Power CMOS
• 16mm x 18mm, 143 PBGA
n Organized as 512Kx32, User Configurable as 1Mx16 or
2Mx8
FIG. 1
Note: This data sheet describes a product that is subject to change without notice.
PIN CONFIGURATION F OR WEDPS512K32-XBX
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
A
-
A2
A1
A0
GND
GND
V CC
V CC
A18
A17
A16
GND
B
CS2
A3
A4
D14
D15
NC
CS4
D24
D25
OE
A15
NC
C
D9
D8
NC
D12
D13
GND
V CC
D26
D27
WE4
D31
D30
D
D10
D11
GND
GND
GND
GND
V CC
V CC
V CC
V CC
D28
D29
E
WE2
GND
GND
GND
GND
GND
V CC
V CC
V CC
V CC
V CC
NC
F
GND
GND
GND
GND
GND
GND
V CC
V CC
V CC
V CC
V CC
V CC
G
V CC
V CC
V CC
V CC
V CC
V CC
GND
GND
GND
GND
GND
GND
H
CS1
V CC
V CC
V CC
V CC
V CC
GND
GND
GND
GND
GND
NC
J
D1
D0
V CC
V CC
V CC
V CC
GND
GND
GND
GND
D23
D22
K
D2
D3
NC
D7
D5
V CC
GND
D17
D16
CS3
D20
D21
L
WE1
A6
A5
D6
D4
NC
WE3
D19
D18
A14
A13
NC
M
GND
A7
A8
A9
V CC
V CC
GND
GND
A10
A11
A12
V CC
BLOCK DIAGRAM
W E1 CS1
W E2 CS2
W E3 CS3
P IN D ESCRIPTION
W E4 CS4
OE
A0-18
512K x 8
8
I/O0-7
February 2003 Rev.5
512K x 8
8
I/O8-15
512K x 8
8
I/O16-23
512K x 8
8
I/O24-31
1
I/O0-31
Data Inputs/Outputs
A0-18
Address Inputs
WE1-4
Write Enables
CS1-4
Chip Selects
OE
Output Enable
VCC
Power Supply
GND
Ground
NC
Not Connected
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WEDPS512K32-XBX
White Electronic Designs
TRUTH TABLE
A BSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Max
Unit
CS
OE
WE
Mode
Data I/O
Power
H
L
L
L
X
L
H
X
X
H
H
L
Standby
Read
Out Disable
Write
High Z
Data Out
High Z
Data In
Standby
Active
Active
Active
TA
-55
+125
°C
Storage Temperature
TSTG
-65
+150
°C
Signal Voltage Relative to GND
VG
-0.5
Vcc+0.5
V
Junction Temperature
TJ
150
°C
7.0
V
Operating Temperature
Supply Voltage
-0.5
VCC
BGA THERMAL RESISTANCE
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Symbol
Min
Max
Unit
VCC
4.5
5.5
V
VIH
2.2
V CC + 0.3
V
Input Low Voltage
VIL
-0.5
+0.8
V
Operating Temp (Mil)
TA
-55
+125
°C
Description
Symbol
Max
Unit
Notes
Junction to Ambient (No Airflow)
Theta JA
16.5
°C/W
1
Junction to Ball
Theta JB
11.3
°C/W
1
Junction to Case (Top)
Theta JC
9.8
°C/W
1
NOTE:
Refer to Application Note "PBGA Thermal Resistance Correlation" at
www.whiteedc.com in the application notes section for modeling conditions.
CAPACITANCE
(TA = +25°C)
Parameter
Symbol
Conditions
OE capacitance
COE
VIN = 0 V, f = 1.0 MHz
Max Unit
30
pF
WE1-4 capacitance
CWE
VIN = 0 V, f = 1.0 MHz
10
pF
CS1-4 capacitance
CCS
VIN = 0 V, f = 1.0 MHz
10
pF
Data I/O capacitance
CI/O
VI/O = 0 V, f = 1.0 MHz
10
pF
Address input capacitance
CAD
VIN = 0 V, f = 1.0 MHz
30
pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
Parameter
Symbol
Conditions
Min
Max
10
Units
Input Leakage Current
I LI
VCC = 5.5, VIN = GND to VCC
Output Leakage Current
I LO
CS = VIH, OE = VIH, VOUT = GND to VCC
10
µA
CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5
660
mA
Operating Supply Current x 32 Mode
ICC
x 32
µA
Standby Current
ISB
CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5
80
mA
Output Low Voltage
VOL
IOL = 8mA
0.4
V
Output High Voltage
VOH
IOH = -4.0mA
2.4
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
2
V
WEDPS512K32-XBX
White Electronic Designs
AC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
Parameter
Symbol
Read Cycle
-12
Min
-15
Max
12
Min
-17
Max
15
Min
-20
Max
17
Min
Units
Max
Read Cycle Time
t RC
Address Access Time
tAA
Output Hold from Address Change
tOH
Chip Select Access Time
tACS
12
15
17
20
Output Enable to Output Valid
tOE
7
8
9
10
Chip Select to Output in Low Z
t CLZ 1
1
Output Enable to Output in Low Z
t OLZ 1
0
Chip Disable to Output in High Z
t CHZ 1
7
12
12
12
ns
Output Disable to Output in High Z
t OHZ 1
7
12
12
12
ns
12
0
20
15
0
0
2
20
ns
0
2
0
ns
17
ns
ns
ns
2
0
ns
0
ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V CC = 5.0V, V SS = 0V, TA = -55°C TO +125°C)
Parameter
Symbol
Read Cycle
-12
Min
-15
Max
Min
-17
Max
Min
-20
Max
Min
Units
Max
Write Cycle Time
t WC
12
15
17
20
ns
Chip Select to End of Write
t CW
10
13
15
15
ns
Address Valid to End of Write
tAW
10
13
15
15
ns
Data Valid to End of Write
t DW
8
10
11
12
ns
Write Pulse Width
t WP
10
13
15
15
ns
Address Setup Time
t AS
0
2
2
2
ns
Address Hold Time
t AH
0
0
0
0
ns
Output Active from End of Write
t OW 1
2
2
2
3
Write Enable to Output in High Z
t WHZ 1
7
0
Data Hold Time
tDH
1. This parameter is guaranteed by design but not tested.
8
0
9
0
ns
11
ns
0
AC TEST CONDITIONS
FIG. 4 AC TEST CIRCUIT
Parameter
IOL
Current Source
VZ ≈ 1.5V
(Bipolar Supply)
D.U.T.
Ceff = 50 pf
Typ
Unit
Input Pulse Levels
VIL = 0, VIH = 3.0
V
Input Rise and Fall
5
ns
Input and Output Reference Level
1.5
V
Output Timing Reference Level
1.5
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 W.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
IOH
Current Source
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WEDPS512K32-XBX
White Electronic Designs
FIG. 5 TIMING WAVEFORM - READ CYCLE
tRC
ADDRESS
tAA
CS
tRC
tACS
ADDRESS
OE
tOH
DATA I/O
tCHZ
tCLZ
tAA
tOE
PREVIOUS DATA VALID
DATA VALID
tOLZ
DATA I/O
HIGH IMPEDANCE
READ CYCLE 1 (CS = OE = VIL, WE = VIH)
READ CYCLE 2 (WE = VIH)
FIG. 6 WRITE CYCLE - WE C ONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
CS
tAS
tWP
WE
tOW
tDW
tWHZ
tDH
DATA VALID
DATA I/O
WRITE CYCLE 1, WE CONTROLLED
FIG. 6 WRITE CYCLE - CS CONTROLLED
tWC
WS32K32-XHX
ADDRESS
tAS
tAW
tAH
tCW
CS
tWP
WE
tDW
DATA I/O
DATA VALID
WRITE CYCLE 2, CS CONTROLLED
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
tDH
4
tOHZ
DATA VALID
WEDPS512K32-XBX
White Electronic Designs
PACKAGE 756: 143 BALL GRID A RRAY
BOTTOM VIEW
12 11 10 9
8
7
6
5 4
3
2
1
A
16.25 (0.640)
MAX
B
C
D
13.97 (0.550)
BSC
1.27
(0.050)
BSC
E
F
G
H
J
K
L
M
0.61 (0.024)
BSC
13.97 (0.550)
BSC
2.21 (0.087)
MAX
18.25 (0.719)
MAX
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WEDPS512K32-XBX
ORDERING INFORMATION
WED P S 512K 32 - XX X X
WHITE ELECTRONIC DESIGNS CORP.
PLASTIC
SRAM
ORGANIZATION, 512Kx32
User configurable as 1Mx16 or 2Mx8
ACCESS TIME (ns)
PACKAGE TYPE:
B = 143 PBGA, 16mm x 18mm, 288mm 2
DEVICE GRADE:
M = M ILITARY S CREENED
I = INDUSTRIAL
C = C OMMERCIAL
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
-55°C TO +125°C
-40°C TO 85°C
0°C TO +70°C
6
White Electronic Designs
WEDPS512K32-XBX
Document Title
512K x 32 SRAM Multi-Chip Package
Revision History
Rev #
History
ReleaseDate
Status
Rev 0
Initial Release
March, 2002
Advanced
Rev 1
Switch Rows and Columns header position (Pg. 1)
March, 2002
Advanced
Rev 2
Switch Rows and Columns header position (Pg. 1)
May, 2002
Advanced
Rev 3
Change mechanical outline to more accurate design (Pg. 1, 5)
May, 2002
Advanced
Rev 4
Remove references to 25-55ns speed grades (Pg. 1, 2, 3)
August 2002
Advanced
Rev 5
Changes (Pg. 1, 2)
1.1 Add Thermal Resistance Table
1.2 Change product status to Final
January, 2003
Final
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com