WS512K48-XG4WX HI-RELIABILITY PRODUCT 512Kx48 SRAM MODULE ADVANCED* FEATURES ■ 2V Data Retention Devices Available (WS512K48L-XXX Low Power Version) ■ Access Times 17, 20, 25, 35ns ■ Packaging: • 116 Lead, 40.0mm Hermetic CQFP (Package 504) ■ TTL Compatible Inputs and Outputs ■ Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation ■ Commercial, Industrial and Military Temperature Ranges ■ 5 Volt Power Supply ■ Weight WS512K48-XG4WX - 20 grams typical ■ Low Power CMOS ■ Organized as 512K x 48, Data Width is user configurable. * This data sheet describes a product that may or may not be under development and is subject to change or cancellation without notice. PIN CONFIGURATION FOR WS512K48-XG4WX BLOCK DIAGRAM WE1 CS1 TOP VIEW I/O2 I/O1 I/O0 VCC WE2 CS2 NC A0 A1 A2 A3 A4 WE1 CS1 NC NC NC A5 A6 A7 A8 A9 NC NC NC VCC NC NC NC 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 WEx CSx WE6 CS6 A0-18 NC NC NC NC NC GND NC NC NC NC NC NC NC NC GND I/O47 I/O46 I/O45 I/O44 I/O43 I/O42 I/O41 I/O40 GND I/O39 I/O38 I/O37 I/O36 I/O35 1 2 512K x 8 512K x 8 8 I/O0-7 8 I/O8-15 ..... 8 I/O... 6 512K x 8 8 I/O40-47 PIN DESCRIPTION I/O0-47 Data Inputs/Outputs A0-18 Address Inputs WE1-6 Write Enables CS1-6 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected I/O29 I/O30 I/O31 VCC WE3 CS3 NC NC A18 A17 A16 A15 WE4 CS4 OE CS5 WE5 A14 A13 A12 A11 A10 NC CS6 WE6 VCC I/O32 I/O33 I/O34 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 GND I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 WE2 CS2 OE October 2000 Rev. 2 1 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WS512K48-XG4WX ABSOLUTE MAXIMUM RATINGS Parameter TRUTH TABLE Symbol Min Max Unit CS OE WE Mode Data I/O Power TA -55 +125 °C °C H L L L X L X H X H L H Standby Read Write Out Disable High Z Data Out Data In High Z Standby Active Active Active Operating Temperature TSTG -65 +150 Signal Voltage Relative to GND VG -0.5 Vcc+0.5 V Junction Temperature TJ 150 °C 7.0 V Storage Temperature Supply Voltage -0.5 VCC CAPACITANCE (T A = +25°C) RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Symbol Conditions Max Unit Supply Voltage VCC 4.5 5.5 V OE capacitance COE VIN = 0 V, f = 1.0 MHz 100 pF Input High Voltage VIH 2.2 V CC + 0.3 V WE capacitance CWE VIN = 0 V, f = 1.0 MHz 20 pF Input Low Voltage VIL -0.3 +0.8 V CS capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF Operating Temp. (Mil.) TA -55 +125 °C Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 20 pF Operating Temp. (Ind.) TA -40 +85 °C Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 100 pF Parameter This parameter is guaranteed by design but not tested. DC CHARACTERISTICS (VCC = 5.0V, TA = -55°C to +125°C) Parameter Sym Conditions Units Min ILI ILO VCC = 5.5, VIN = GND to VCC CS = VIH, OE = VIH, VOUT = GND to VCC Max 10 10 Operating Supply Current ICC CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 990 mA Standby Current ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 90 mA Output Low Voltage VOL IOL = 8mA, V CC = 4.5 0.4 Output High Voltage VOH IOH = -4.0mA, VCC = 4.5 Input Leakage Current Output Leakage Current µA µA V 2.4 V NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V DATA RETENTION CHARACTERISTICS (TA = -55°C to +125°C) Parameter Symbol Conditions Units Min Max 2.0 V DR CS ≥ V CC -0.2V 5.5 V Data Retention Current I CCDR1 V CC = 3V 42 mA Low Power Data Retention Current (WS512K48L-XXX) I CCDR2 V CC = 3V 24 mA Data Retention Supply Voltage * Also available in Low Power version, please call factory for information. White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 2 WS512K48-XG4WX AC CHARACTERISTICS (VCC = 5.0V, TA = -55°C To +125°C) Parameter Symbol Read Cycle -17 Min Read Cycle Time t RC Address Access Time t AA Output Hold from Address Change t OH Chip Select Access Time t ACS -20 Max 17 Min -25 Max Min 20 25 17 0 35 ns 35 ns 20 ns 0 20 10 ns 25 0 17 Units 35 20 0 -35 Max ns 25 Output Enable to Output Valid t OE Chip Select to Output in Low Z t CLZ 1 3 3 12 3 15 3 Output Enable to Output in Low Z t OLZ 1 0 0 0 0 Chip Disable to Output in High Z t CHZ 1 10 12 12 20 ns Output Disable to Output in High Z t OHZ 1 10 12 12 20 ns ns ns 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS (VCC = 5.0V, TA = -55°C To +125°C) Parameter Symbol Write Cycle -17 Min -20 Max Min -25 Max Min -35 Max Min Units Max Write Cycle Time t WC 17 20 25 35 ns Chip Select to End of Write t CW 14 15 20 25 ns Address Valid to End of Write t AW 15 15 20 25 ns Data Valid to End of Write t DW 10 12 15 20 ns Write Pulse Width t WP 14 15 20 25 ns Address Setup Time t AS 0 0 0 0 ns Address Hold Time t AH 0 0 0 0 ns Output Active from End of Write t OW 1 3 3 3 4 Write Enable to Output in High Z t WHZ 1 Data Hold Time t DH 10 12 0 ns 15 0 0 20 ns 0 ns 1. This parameter is guaranteed by design but not tested. AC TEST CIRCUIT AC TEST CONDITIONS I OL Parameter Current Source VZ D.U.T. ≈ 1.5V (Bipolar Supply) C eff = 50 pf I OH Current Source 3 Typ Unit Input Pulse Levels VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V NOTES: V Z is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω. V Z is typically the midpoint of VOH and V OL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com WS512K48-XG4WX TIMING WAVEFORM - READ CYCLE tRC ADDRESS tAA CS tRC tCHZ tACS ADDRESS tCLZ tAA OE tOE tOLZ tOH DATA I/O PREVIOUS DATA VALID DATA I/O DATA VALID tOHZ DATA VALID HIGH IMPEDANCE READ CYCLE 1 (CS = OE = VIL, WE = VIH) READ CYCLE 2 (WE = VIH) WRITE CYCLE - WE CONTROLLED tWC ADDRESS tAW tAH tCW CS tAS tWP WE tOW tWHZ tDW DATA I/O tDH DATA VALID WRITE CYCLE 1, WE CONTROLLED WRITE CYCLE - CS CONTROLLED tWC WS32K32-XHX ADDRESS tAS tAW tAH tCW CS tWP WE tDW DATA I/O DATA VALID WRITE CYCLE 2, CS CONTROLLED White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 4 tDH WS512K48-XG4WX PACKAGE 504: 116 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G4W) 5.1 (0.200) MAX 1.27 (0.050) ± 0.1 (0.005) 39.6 (1.56) ± 0.38 (0.015) SQ PIN 1 IDENTIFIER Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 1.27 (0.050) REF 0.25 (0.010) ± 0.05 (0.002) 38 (1.50) REF 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES ORDERING INFORMATION W S 512K48 X - XXX G4W X DEVICE GRADE: M = Military Screened I = Industrial C = Commercial -55°C to +125°C -40°C to +85°C 0°C to + 70°C PACKAGE TYPE: G4W = 116 Lead 40mm Ceramic Quad Flat Pack, CQFP (Package 504) ACCESS TIME (ns) IMPROVEMENT MARK: Blank = Standard Power L = Low Power Data Retention ORGANIZATION, 512K x 48 Data Width User Configurable SRAM WHITE ELECTRONIC DESIGNS CORP. 5 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com