54ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE Outputs General Description Features The ACTQ646 consist of registered bus transceiver circuits, with outputs, D-type flip-flops, and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental handling functions available are illustrated in Figures 1, 2, 3, 4. The ACTQ utilizes FSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. n Guaranteed simultaneous switching noise level and dynamic threshold performance n Independent registers for A and B busses n Multiplexed real-time and stored data transfers n 300 mil slim dual-in-line package n Outputs source/sink 24 mA n Faster prop delays than the standard AC/ACT646 n 4 kV minimum ESD immunity n Standard Microcircuit Drawing (SMD) 5962-9219601 Logic Symbols IEEE/IEC DS100326-1 DS100326-2 Pin Descriptions Pin Names A0–A7 Description Data Register A Inputs Data Register A Outputs B0–B7 Data Register B Inputs Data Register B Outputs CPAB, CPBA Clock Pulse Inputs SAB, SBA Transmit/Receive Inputs GTO™ is a trademark of National Semiconductor Corporation FACT™ and FACT Quiet Series™ are trademarks of Fairchild Semiconductor Corporation © 1998 National Semiconductor Corporation DS100326 www.national.com 54ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE Outputs September 1998 Logic Symbols (Continued) Pin Descriptions Pin Names (Continued) Description G Output Enable Input DIR Direction Control Input Connection Diagram Pin Assignment for DIP and Flatpack DS100326-3 Pin Assignment for LCC DS100326-4 www.national.com 2 Storage from Bus to Register Real Time Transfer A-Bus to B-Bus DS100326-7 DS100326-5 FIGURE 1. FIGURE 3. Real Time Transfer B-Bus to A-Bus Transfer from Register to Bus DS100326-8 DS100326-6 FIGURE 4. FIGURE 2. Function Table Inputs Data I/O (Note 1) G DIR CPAB CPBA H X H or L H or L X X H X N X X X SAB SBA A0–A7 B0–B7 Input Input Function Isolation Clock An Data into A Register H X X N X X Clock Bn Data into B Register L H X X L X An to Bn — Real Time (Transparent Mode) L H N X L X L H H or L X H X A Register to Bn (Stored Mode) L H N X H X Clock An Data into A Register and Output to Bn L L X X X L L L X N X L Input Output Clock An Data into A Register Bn to An — Real Time (Transparent Mode) Output Input Clock Bn Data into B Register L L X H or L X H B Register to An (Stored Mode) L L X N X H Clock Bn Data into B Register and Output to An H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial N = LOW-to-HIGH Transition Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. 3 www.national.com Logic Diagram DS100326-9 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.national.com 4 Absolute Maximum Ratings (Note 2) Junction Temperature (TJ) CDIP If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current 175˚C Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) ACTQ Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54ACTQ Minimum Input Edge Rate ∆V/∆t ACTQ Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ± 50 mA 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT™ circuits outside databook specifications. ± 50 mA −65˚C to +150˚C ± 300 mA DC Electrical Characteristics for ACTQ Symbol Parameter VCC TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VIH VIL VOH VOL IIN Minimum High Level 4.5 2.0 Input Voltage 5.5 2.0 Maximum Low Level 4.5 0.8 Input Voltage 5.5 0.8 Minimum High Level 4.5 4.4 Output Voltage 5.5 5.4 4.5 3.7 5.5 4.7 Maximum Low Level 4.5 0.1 Output Voltage 5.5 0.1 Maximum Input V VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA V (Note 3) VIN = VIL or VIH IOH = −24 mA V IOH = −24 mA IOUT = 50 µA V (Note 3) VIN = VIL or VIH IOL = 24 mA 4.5 0.5 5.5 0.5 5.5 ± 1.0 µA IOL = 24 mA VI = VCC, GND 5.5 ± 10.0 µA VI = VIL, VIH VO = VCC, GND 5.5 1.6 mA VI = VCC − 2.1V VOLD = 1.65V Max VOHD = 3.85V Min VIN = VCC Leakage Current IOZT Maximum I/O Leakage Current (An, Bn Inputs) ICCT Maximum ICC/Input (Note 4) IOLD Minimum Dynamic 5.5 50 mA IOHD Output Current 5.5 −50 mA ICC Maximum Quiescent 5.5 160.0 µA Supply Current or GND (Note 5) 5 www.national.com DC Electrical Characteristics for ACTQ Symbol Parameter (Continued) VCC TA = (V) −55˚C to +125˚C Units Conditions Guaranteed Limits VOLP Quiet Output 5.0 1.5 V Maximum Dynamic VOL VOLV Quiet Output (Note 6) 5.0 -1.2 V Minimum Dynamic VOL (Note 6) Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: ICC for 54ACTQ @ 25˚C is identical to 74ACQ @ 25˚C. Note 6: Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND. AC Electrical Characteristics Symbol Parameter tPLH, Propagation Delay tPHL Clock to Bus tPLH, Propagation Delay tPHL Bus to Bus tPLH, Propagation Delay tPHL SBA or SAB to An or Bn VCC (V) (Note 7) TA = −55˚C to +125˚C CL = 50 pF Units Min Max 5.0 2.0 11.0 ns 5.0 2.0 12.0 ns 5.0 2.0 12.5 ns 5.0 1.5 15.0 ns 5.0 1.5 12.0 ns 5.0 1.5 15.0 ns 5.0 1.5 12.0 ns (w/An or Bn HIGH or LOW) tPZH, Enable Time tPZL G to An or Bn tPHZ, Disable Time tPLZ G to An or Bn tPZH, Enable Time tPZL DIR to An or Bn tPHZ, Disable Time tPLZ DIR to An or Bn Note 7: Voltage Range 5.0 is 5.0V ± 0.5V AC Operating Requirements Symbol TA = −55˚C to +125˚C CL = 50 pF Units Parameter VCC (V) (Note 8) Setup Time, HIGH or LOW 5.0 3.0 ns 5.0 1.5 ns 5.0 4.0 ns Guaranteed Minimum tS Bus to Clock tH Hold Time, HIGH or LOW Bus to Clock tW Clock Pulse Width HIGH or LOW Note 8: Voltage Range 5.0 is 5.0V ± 0.5V www.national.com 6 Capacitance Symbol Parameter Max Units 15 pF CIN Input Capacitance CI/O Input/Output Capacitance 20.0 pF CPD Power Dissipation 100.0 pF Conditions VCC = OPEN VCC = 5.0V VCC = 5.0V Capacitance 7 www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Ceramic Dual-In-Line Package Number J24A 24-Lead Cerpack Package Number W24C www.national.com 8 inches (millimeters) unless otherwise noted (Continued) 28-Lead Leadless Chip Carrier Package Number E28A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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