ETC NTHD5903T1/D

NTHD5903T1
Power MOSFET
Dual P-Channel ChipFET
2.1 Amps, 20 Volts
Features
• Low RDS(on) for Higher Efficiency
• Logic Level Gate Drive
• Miniature ChipFET Surface Mount Package Saves Board Space
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DUAL P–CHANNEL
2.1 AMPS, 20 VOLTS
RDS(on) = 155 m
Applications
• Power Management in Portable and Battery–Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
S1
S2
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
5 secs
Steady
State
Unit
Drain–Source Voltage
VDS
–20
V
Gate–Source Voltage
VGS
12
V
Continuous Drain Current
(TJ = 150°C) (Note 1.)
TA = 25°C
TA = 85°C
ID
Continuous Source Current
(Diode Conduction) (Note 1.)
IS
Maximum Power Dissipation
(Note 1.)
TA = 25°C
TA = 85°C
PD
Operating Junction and Storage
Temperature Range
–1.8
P–Channel MOSFET
A
–0.9
A
W
2.1
1.1
TJ, Tstg
P–Channel MOSFET
2.1
1.5
10
IDM
D2
D1
A
2.9
2.1
Pulsed Drain Current
G2
G1
ChipFET
CASE 1206A
STYLE 2
1.1
0.6
°C
–55 to +150
1. Surface Mounted on 1″ x 1″ FR4 Board.
MARKING
DIAGRAM
PIN CONNECTIONS
8
1
S1
1
8
D1
7
2
G1
2
7
D2
6
3
S2
3
6
D2
5
4
G2
4
5
A7
D1
A7 = Specific Device Code
ORDERING INFORMATION
 Semiconductor Components Industries, LLC, 2001
May, 2001 – Rev. 1
1
Device
Package
Shipping
NTHD5903T1
ChipFET
3000/Tape & Reel
Publication Order Number:
NTHD5903T1/D
NTHD5903T1
THERMAL CHARACTERISTICS
Characteristic
Symbol
Maximum Junction–to–Ambient (Note 2.)
t 5 sec
Steady State
RthJA
Maximum Junction–to–Foot (Drain)
Steady State
RthJF
Typ
Max
50
90
60
110
30
40
Unit
°C/W
°C/W
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Test Condition
Min
Typ
Max
Unit
VGS(th)
VDS = VGS, ID = –250 µA
–0.6
–
–
V
Gate–Body Leakage
IGSS
VDS = 0 V, VGS = 12 V
–
–
100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = –16 V, VGS = 0 V
–
–
–1.0
µA
VDS = –16 V, VGS = 0 V,
TJ = 85°C
–
–
–5.0
ID(on)
VDS –5.0 V, VGS = –4.5 V
–10
–
–
A
rDS(on)
( )
VGS = –4.5 V, ID = –2.1 A
–
0.130
0.155
Ω
VGS = –3.6 V, ID = –2.0 A
–
0.150
0.180
VGS = –2.5 V, ID = –1.7 A
–
0.215
0.260
gfs
VDS = –10 V, ID = –2.1 A
–
5.0
–
S
VSD
IS = –0.9 A, VGS = 0 V
–
–0.8
–1.2
V
–
3.0
6.0
nC
Static
Gate Threshold Voltage
On–State Drain Current (Note 3.)
Drain–Source On–State Resistance (Note 3.)
Forward Transconductance (Note 3.)
Diode Forward Voltage (Note 3.)
Dynamic (Note 4.)
Total Gate Charge
Qg
10 V
45V
VDS = –10
V, VGS = –4.5
V,
ID = –2.1 A
Gate–Source Charge
Qgs
–
0.9
–
Gate–Drain Charge
Qgd
–
0.6
–
Turn–On Delay Time
td(on)
–
13
20
–
35
55
–
25
40
–
25
40
–
40
80
Rise Time
Turn–Off Delay Time
tr
td(off)
Fall Time
tf
Source–Drain Reverse Recovery Time
trr
VDD = –10 V, RL = 10 Ω
ID –1.0
–1 0 A,
A VGEN = –4
–4.5
5V
V,
RG = 6 Ω
IF = –0.9 A, di/dt = 100 A/µs
2. Surface Mounted on 1″ x 1″ FR4 Board.
3. Pulse Test: Pulse Width 300 µs, Duty Cycle 2%.
4. Guaranteed by design, not subject to production testing.
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2
ns
NTHD5903T1
TYPICAL ELECTRICAL CHARACTERISTICS
10
10
3.6 V
8
125°C
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
VGS = 4 V – 10 V
3.4 V
TJ = 25°C
3V
6
2.8 V
4
2.6 V
VGS = 1.4 V
2.4 V
2
2.2 V
1.8 V
0
25°C
1
2
3
4
5
6
4
2
6
0
2
3
4
1
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 1. On–Region Characteristics
Figure 2. Transfer Characteristics
RDS(on), DRAIN–TO–SOURCE RESISTANCE (Ω)
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
4
ID = –2.1 A
TJ = 25°C
3
2
1
0
0
5
1
3
2
4
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
TJ = 25°C
0.35
0.3
VGS = –2.5 V
0.25
0.2
VGS = –3.6 V
0.15
VGS = –4.5 V
0.1
0.05
1
2
3
4
5
6
7
8
9
10
–ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
1.6
1.0E–6
ID = –2.1 A
VGS = –4.5 V
VGS = 0 V
TJ = 150°C
1.0E–7
IDSS, LEAKAGE (A)
1.4
1.2
TJ = 100°C
1.0E–8
1.0E–9
1
TJ = 25°C
1.0E–10
0.8
0.6
–50
5
0.4
Figure 3. On–Resistance versus
Gate–to–Source Voltage
RDS(on), DRAIN–TO–SOURCE
RESISTANCE (NORMALIZED)
TC = –55°C
0
0
RDS(on), DRAIN–TO–SOURCE RESISTANCE (Ω)
8
1.0E–11
–25
0
25
50
75
100
125
150
0
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 5. On–Resistance Variation with
Temperature
Figure 6. Drain–to–Source Leakage Current
versus Voltage
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3
20
NTHD5903T1
VDS = 0 V
Ciss
VGS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
500
400
Crss
300
200
Coss
100
0
–12
–8
–4
VGS
0
VDS
4
8
12
16
20
6
QT
5
5
–VDS
–VGS
4
4
3
3
Q1
Q2
2
2
ID = –2.1 A
TJ = 25°C
1
1
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
Qg, TOTAL GATE CHARGE (nC)
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 8. Gate–to–Source and
Drain–to–Source Voltage versus Total Charge
Figure 7. Capacitance Variation
100
5
VDD = –10 V
ID = –1.0 A
VGS = –4.5 V
IS, SOURCE CURRENT (AMPS)
td(off)
tf
tr
t, TIME (ns)
6
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
600
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS
td(on)
10
1
VGS = 0 V
TJ = 25°C
4
3
2
1
0
1
10
100
0
0.2
0.4
0.8
0.6
1
RG, GATE RESISTANCE (OHMS)
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
1.2
Normalized Effective Transient
Thermal Impedance
2
1
Duty Cycle = 0.5
Notes:
PDM
0.2
t1
0.1
t2
0.1
t1
1. Duty Cycle, D = t
2
2. Per Unit Base = RthJA = 90°C/W
3. TJM – TA = PDMZthJA(t)
4. Surface Mounted
0.05
0.02
0.01
10–4
Single Pulse
10–3
10–2
10 –1
1
Square Wave Pulse Duration (sec)
10
Figure 11. Normalized Thermal Transient Impedance, Junction–to–Ambient
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4
100
600
NTHD5903T1
Notes
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5
NTHD5903T1
Notes
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6
NTHD5903T1
PACKAGE DIMENSIONS
CHIPFET
CASE 1206A–01
ISSUE A
A
8
7
M
6
K
5
S
5
6
7
8
4
3
2
1
B
1
2
3
L
4
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM
PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN
HORIZONTAL AND VERTICAL SHALL NOT EXCEED
0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE
BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND
BOTTOM LEAD SURFACE.
J
G
DIM
A
B
C
D
G
J
K
L
M
S
C
0.05 (0.002)
STYLE 2:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
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7
MILLIMETERS
MIN
MAX
2.95
3.10
1.55
1.70
1.00
1.10
0.25
0.35
0.65 BSC
0.10
0.15
0.30
0.45
0.55 BSC
5 ° NOM
--1.80
SOURCE 1
GATE 1
SOURCE
GATE 2
DRAIN 1
DRAIN 1
DRAIN 2
DRAIN 2
INCHES
MIN
MAX
0.116
0.122
0.061
0.067
0.039
0.043
0.010
0.014
0.025 BSC
0.004
0.008
0.012
0.018
0.022 BSC
5 ° NOM
--0.071
NTHD5903T1
ChipFET is a trademark of Vishay Siliconix
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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*Available from Germany, France, Italy, UK, Ireland
For additional information, please contact your local
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NTHD5903T1/D