ETC NTGS3443T1/D

NTGS3443T1
Power MOSFET
2 Amps, 20 Volts
P–Channel TSOP–6
Features
• Ultra Low RDS(on)
• Higher Efficiency Extending Battery Life
• Miniature TSOP6 Surface Mount Package
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2 AMPERES
20 VOLTS
RDS(on) = 65 m
Applications
• Power Management in Portable and Battery–Powered Products, i.e.:
Cellular and Cordless Telephones, and PCMCIA Cards
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
P–Channel
Symbol
Value
Unit
–20
Volts
Gate–to–Source Voltage – Continuous
VDSS
VGS
12
Volts
Thermal Resistance
Junction–to–Ambient (Note 1.)
Total Power Dissipation @ TA = 25°C
Drain Current – Continuous @ TA = 25°C
– Pulsed Drain Current (Tp 10 µS)
RθJA
Pd
ID
IDM
244
0.5
–2.2
–10
°C/W
Watts
Amps
Amps
RθJA
Pd
ID
IDM
128
1.0
–3.1
–14
°C/W
Watts
Amps
Amps
RθJA
Pd
ID
IDM
TJ, Tstg
62.5
2.0
–4.4
–20
°C/W
Watts
Amps
Amps
–55 to
150
°C
260
°C
Rating
Drain–to–Source Voltage
Thermal Resistance
Junction–to–Ambient (Note 2.)
Total Power Dissipation @ TA = 25°C
Drain Current – Continuous @ TA = 25°C
– Pulsed Drain Current (Tp 10 µS)
Thermal Resistance
Junction–to–Ambient (Note 3.)
Total Power Dissipation @ TA = 25°C
Drain Current – Continuous @ TA = 25°C
– Pulsed Drain Current (Tp 10 µS)
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering
Purposes for 10 Seconds
TL
1 2 5 6
3
4
MARKING
DIAGRAM
3
4
5
2
1
443
W
TSOP–6
CASE 318G
STYLE 1
6
W
1. Minimum FR–4 or G–10PCB, operating to steady state.
2. Mounted onto a 2″ square FR–4 board (1″ sq. 2 oz. cu. 0.06″ thick single
sided), operating to steady state.
3. Mounted onto a 2″ square FR–4 board (1″ sq. 2 oz. cu. 0.06″ thick single
sided), t 5.0 seconds.
= Work Week
PIN ASSIGNMENT
Drain Drain Source
6
5
4
1
2
3
Drain Drain Gate
ORDERING INFORMATION
Device
NTGS3443T1
 Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev. 1
1
Package
Shipping
TSOP–6
3000 Tape & Reel
Publication Order Number:
NTGS3443T1/D
NTGS3443T1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)*
Characteristic
Symbol
Min
Typ
Max
Unit
–20
–
–
–
–
–
–
–1.0
–5.0
–
–
–100
–
–
100
–0.60
–0.95
–1.50
–
–
–
0.058
0.082
0.092
0.065
0.090
0.100
–
8.8
–
Ciss
–
565
–
pF
Coss
–
320
–
pF
Crss
–
120
–
pF
td(on)
–
10
25
ns
tr
–
18
45
ns
td(off)
–
30
50
ns
tf
–
31
50
ns
Qtot
–
7.5
15
nC
Qgs
–
1.4
–
nC
Qgd
–
2.9
–
nC
VSD
–
–0.83
–1.2
Vdc
trr
–
30
–
ns
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = –10 µA)
V(BR)DSS
Zero Gate Voltage Drain Current
(VGS = 0 Vdc, VDS = –20 Vdc, TJ = 25°C)
(VGS = 0 Vdc, VDS = –20 Vdc, TJ = 70°C)
IDSS
Gate–Body Leakage Current
(VGS = –12 Vdc, VDS = 0 Vdc)
IGSS
Gate–Body Leakage Current
(VGS = +12 Vdc, VDS = 0 Vdc)
IGSS
Vdc
µAdc
nAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = –250 µAdc)
VGS(th)
Static Drain–Source On–State Resistance
(VGS = –4.5 Vdc, ID = –4.4 Adc)
(VGS = –2.7 Vdc, ID = –3.7 Adc)
(VGS = –2.5 Vdc, ID = –3.5 Adc)
RDS(on)
Forward Transconductance
(VDS = –10 Vdc, ID = –4.4 Adc)
Vdc
gFS
mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = –5.0
5 0 Vdc,
Vd VGS = 0 Vdc,
Vd
f = 1.0 MHz)
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = –20
20 Vdc, ID = –1.0
1.0 Adc,
VGS = –4.5 Vdc, Rg = 6.0 )
Fall Time
Total Gate Charge
Gate–Source Charge
(VDS = –10
10 Vdc,
Vd VGS = –4.5
4 5 Vdc,
Vd
ID = –4.4 Adc)
Gate–Drain Charge
BODY–DRAIN DIODE RATINGS
Diode Forward On–Voltage
(IS = –1.7 Adc, VGS = 0 Vdc)
Reverse Recovery Time
(IS = –1.7 Adc, dIS/dt = 100 A/µs)
*Indicates Pulse Test: P.W. = 300 µsec max, Duty Cycle = 2%.
*Handling precautions to protect against electrostatic discharge is mandatory.
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2
NTGS3443T1
TYPICAL ELECTRICAL CHARACTERISTICS
8
8
VGS = –2.5 V
–ID, DRAIN CURRENT (AMPS)
–ID, DRAIN CURRENT (AMPS)
VGS = –5 V
TJ = 25°C
VGS = –3 V
VGS = –4.5 V
VGS = –4 V
VGS = –3.5 V
VGS = –2 V
6
4
2
VGS = –1.5 V
0
0.8
0.4
1.2
1.6
4
TJ = 25°C
2
TJ = 125°C
1.4
1.8
2.2
Figure 2. Transfer Characteristics
RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)
Figure 1. On–Region Characteristics
ID = –4.4 A
TJ = 25°C
0.3
0.25
0.2
0.15
0.1
0.05
2.5
2
3
3.5
4
4.5
5
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
3
0.16
TJ = 25°C
0.14
VGS = –2.5 V
0.12
VGS = –2.7 V
0.1
0.08
VGS = –4.5 V
0.06
0.04
0
1
2
3
4
5
6
7
8
–ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance vs. Gate–to–Source
Voltage
Figure 4. On–Resistance vs. Drain Current and
Gate Voltage
100
1.5
TJ = 125°C
ID = –4.4 A
VGS = –4.5 V
1.3
1.2
1.1
1
0.9
TJ = 100°C
10
1
TJ = 25°C
0.1
0.8
0.7
–50
2.6
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
0.35
1.4
1
TJ = –55°C
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
0.4
0
1.5
6
0
0.6
2
–IDSS, LEAKAGE (nA)
RDS(on), DRAIN–TO–SOURCE RESISTANCE (NORMALIZED)
RDS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS)
0
VDS≥ = –10 V
VGS = 0 V
0.01
–25
0
25
50
75
100
125
150
0
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 5. On–Resistance Variation with
Temperature
Figure 6. Drain–to–Source Leakage Current
vs. Voltage
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3
20
NTGS3443T1
TYPICAL ELECTRICAL CHARACTERISTICS
5
1200
–VGS, GATE–TO–SOURCE
VOLTAGE (VOLTS)
1000
C, CAPACITANCE (pF)
QT
TJ = 25°C
VGS = 0 V
800
600
Ciss
400
Coss
200
VGS
4
3
Q1
Q2
2
1
TJ = 25°C
ID = –4.4 A
Crss
0
2
4
6
8
10
12
14
16
18
0
20
0
1
2
3
4
5
6
7
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate–to–Source and
Drain–to–Source Voltage vs. Total Charge
1.3
ID = –250 µA
1.2
1.1
1
0.9
0.8
0.7
0.6
–50
8
4
–IS, SOURCE CURRENT (AMPS)
VGS(th), GATE THRESHOLD VOLTAGE
(NORMALIZED)
0
–25
0
25
50
75
100
125
150
VGS = 0 V
3
TJ = 150°C
2
TJ = 25°C
1
0
0.3
0.4
0.5
0.6
0.7
0.8
0.9
TJ, JUNCTION TEMPERATURE (°C)
–VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 9. Gate Threshold Voltage Variation
with Temperature
Figure 10. Diode Forward Voltage vs. Current
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4
1
NTGS3443T1
TYPICAL ELECTRICAL CHARACTERISTICS
20
POWER (W)
16
12
8
4
0
0.01
0.10
1.00
10.00
100.00
TIME (sec)
NORMALIZED EFFECTIVE TRANSIENT
THERMAL IMPEDANCE
Figure 11. Single Pulse Power
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
1E–04
Single Pulse
1E–03
1E–02
1E–01
1E+00
1E+01
1E+02
SQUARE WAVE PULSE DURATION (sec)
Figure 12. Normalized Thermal Transient Impedance, Junction–to–Ambient
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5
1E+03
NTGS3443T1
INFORMATION FOR USING THE TSOP–6 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.094
2.4
0.037
0.95
0.074
1.9
0.037
0.95
0.028
0.7
0.039
1.0
inches
mm
SOLDERING PRECAUTIONS
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
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NTGS3443T1
PACKAGE DIMENSIONS
TSOP–6
CASE 318G–02
ISSUE G
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
L
6
S
1
5
4
2
3
B
D
G
M
J
C
0.05 (0.002)
H
K
DIM
A
B
C
D
G
H
J
K
L
M
S
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.05
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.55
0
10 2.50
3.00
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
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7
DRAIN
DRAIN
GATE
SOURCE
DRAIN
DRAIN
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0610
0
10 0.0985 0.1181
NTGS3443T1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
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Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: [email protected]
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Email: [email protected]
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Toll Free from Hong Kong & Singapore:
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4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: [email protected]
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
*Available from Germany, France, Italy, UK, Ireland
For additional information, please contact your local
Sales Representative.
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NTGS3443T1/D