150 mA, Low Dropout,
CMOS Linear Regulator
ADP1710/ADP1711
FEATURES
TYPICAL APPLICATION CIRCUITS
ADP1710
VIN = 5V
VOUT = 3.3V
1
IN
2
GND
3
EN
OUT
5
1µF
1µF
NC
06310-001
4
NC = NO CONNECT
Figure 1. ADP1710 with Fixed Output Voltage, 3.3 V
ADP1710
ADJUSTABLE
VIN = 5.5V
VOUT = 0.8V(1 + R1/R2)
1
IN
2
GND
3
EN
OUT
5
1µF
1µF
R1
ADJ
4
Figure 2. ADP1710 with Adjustable Output Voltage, 0.8 V to 5.0 V
ADP1711
VIN = 5V
APPLICATIONS
Mobile phones
Digital camera and audio devices
Portable and battery-powered equipment
Post dc-dc regulation
06310-002
R2
VOUT = 3.3V
1
IN
2
GND
OUT
5
1µF
1µF
10nF
3
EN
BYP
4
06310-003
Maximum output current: 150 mA
Input voltage range: 2.5 V to 5.5 V
Light load efficient
IGND = 35 μA with zero load
IGND = 40 μA with 100 μA load
Low shutdown current: <1 μA
Low dropout voltage: 150 mV @ 150 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±2%
Stable with small 1μF ceramic output capacitor
16 fixed output voltage options: 0.75 V to 3.3 V (ADP1710)
Adjustable output voltage option: 0.8 V to 5.0 V
(ADP1710 Adjustable)
16 fixed output voltage options with reference bypass:
0.75 V to 3.3 V (ADP1711)
High PSRR: 69 dB @ 1 kHz
Low noise: 40 μVRMS
Excellent load/line transient response
Current limit and thermal overload protection
Logic controlled enable
5-lead TSOT package
Figure 3. ADP1711 with Fixed Output Voltage and Bypass Capacitor, 3.3 V
GENERAL DESCRIPTION
The ADP1710/ADP1711 are low dropout linear regulators
that operate from 2.5 V to 5.5 V and provide up to 150 mA of
output current. Utilizing a novel scaling architecture, ground
current drawn is a very low 40 μA, when driving a 100 μA
load, making the ADP1710/ADP1711 ideal for batteryoperated portable equipment.
The ADP1710/ADP1711 are optimized for stable operation with
small 1 μF ceramic output capacitors, allowing for good transient
performance while occupying minimal board space. An enable
pin controls the output voltage on both devices. There is also an
under-voltage lockout circuit on both devices, which disables the
regulator if IN drops below a minimum threshold.
The ADP1710 and the ADP1711 are each available in sixteen
fixed output voltage options. The ADP1710 is also available in
an adjustable version, which allows output voltages that range
from 0.8 V to 5 V via an external divider. The ADP1711 allows
for a reference bypass capacitor to be connected, which reduces
output voltage noise and improves power supply rejection.
An internal soft start gives a typical start-up time of 80 μs.
Short-circuit protection and thermal overload protection
circuits prevent damage to the devices in adverse conditions.
Both the ADP1710 and the ADP1711 are available in tiny
5lead TSOT packages, for the smallest footprint solution to all
your power needs.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADP1710/ADP1711
TABLE OF CONTENTS
Features .............................................................................................. 1
Enable Feature ...............................................................................8
Applications....................................................................................... 1
Undervoltage Lockout (UVLO) ..................................................9
Typical Application Circuits............................................................ 1
Application Information................................................................ 10
General Description ......................................................................... 1
Capacitor Selection .................................................................... 10
Revision History ............................................................................... 2
Current Limit and Thermal Overload Protection ................. 10
Specifications..................................................................................... 3
Thermal Considerations............................................................ 11
Absolute Maximum Ratings............................................................ 4
Printed Circuit Board Layout Considerations ....................... 12
Thermal Resistance ...................................................................... 4
Outline Dimensions ....................................................................... 13
ESD Caution.................................................................................. 4
Ordering Guide .......................................................................... 14
Pin Configurations and Function Descriptions ........................... 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ........................................................................ 8
Adjustable Output Voltage (ADP1710 Adjustable) ................. 8
Bypass Capacitor (ADP1711) ..................................................... 8
REVISION HISTORY
10/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADP1710/ADP1711
SPECIFICATIONS
VIN = (VOUT + 0.5 V) or 2.5 V (whichever is greater), IOUT = 1 mA, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
OPERATING SUPPLY CURRENT
Symbol
VIN
IGND
SHUTDOWN CURRENT
IGND-SD
FIXED OUTPUT VOLTAGE ACCURACY
(ADP1710 AND ADP1711)
ADJUSTABLE OUTPUT VOLTAGE
ACCURACY (ADP1710 ADJUSTABLE) 1
LINE REGULATION
LOAD REGULATION 2
VOUT
DROPOUT VOLTAGE 3
VDROPOUT
VOUT
∆VOUT/∆VIN
∆VOUT/∆IOUT
START-UP TIME 4
ADP1710
ADP1711
CURRENT LIMIT THRESHOLD 5
THERMAL SHUTDOWN THRESHOLD
ILIMIT
TSSD
THERMAL SHUTDOWN HYSTERESIS
TSSD-HYS
UVLO ACTIVE THRESHOLD
UVLO INACTIVE THRESHOLD
UVLO HYSTERESIS
EN INPUT LOGIC HIGH
EN INPUT LOGIC LOW
EN INPUT LEAKAGE CURRENT
ADJ INPUT BIAS CURRENT
(ADP1710 ADJUSTABLE)
OUTPUT NOISE
ADP1710
ADP1711
POWER SUPPLY REJECTION RATIO
ADP1710
ADP1711
UVLOACTIVE
UVLOINACTIVE
UVLOHYS
VIH
VIL
VI-LEAKAGE
Conditions
TJ = –40°C to +125°C
IOUT = 0 μA
IOUT = 0 μA, TJ = –40°C to +125°C
IOUT = 100 μA
IOUT = 100 μA, TJ = –40°C to +125°C
IOUT = 100 mA
IOUT = 100 mA, TJ = –40°C to +125°C
IOUT = 150 mA
IOUT = 150 mA, TJ = –40°C to +125°C
EN = GND
EN = GND, TJ = –40°C to +125°C
IOUT = 1 mA
100 μA < IOUT < 150 mA, TJ = –40°C to +125°C
IOUT = 1 mA
100 μA < IOUT < 150 mA, TJ = –40°C to +125°C
VIN = (VOUT + 0.5 V) to 5.5 V, TJ = –40°C to +125°C
IOUT = 10 mA to 150 mA
IOUT = 10 mA to 150 mA, TJ = –40°C to +125°C
IOUT = 100 mA, VOUT ≥ 3.0 V
IOUT = 100 mA, VOUT ≥ 3.0 V, TJ = –40°C to +125°C
IOUT = 150 mA, VOUT ≥ 3.0 V
IOUT = 150 mA, VOUT ≥ 3.0 V, TJ = –40°C to +125°C
IOUT = 100 mA, 2.5 V ≤ VOUT < 3.0 V
IOUT = 100 mA, 2.5 V ≤ VOUT < 3.0 V, TJ = –40°C to +125°C
IOUT = 150 mA, 2.5 V ≤ VOUT < 3.0 V
IOUT = 150 mA, 2.5 V ≤ VOUT < 3.0 V, TJ = –40°C to +125°C
Min
2.5
Typ
Max
5.5
300
Unit
V
μA
μA
μA
μA
μA
μA
mA
mA
μA
μA
%
%
V
V
%/ V
%/mA
%/mA
mV
mV
mV
mV
mV
mV
mV
mV
360
μs
μs
mA
35
50
40
80
665
860
1
1.3
0.1
–1
–2
0.792
0.784
–0.1
0.8
1.0
+1
+2
0.808
0.816
+0.1
0.002
0.004
100
175
150
250
120
200
180
TSTART-UP
With 10 nF bypass capacitor
180
TJ rising
80
100
270
150
°C
0.1
0.4
1
°C
V
V
mV
V
V
μA
30
100
nA
15
VIN falling
VIN rising
1.95
2.45
250
2.5 V ≤ VIN ≤ 5.5 V
2.5 V ≤ VIN ≤ 5.5 V
EN = IN or GND
ADJI-BIAS
OUTNOISE
1.8
10 Hz to 100 kHz, VOUT = 3.3 V
10 Hz to 100 kHz, VOUT = 0.75 V, with 10 nF bypass capacitor
330
40
μVrms
μVrms
1 kHz, VOUT = 3.3 V
1 kHz, VOUT = 0.75 V, with 10 nF bypass capacitor
58
69
dB
dB
PSRR
1
Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
2
Based on an end-point calculation using 10 mA and 150 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
4
Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
Rev. 0 | Page 3 of 16
ADP1710/ADP1711
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 2.
Parameter
IN to GND
OUT to GND
EN to GND
ADJ/BYP to GND
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
–0.3 V to +6 V
–0.3 V to IN
–0.3 V to +6 V
–0.3 V to +6 V
–65°C to +150°C
–40°C to +125°C
JEDEC J-STD-020
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
5-Lead TSOT
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 4 of 16
θJA
170
Unit
°C/W
ADP1710/ADP1711
ADP1710
5 OUT
IN 1
FIXED
GND 2
5
IN 1
OUT
GND 2
GND 2
4 NC
NC = NO CONNECT
EN 3
06310-004
EN 3
TOP VIEW
(Not to Scale)
ADP1710
ADJUSTABLE
Figure 4. 5-Lead TSOT (UJ-Suffix)
TOP VIEW
(Not to Scale)
4
ADJ
06310-005
IN 1
Figure 5. 5-Lead TSOT (UJ-Suffix)
EN 3
ADP1711
5
OUT
4
BYP
TOP VIEW
(Not to Scale)
06310-006
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 6. 5-Lead TSOT (UJ-Suffix)
Table 4. Pin Function Descriptions
ADP1710
Fixed
Pin No.
1
2
3
ADP1710
Adjustable
Pin No.
1
2
3
ADP1711
Pin No.
1
2
3
Mnemonic
IN
GND
EN
4
NC
ADJ
BYP
5
OUT
4
4
5
5
Description
Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the
regulator. For automatic startup, connect EN to IN.
No Connect.
Adjust. A resistor divider from OUT to ADJ sets the output voltage.
Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND
to reduce the internal reference noise for low noise applications.
Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor.
Rev. 0 | Page 5 of 16
ADP1710/ADP1711
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.8 V, IOUT = 1 mA, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
3.34
1100
3.33
1000
3.32
900
3.31
800
ILOAD = 150mA
ILOAD = 10mA
700
ILOAD = 1mA
3.29
IGND (µA)
ILOAD = 100µA
3.28
3.27
500
400
ILOAD = 50mA
3.26
ILOAD = 100mA
600
ILOAD = 100mA
3.25
ILOAD = 50mA
300
200
ILOAD = 150mA
ILOAD = 10mA
ILOAD = 1mA
ILOAD = 100µA
100
3.24
3.23
–5
25
85
06310-007
0
–40
125
TJ (°C)
–5
–40
25
85
06310-010
VOUT (V)
3.30
125
TJ (°C)
Figure 7. Output Voltage vs. Junction Temperature
Figure 10. Ground Current vs. Junction Temperature
1100
3.32
1000
3.31
900
800
700
IGND (µA)
VOUT (V)
3.30
3.29
600
500
400
3.28
300
200
3.27
10
100
1000
ILOAD (mA)
0
0.1
06310-008
1
1
10
1000
100
ILOAD (mA)
Figure 8. Output Voltage vs. Load Current
06310-011
100
3.26
0.1
Figure 11. Ground Current vs. Load Current
3.32
1500
1400
3.31
1300
ILOAD = 100µA
ILOAD = 1mA
1200
ILOAD = 10mA
1100
IGND (µA)
1000
3.29
3.28
ILOAD = 150mA
900
800
ILOAD = 100mA
700
600
500
ILOAD = 50mA
ILOAD = 100mA
ILOAD = 50mA
400
ILOAD = 150mA
300
3.27
200
ILOAD = 10mA
ILOAD = 1mA
ILOAD = 100µA
3.26
3.3
3.8
4.3
4.8
VIN (V)
5.3
0
3.3
3.8
4.3
4.8
VIN (V)
Figure 9. Output Voltage vs. Input Voltage
Figure 12. Ground Current vs. Input Voltage
Rev. 0 | Page 6 of 16
5.3
06310-012
100
06310-009
VOUT (V)
3.30
0
160
–10
140
–20
120
–30
PSRR (dB)
180
80
–50
–60
40
–70
20
–80
1
10
1000
100
ILOAD (mA)
–90
10
3.35
0
3.30
–10
–20
100
1k
PSRR (dB)
3.15
ILOAD = 100µA
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 50mA
ILOAD = 100mA
ILOAD = 150mA
3.10
3.05
10k
100k
1M
10M
VRIPPLE = 50mV
VIN = 5V
VOUT = 3.3V
COUT = 1µF
–30
3.20
ILOAD = 10mA
ILOAD = 50mA
–40
–50
–60
ILOAD = 100µA
–70
3.00
–80
3.3
3.4
3.6
3.5
VIN (V)
–90
10
06310-014
2.95
3.2
6
5
ILOAD = 150mA
4
ILOAD = 100mA
3
ILOAD =
10mA
ILOAD =
50mA
1
3.30
3.35
3.40
3.45
3.50
3.55
VIN (V)
3.60
06310-015
ILOAD =
100µA
3.25
10k
100k
1M
10M
FREQUENCY (Hz)
7
ILOAD =
1mA
1k
Figure 17. ADP1710 Power Supply Rejection Ratio vs. Frequency
Figure 14. Output Voltage vs. Input Voltage (in Dropout)
2
100
Figure 15. Ground Current vs. Input Voltage (In Dropout)
Rev. 0 | Page 7 of 16
06310-017
VOUT (V)
ILOAD = 100µA
Figure 16. ADP1711 Power Supply Rejection Ratio vs. Frequency
(10 nF Bypass Capacitor)
3.25
IGND (mA)
ILOAD =
10mA
FREQUENCY (Hz)
Figure 13. Dropout Voltage vs. Load Current
0
3.20
ILOAD = 50mA
–40
60
0
0.1
VRIPPLE = 50mV
VIN = 5V
VOUT = 0.75V
COUT = 1µF
06310-016
100
06310-013
VDROPOUT (mV)
ADP1710/ADP1711
ADP1710/ADP1711
THEORY OF OPERATION
The ADP1710/ADP1711 are low dropout, CMOS linear
regulators that use an advanced, proprietary architecture to
provide high power supply rejection ratio (PSRR) and excellent
line and load transient response with just a small 1 μF ceramic
output capacitor. Both devices operate from a 2.5 V to 5.5 V
input rail and provide up to 150 mA of output current.
Incorporating a novel scaling architecture, ground current is
very low when driving light loads. Ground current in shutdown
mode is typically 100 nA.
OUT
IN
ADJUSTABLE OUTPUT VOLTAGE
(ADP1710 ADJUSTABLE)
The ADP1710 adjustable version can have its output voltage
set over a 0.8 V to 5.0 V range. The output voltage is set by
connecting a resistive voltage divider from OUT to ADJ. The
output voltage is calculated using the equation
VOUT = 0.8 V (1 + R1/R2)
(1)
where:
R1 is the resistor from OUT to ADJ.
R2 is the resistor from ADJ to GND.
The maximum bias current into ADJ is 100 nA, so for less
than 0.5% error due to the bias current, use values less than
60 kΩ for R2.
CURRENT LIMIT
THERMAL PROTECT
+
BYPASS CAPACITOR (ADP1711)
EN
NC = NO CONNECT
06310-018
REFERENCE
GND
Figure 18. Internal Block Diagram
Internally, the ADP1710/ADP1711 each consist of a reference,
an error amplifier, a feedback voltage divider, and a PMOS pass
transistor. Output current is delivered via the PMOS pass
device, which is controlled by the error amplifier. The error
amplifier compares the reference voltage with the feedback
voltage from the output and amplifies the difference. If the
feedback voltage is lower than the reference voltage, the gate of
the PMOS device is pulled lower, allowing more current to pass
and increasing the output voltage. If the feedback voltage is
higher than the reference voltage, the gate of the PMOS device
is pulled higher, allowing less current to pass and decreasing the
output voltage.
The ADP1711 allows for an external bypass capacitor to be
connected to the internal reference, which reduces output
voltage noise and improves power supply rejection. A low
leakage capacitor of 1 nF or greater (10 nF is recommended)
must be connected between the BYP and GND pins.
ENABLE FEATURE
The ADP1710/ADP1711 use the EN pin to enable and disable
the OUT pin under normal operating conditions. As shown in
Figure 19, when a rising voltage on EN crosses the active
threshold, OUT turns on. When a falling voltage on EN crosses
the inactive threshold, OUT turns off.
The ADP1710 is available in two versions, one with fixed output
voltage options and one with an adjustable output voltage. The
fixed output voltage option is set internally to one of sixteen
values between 0.75 V and 3.3 V, using an internal feedback
network. The adjustable output voltage can be set to between 0.8
V and 5.0 V by an external voltage divider connected from OUT
to ADJ. The ADP1711 is available with fixed output voltage
options and features a bypass pin, which allows an external
capacitor to be connected, which reduces internal reference
noise. All devices are controlled by an enable pin (EN).
Rev. 0 | Page 8 of 16
EN
2
OUT
VIN = 5V
VOUT = 1.6V
CIN = 1µF
COUT = 1µF
ILOAD = 10mA
TIME (1ms/DIV)
Figure 19. ADP1710 Adjustable Typical EN Pin Operation
06310-019
NC/
ADJ/
BYP
CH1, CH2 (500mV/DIV)
SHUTDOWN
AND UVLO
ADP1710/ADP1711
As can be seen, the EN pin has hysteresis built in. This prevents
on/off oscillations that can occur due to noise on the EN pin as
it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the IN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 20 shows typical EN active/inactive thresholds
when the input voltage varies from 2.5 V to 5.5 V.
UNDERVOLTAGE LOCKOUT (UVLO)
The ADP1710/ADP1711 have an undervoltage lockout circuit,
which monitors the voltage on the IN pin. When the voltage on
IN drops below 1.95 V (minimum), the circuit activates, disabling
the OUT pin.
1.4
1.2
EN ACTIVE
1.1
HYSTERESIS
1.0
0.9
0.8
0.7
EN INACTIVE
0.6
0.5
2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50
VIN (V)
06310-020
TYPICAL EN THRESHOLDS (V)
1.3
Figure 20. Typical EN Pin Thresholds vs. Input Voltage
Rev. 0 | Page 9 of 16
ADP1710/ADP1711
APPLICATION INFORMATION
CAPACITOR SELECTION
Input Bypass Capacitor
Output Capacitor
Connecting a 1 μF capacitor from IN to GND reduces the
circuit sensitivity to printed circuit board (PCB) layout,
especially when long input traces or high source impedance are
encountered. If greater than 1 μF of output capacitance is
required, the input capacitor should be increased to match it.
The ADP1710/ADP1711 are designed for operation with small,
space-saving ceramic capacitors, but they will function with most
commonly used capacitors as long as care is taken about the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum of
1 μF capacitance with an ESR of 500 mΩ or less is recommended
to ensure stability of the ADP1710/ADP1711. Transient response
to changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP1710/ADP1711 to large changes in load
current. Figure 21 and Figure 22 show the transient responses for
output capacitance values of 1 μF and 22 μF, respectively.
VIN = 5V
VOUT = 3.3V
CIN = 1µF
COUT = 1µF
TIME (4µs/DIV)
VOUT RESPONSE TO LOAD STEP
FROM 7.5mA TO 142.5mA
TIME (4µs/DIV)
Figure 22. Output Transient Response, COUT = 22 μF
06310-022
1
VIN = 5V
VOUT = 3.3V
CIN = 22µF
COUT = 22µF
The ADP1710/ADP1711 are protected against damage due to
excessive power dissipation by current and thermal overload
protection circuits. The ADP1710/ADP1711 are designed to
current limit when the output load reaches 270 mA (typical).
When the output load exceeds 270 mA, the output voltage is
reduced to maintain a constant current limit.
Thermal overload protection is included, which limits the
junction temperature to a maximum of 150°C (typical). Under
extreme conditions (that is, high ambient temperature and
power dissipation) when the junction temperature starts to rise
above 150°C, the output is turned off, reducing the output
current to zero. When the junction temperature drops below
135°C, the output is turned on again and output current is
restored to its nominal value.
Figure 21. Output Transient Response, COUT = 1 μF
10mV/DIV
Any good quality ceramic capacitors can be used with the
ADP1710/ADP1711, as long as they meet the minimum
capacitance and maximum ESR requirements. Ceramic
capacitors are manufactured with a variety of dielectrics, each
with different behavior over temperature and applied voltage.
Capacitors must have a dielectric adequate to ensure the
minimum capacitance over the necessary temperature range
and dc bias conditions. X5R or X7R dielectrics with a voltage
rating of 6.3 V or 10 V are recommended. Y5V and Z5U
dielectrics are not recommended, due to their poor temperature
and dc bias characteristics.
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
1
06310-021
10mV/DIV
VOUT RESPONSE TO LOAD STEP
FROM 7.5mA TO 142.5mA
Input and Output Capacitor Properties
Consider the case where a hard short from OUT to ground
occurs. At first the ADP1710/ADP1711 current limits, so that
only 270 mA is conducted into the short. If self heating of the
junction is great enough to cause its temperature to rise above
150°C, thermal shutdown activates, turning off the output and
reducing the output current to zero. As the junction
temperature cools and drops below 135°C, the output turns on
and conducts 270 mA into the short, again causing the
junction temperature to rise above 150°C. This thermal
oscillation between 135°C and 150°C causes a current
oscillation between 270 mA and 0 mA, which continues as
long as the short remains at the output.
Rev. 0 | Page 10 of 16
ADP1710/ADP1711
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.
140
MAX TJ (DO NOT OPERATE ABOVE THIS POINT)
120
100
20
1mA
10mA
0
0.5
1.0
30mA
80mA
1.5
2.0
100mA
125mA
2.5
3.0
150mA
(LOAD CURRENT)
3.5
4.0
4.5
5.0
VIN – VOUT (V)
Figure 23. 500 mm2 of PCB Copper, TA = 25°C
140
MAX TJ (DO NOT OPERATE ABOVE THIS POINT)
120
θJA (°C/W)
170
152
146
134
131
TJ (°C)
100
60
40
Device soldered to minimum size pin traces.
20
1mA
10mA
0
0.5
(2)
2.0
2.5
3.0
150mA
(LOAD CURRENT)
3.5
4.0
4.5
5.0
5.0
Figure 24. 100 mm2 of PCB Copper, TA = 25°C
TA is the ambient temperature.
PD is the power dissipation in the die, given by
140
MAX TJ (DO NOT OPERATE ABOVE THIS POINT)
120
(3)
100
where:
TJ (°C)
ILOAD is the load current.
IGND is the ground current.
VIN and VOUT are the input voltage and output voltage,
respectively.
80
60
40
Power dissipation due to ground current is quite small and can
be ignored. Therefore, the junction temperature equation
simplifies to the following:
TJ = TA + {[(VIN – VOUT) × ILOAD] × θJA}
1.5
100mA
125mA
VIN – VOUT (V)
where:
PD = [(VIN – VOUT) × ILOAD] + (VIN × IGND)
1.0
30mA
80mA
06310-024
The junction temperature of the ADP1710/ADP1711 can be
calculated from the following equation:
TJ = TA + (PD × θJA)
80
06310-025
1
60
40
Table 5.
Copper Size (mm2)
01
50
100
300
500
80
06310-023
To guarantee reliable operation, the junction temperature of the
ADP1710/ADP1711 must not exceed 125°C. To ensure the
junction temperature stays below this maximum value, the user
needs to be aware of the parameters that contribute to junction
temperature changes. These parameters include ambient
temperature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θJA). The θJA
number is dependent on the package assembly compounds used
and the amount of copper to which the GND pins of the package
are soldered on the PCB. Table 5 shows typical θJA values of the
5lead TSOT package for various PCB copper sizes.
TJ (°C)
THERMAL CONSIDERATIONS
(4)
As shown in Equation 4, for a given ambient temperature, input
to output voltage differential, and continuous load current,
there exists a minimum copper size requirement for the PCB to
ensure the junction temperature does not rise above 125°C. The
following figures show junction temperature calculations for
different ambient temperatures, load currents, VIN to VOUT
differentials, and areas of PCB copper.
Rev. 0 | Page 11 of 16
20
1mA
10mA
0
0.5
1.0
30mA
80mA
1.5
2.0
100mA
125mA
2.5
3.0
150mA
(LOAD CURRENT)
3.5
4.0
VIN – VOUT (V)
Figure 25. 0 mm2 of PCB Copper, TA = 25°C
4.5
ADP1710/ADP1711
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
140
MAX TJ (DO NOT OPERATE ABOVE THIS POINT)
120
Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP1710/
ADP1711. However, as can be seen from Table 5, a point of
diminishing returns eventually is reached, beyond which an
increase in the copper size does not yield significant heat
dissipation benefits.
TJ (°C)
100
80
60
40
20
1.0
30mA
80mA
1.5
2.0
100mA
125mA
2.5
3.0
150mA
(LOAD CURRENT)
3.5
4.0
4.5
5.0
VIN – VOUT (V)
06310-026
1mA
10mA
0
0.5
Figure 26. 500 mm2 of PCB Copper, TA = 50°C
Place the input capacitor as close as possible to the IN and GND
pins. Place the output capacitor as close as possible to the OUT
and GND pins. For ADP1711, place the internal reference
bypass capacitor as close as possible to the BYP pin. Use of 0402
or 0603 size capacitors and resistors achieves the smallest
possible footprint solution on boards where area is limited.
GND (BOTTOM)
140
MAX TJ (DO NOT OPERATE ABOVE THIS POINT)
GND (TOP)
120
TJ (°C)
100
80
ADP1710/
ADP1711
C1
60
C2
40
20
IN
0
0.5
1.0
30mA
80mA
1.5
2.0
100mA
125mA
2.5
3.0
OUT
150mA
(LOAD CURRENT)
3.5
4.0
4.5
5.0
VIN – VOUT (V)
06310-027
1mA
10mA
Figure 27. 100 mm2 of PCB Copper, TA = 50°C
C3
R1
EN
140
R2
06310-029
MAX TJ (DO NOT OPERATE ABOVE THIS POINT)
120
Figure 29. Example PCB Layout
80
60
40
20
1mA
10mA
0
0.5
1.0
30mA
80mA
1.5
2.0
100mA
125mA
2.5
3.0
150mA
(LOAD CURRENT)
3.5
4.0
VIN – VOUT (V)
4.5
5.0
06310-028
TJ (°C)
100
Figure 28. 0 mm2 of PCB Copper, TA = 50°C
Rev. 0 | Page 12 of 16
ADP1710/ADP1711
OUTLINE DIMENSIONS
2.90 BSC
5
4
2.80 BSC
1.60 BSC
1
2
3
PIN 1
0.95 BSC
1.90
BSC
*0.90
0.87
0.84
*1.00 MAX
0.10 MAX
0.50
0.30
0.20
0.08
SEATING
PLANE
8°
4°
0°
0.60
0.45
0.30
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 30. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions show in millimeters
Rev. 0 | Page 13 of 16
ADP1710/ADP1711
ORDERING GUIDE
Model
ADP1710AUJZ-0.75R71
ADP1710AUJZ-0.8-R71
ADP1710AUJZ-0.85R71
ADP1710AUJZ-0.9-R71
ADP1710AUJZ-0.95R71
ADP1710AUJZ-1.0-R71
ADP1710AUJZ-1.05R71
ADP1710AUJZ-1.10R71
ADP1710AUJZ-1.15R71
ADP1710AUJZ-1.2-R71
ADP1710AUJZ-1.3-R71
ADP1710AUJZ-1.5-R71
ADP1710AUJZ-1.8-R71
ADP1710AUJZ-2.5-R71
ADP1710AUJZ-3.0-R71
ADP1710AUJZ-3.3-R71
ADP1710AUJZ-R71
ADP1711AUJZ-0.75R7 1
ADP1711AUJZ-0.8-R71
ADP1711AUJZ-0.85R71
ADP1711AUJZ-0.9-R71
ADP1711AUJZ-0.95R71
ADP1711AUJZ-1.0-R71
ADP1711AUJZ-1.05R71
ADP1711AUJZ-1.10R71
ADP1711AUJZ-1.15R71
ADP1711AUJZ-1.2-R71
ADP1711AUJZ-1.3-R71
ADP1711AUJZ-1.5-R71
ADP1711AUJZ-1.8-R71
ADP1711AUJZ-2.5-R71
ADP1711AUJZ-3.0-R71
ADP1711AUJZ-3.3-R71
1
Temperature
Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
Output
Voltage (V)
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.30
1.50
1.80
2.50
3.00
3.30
0.8 to 5.0
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.30
1.50
1.80
2.50
3.00
3.30
Z = Pb-free part.
Rev. 0 | Page 14 of 16
Package
Description
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
Package
Option
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
Branding
L4S
L0D
L40
L41
L42
L0E
L43
L47
L44
L45
L46
L0F
L0G
L0H
L0J
L0K
L0L
L4T
L0M
L48
L49
L4A
L0N
L4C
L4G
L4D
L4E
L4F
L0P
L0Q
L0R
L0S
L0U
ADP1710/ADP1711
NOTES
Rev. 0 | Page 15 of 16
ADP1710/ADP1711
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06310-0-10/06(0)
Rev. 0 | Page 16 of 16