AD AD713

a
Quad Precision, Low Cost,
High Speed, BiFET Op Amp
AD713
FEATURES
Enhanced Replacement for LF347 and TL084
CONNECTION DIAGRAMS
AC PERFORMANCE
1 ms Settling to 0.01% for 10 V Step
20 V/ms Slew Rate
0.0003% Total Harmonic Distortion (THD)
4 MHz Unity Gain Bandwidth
DC PERFORMANCE
0.5 mV max Offset Voltage (AD713K)
20 mV/°C max Drift (AD713K)
200 V/mV min Open Loop Gain (AD713K)
2 mV p-p typ Noise, 0.1 Hz to 10 Hz
True 14-Bit Accuracy
Single Version: AD711, Dual Version: AD712
Available in 16-Pin SOIC, 14-Pin Plastic DIP and
Hermetic Cerdip Packages
Standard Military Drawing Available
Plastic (N) and
Cerdip (Q) Packages
SOIC (R) Package
OUTPUT
OUTPUT
1
–IN
2
+IN
+VS
+IN
1
4
4
AD713
(TOP VIEW)
5
–IN
6
OUTPUT
7
2
3
2
–IN
13 –IN
+IN
3
+VS
4
12 +IN
3
1
14 OUTPUT
4
AD713
16
OUTPUT
15
–IN
14
+IN
13
–VS
(TOP VIEW)
11 –VS
+IN
5
10 +IN
–IN
6
9
–IN
OUTPUT
8
OUTPUT
NC
1
12
+IN
11
–IN
7
10
OUTPUT
8
9
NC
2
3
NC = NO CONNECT
APPLICATIONS
Active Filters
Quad Output Buffers for 12- and 14-Bit DACs
Input Buffers for Precision ADCs
Photo Diode Preamplifier Application
The AD713 is offered in a 16-pin SOIC, 14-pin plastic DIP and
hermetic cerdip package.
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD713 is a quad operational amplifier, consisting of four
AD711 BiFET op amps. These precision monolithic op amps
offer excellent dc characteristics plus rapid settling times, high
slew rates, and ample bandwidths. In addition, the AD713
provides the close matching ac and dc characteristics inherent
to amplifiers sharing the same monolithic die.
1. The AD713 is a high speed BiFET op amp that offers excellent
performance at competitive prices. It upgrades the performance of circuits using op amps such as the TL074, TL084,
LT1058, LF347 and OPA404.
The single-pole response of the AD713 provides fast settling:
l µs to 0.01%. This feature, combined with its high dc precision,
makes the AD713 suitable for use as a buffer amplifier for 12or 14-bit DACs and ADCs. It is also an excellent choice for use
in active filters in 12-, 14- and 16-bit data acquisition systems.
Furthermore, the AD713’s low total harmonic distortion (THD)
level of 0.0003% and very close matching ac characteristics
make it an ideal amplifier for many demanding audio applications.
3. The combination of Analog Devices’ advanced processing
technology, laser wafer drift trimming and well-matched
ion-implanted JFETs provides outstanding dc precision.
Input offset voltage, input bias current and input offset current are specified in the warmed-up condition and are 100%
tested.
The AD713 is internally compensated for stable operation at
unity gain and is available in seven performance grades. The
AD713J and AD713K are rated over the commercial temperature
range of 0°C to 70°C. The AD713A and AD713B are rated
over the industrial temperature of –40°C to +85°C. The
AD713S and AD713T are rated over the military temperature
range of –55°C to +125°C and are available processed to
standard microcircuit drawings.
2. Slew rate is 100% tested for a guaranteed minimum of
16 V/µs (J, A and S Grades).
4. Very close matching of ac characteristics between the four
amplifiers makes the AD713 ideal for high quality active filter
applications.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
AD713–SPECIFICATIONS (V = ⴞ15 V @ T = 25ⴗC unless otherwise noted)
S
Parameter
INPUT OFFSET VOLTAGE
Initial Offset
Offset
vs. Temp
vs. Supply
Conditions
A
Min
AD713J/A/S
Typ
Max
Min
AD713K/B/T
Typ
Max
Unit
1
TMIN to TMAX
TMIN to TMAX
78
76/76/76
Long-Term Stability
0.3
0.5
5
95
95
15
1.5
2/2/2
0.2
0.4
5
100
100
15
0.5
mV
0.7/0.7/1.0 mV
20/20/15
µV/°C
dB
dB
µV/Month
150
3.4/9.6/154
200
40
75
1.7/4.8/77
120
pA
nA
pA
84
84
INPUT BIAS CURRENT2
VCM = 0 V
VCM = 0 V @ TMAX
VCM = ± 10 V
40
INPUT OFFSET CURRENT
VCM = 0 V
VCM = 0 V @ TMAX
10
75
1.7/4.8/77
10
35
0.8/2.2/36
pA
nA
0.5
0.7
8
10
1.8
2.3/2.3/2.3
0.4
0.6
6
10
0.8
1.0/1.0/1.3
25
35
–130
–95
mV
mV
µV/°C
pA
dB
dB
55
MATCHING CHARACTERISTICS
Input Offset Voltage
TMIN to TMAX
Input Offset Voltage Drift
Input Bias Current
Crosstalk
FREQUENCY RESPONSE
Small Signal Bandwidth
Full Power Response
Slew Rate
Settling Time to 0.01%
Total Harmonic Distortion
f = 1 kHz
f = 100 kHz
Unity Gain
VO = 20 V p-p
Unity Gain
3.0
16
f = 1 kHz; RL ≥ 2 kΩ;
VO = 3 V rms
4.0
200
20
1.0
0.0003
55
100
–130
–95
3.4
18
1.2
4.0
200
20
1.0
0.0003
1.2
MHz
kHz
V/µs
µs
%
INPUT IMPEDANCE
Differential
Common Mode
3×1012储5.5
3×1012储5.5
3×1012储5.5
3×1012储5.5
Ω储pF
Ω储pF
INPUT VOLTAGE RANGE
Differential3
Common-Mode Voltage4
± 20
+14.5, –11.5
± 20
+14.5, –11.5
94
90
90
84
V
V
V
dB
dB
dB
dB
2
45
22
18
16
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
Common Mode
Rejection Ratio
INPUT VOLTAGE NOISE
TMIN to TMAX
VCM = ± 10 V
TMIN to TMAX
VCM = ± 11 V
TMIN to TMAX
–11
78
76/76/76
72
70/70/70
0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
+13
88
84
84
80
2
45
22
18
16
INPUT CURRENT NOISE
f = 1 kHz
OPEN-LOOP GAIN
VO = ± 10 V; RL ≥ 2 kΩ
TMIN to TMAX
150
100/100/100
RL ≥ 2 kΩ
TMIN to TMAX
Short Circuit
+13, –12.5
+13.9, –13.3
± 12/± 12/ⴞ12 +13.8, –13.1
25
OUTPUT CHARACTERISTICS
Voltage
Current
POWER SUPPLY
Rated Performance
Operating Range
Quiescent Current
TRANSISTOR COUNT
0.01
ⴞ4.5
400
± 15
10.0
# of Transistors
–11
84
82
78
74
120
200
100
+13
0.01
pA/√Hz
400
V/mV
V/mV
+13, –12.5 +13.9, –13.3
ⴞ12
+13.8, –13.1
25
ⴞ18
13.5
ⴞ4.5
± 15
10.0
V
V
mA
ⴞ18
12.0
V
V
mA
120
NOTES
1
Input Offset Voltage specifications are guaranteed after 5 minutes of operation at T A = 25°C.
2
Bias Current specifications are guaranteed maximum at either input after 5 minutes of operation at T A = 25°C. For higher temperatures, the current doubles every 10°C.
3
Defined as voltage between inputs, such that neither exceeds ± 10 V from ground.
4
Typically exceeding –14.1 V negative common-mode voltage on either input results in an output phase reversal.
Specifications subject to change without notice.
–2–
REV. C
AD713
ABSOLUTE MAXIMUM RATINGS 1, 2
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation2
Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Output Short-Circuit Duration
(For One Amplifier) . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and –VS
Storage Temperature Range (Q) . . . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD713J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
AD713A/B . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD713S/T . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Thermal Characteristics:
14-Pin Plastic Package:
θJC = 30°C/Watt; θJA = 100°C/Watt
14-Pin Cerdip Package:
θJC = 30°C/Watt; θJA = 110°C/Watt
16-Pin SOIC Package:
θJC = 30°C/
Watt; θJA = 100°C/Watt
3
For supply voltages less than ± 18 V, the absolute maximum input voltage is equal
to the supply voltage.
ORDERING GUIDE
Model
Temperature
Range
Package
Description
Package
Option1
AD713AQ
AD713BQ
AD713JN
AD713JR-16
AD713JR-16-REEL
AD713JR-16-REEL7
AD713KN
AD713SQ2
AD713TQ2
5962-9063301MCA
5962-9063302MCA2
–40°C to +85°C
–40°C to +85°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
14-Pin Ceramic DIP
14-Pin Ceramic DIP
14-Pin Plastic DIP
16-Pin Plastic SOIC
16-Pin Plastic SOIC
16-Pin Plastic SOIC
14-Pin Plastic DIP
14-Pin Ceramic DIP
14-Pin Ceramic DIP
14-Pin Ceramic DIP
14-Pin Ceramic DIP
Q-14
Q-14
N-14
R-16
R-16
R-16
N-14
Q-14
Q-14
Q-14
Q-14
1
N = Plastic DIP; Q = Cerdip; R = Small Outline IC (SOIC).
Not for new designs. Obsolete April 2002.
2
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD713 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
REV. C
–3–
WARNING!
ESD SENSITIVE DEVICE
AD713 –Typical Performance Characteristics
TPC 1. Input Voltage Swing vs.
Supply Voltage
TPC 4. Quiescent Current
vs. Supply Voltage
TPC 7. Input Bias Current
vs. Common Mode Voltage
TPC 2. Output Voltage Swing vs.
Supply Voltage
TPC 5. Input Bias Current
vs. Temperature
TPC 8. Short-Circuit Current Limit
vs. Temperature
–4–
TPC 3. Output Voltage Swing vs.
Load Resistance
TPC 6. Output Impedance vs.
Frequency, G = 1
TPC 9. Gain Bandwidth Product
vs. Temperature
REV. C
Typical Performance Characteristics–AD713
TPC 10. Open-Loop Gain and
Phase Margin vs. Frequency
TPC 11. Open-Loop Gain vs.
Supply Voltage
TPC 13. Common Mode Rejection
vs. Frequency
TPC 14. Large Signal Frequency
Response
TPC 16. Total Harmonic Distortion
vs. Frequency
TPC 17. Input Noise Voltage
Spectral Density
REV. C
–5–
TPC 12. Power Supply Rejection
vs. Frequency
TPC 15. Output Swing and
Error vs. Settling Time
TPC 18. Slew Rate vs. Input
Error Signal
AD713
TPC 19. Crosstalk Test Circuit
TPC 20. Crosstalk vs. Frequency
TPC 21a. Unity Gain Follower
TPC 21b. Unity Gain Follower
Pulse Response (Large Signal)
TPC 22b. Unity Gain Inverter
Pulse Response (Large Signal)
TPC 22a. Unity Gain Inverter
TPC 21c. Unity Gain Follower Pulse
Response (Small Signal)
TPC 22c. Unity Gain Inverter Pulse
Response (Small Signal)
–6–
REV. C
AD713
MEASURING AD713 SETTLING TIME
The photos of Figures 2 and 3 show the dynamic response of
the AD713 while operating in the settling time test circuit of
Figure 1. The input of the settling time fixture is driven by a
flat-top pulse generator. The error signal output from the false
summing node of A1, the AD713 under test, is clamped, amplified by op amp A2 and then clamped again.
The error signal is thus clamped twice: once to prevent overloading amplifier A2 and then a second time to avoid overloading the
oscilloscope preamp. A Tektronix oscilloscope preamp type 7A26
was carefully chosen because it recovers from the approximately
0.4 V overload quickly enough to allow accurate measurement
of the AD713’s 1 µs settling time. Amplifier A2 is a very high
speed FET input op amp; it provides a voltage gain of 10, amplifying the error signal output of the AD713 under test (providing
an overall gain of 5).
Figure 3. Settling Characteristics to –10 V Step.
Upper Trace: Output of AD713 Under Test (5 V/div).
Lower Trace: Amplified Error Voltage (0.01%/ div)
POWER SUPPLY BYPASSING
Figure 1. Settling Time Test Circuit
The power supply connections to the AD713 must maintain a
low impedance to ground over a bandwidth of 4 MHz or more.
This is especially important when driving a significant resistive
or capacitive load, since all current delivered to the load comes
from the power supplies. Multiple high quality bypass capacitors
are recommended for each power supply line in any critical
application. A 0.1 µF ceramic and a 1 µF electrolytic capacitor
as shown in Figure 4 placed as close as possible to the amplifier
(with short lead lengths to power supply common) will assure
adequate high frequency bypassing in most applications. A
minimum bypass capacitance of 0.1 µF should be used for any
application.
Figure 2. Settling Characteristics 0 V to +10 V Step.
Upper Trace: Output of AD713 Under Test (5 V/div).
Lower Trace: Amplified Error Voltage (0.01%/div)
REV. C
Figure 4. Recommended Power Supply Bypassing
–7–
AD713
A HIGH SPEED INSTRUMENTATION AMPLIFIER
CIRCUIT
A HIGH SPEED FOUR OP AMP CASCADED AMPLIFIER
CIRCUIT
The instrumentation amplifier circuit shown in Figure 5 can
provide a range of gains from unity up to 1000 and higher using
only a single AD713. The circuit bandwidth is 1.2 MHz at a
gain of 1 and 250 kHz at a gain of 10; settling time for the entire
circuit is less than 5 µs to within 0.01% for a 10 V step, (G = 10).
Other uses for amplifier A4 include an active data guard and an
active sense input.
Figure 7 shows how the four amplifiers of the AD713 may be
connected in cascade to form a high gain, high bandwidth amplifier. This gain of 100 amplifier has a –3 dB bandwidth greater
than 600 kHz.
Figure 7. A High Speed Four Op Amp Cascaded
Amplifier Circuit
Figure 5. A High Speed Instrumentation Amplifier Circuit
Table I provides a performance summary for this circuit. The
photo of Figure 6 shows the pulse response of this circuit for a
gain of 10.
Table I. Performance Summary for the High Speed
Instrumentation Amplifier Circuit
Gain
RG
Bandwidth
T Settle (0.01%)
1
2
10
NC
20 kΩ
4.04 kΩ
1.2 MHz
1.0 MHz
0.25 MHz
2 µs
2 µs
5 µs
Figure 8. THD Test Circuit
HIGH SPEED OP AMP APPLICATIONS AND
TECHNIQUES
DAC Buffers (I-to-V Converters)
The wide input dynamic range of JFET amplifiers makes them
ideal for use in both waveform reconstruction and digital-audio
DAC applications. The AD713, in conjunction with the AD1860
DAC, can achieve 0.0016% THD (here at a 4fs or a 176.4 kHz
update rate) without requiring the use of a deglitcher. Just such
a circuit is shown in Figure 9. The 470 pF feedback capacitor
used with IC2a, along with op amp IC2b and its associated
components, together form a 3-pole low-pass filter. Each or all
of these poles can be tailored for the desired attenuation and
phase characteristics required for a particular application. In this
application, one half of an AD713 serves each channel in a twochannel stereo system.
Figure 6. The Pulse Response of the High Speed
Instrumentation Amplifier. Gain = 10
–8–
REV. C
AD713
Figure 9. A D/A Converter Circuit for Digital Audio
Figure 11. The AD713 as an ADC Buffer
Figure 10. Harmonic Distortion as Frequency for the
Digital Audio Circuit of Figure 9
Driving the Analog Input of an A/D Converter
An op amp driving the analog input of an A/D converter, such
as that shown in Figure 11, must be capable of maintaining a
constant output voltage under dynamically changing load conditions. In successive approximation converters, the input current
is compared to a series of switched trial currents. The comparison point is diode clamped but may vary by several hundred
millivolts, resulting in high frequency modulation of the A/D
input current. The output impedance of a feedback amplifier is
made artificially low by its loop gain. At high frequencies, where
the loop gain is low, the amplifier output impedance can approach its open loop value.
REV. C
Most IC amplifiers exhibit a minimum open loop output impedance of 25 Ω, due to current limiting resistors. A few hundred
microamps reflected from the change in converter loading can
introduce errors in instantaneous input voltage. If the A/D conversion speed is not excessive and the bandwidth of the amplifier
is sufficient, the amplifier’s output will return to the nominal
value before the converter makes its comparison. However,
many amplifiers have relatively narrow bandwidths, yielding
slow recovery from output transients. The AD713 is ideally
suited as a driver for A/D converters since it offers both a wide
bandwidth and a high open loop gain.
–9–
AD713
Figure 12. Buffer Recovery Time Source Current = 2 mA
Figure 15. Transient Response, RL = 2 kΩ, CL = 500 pF
CMOS DAC APPLICATIONS
The AD713 is an excellent output amplifier for CMOS DACs.
It can be used to perform both 2 and 4 quadrant operation. The
output impedance of a DAC using an inverted R-2R ladder
approaches R for codes containing many “1”s, 3R for codes containing a single “1” and infinity for codes containing all zeros.
Figure 13. Buffer Recovery Time Sink Current = 1 mA
Driving A Large Capacitive Load
The circuit of Figure 14 employs a 100 Ω isolation resistor which
enables the amplifier to drive capacitive loads exceeding 1500 pF;
the resistor effectively isolates the high frequency feedback from
the load and stabilizes the circuit. Low frequency feedback is
returned to the amplifier summing junction via the low pass filter
formed by the 100 Ω series resistor and the load capacitance, C1.
Figure 15 shows a typical transient response for this connection.
For example, the output resistance of the AD7545 will modulate between 11 kΩ and 33 kΩ. Therefore, with the DAC’s
internal feedback resistance of 11 kΩ, the noise gain will vary
from 2 to 4/3. This changing noise gain modulates the effect of
the input offset voltage of the amplifier, resulting in nonlinear
DAC amplifier performance. The AD713, with its guaranteed
1.5 mV input offset voltage, minimizes this effect achieving
12-bit performance.
Figures 16 and 17 show the AD713 and a 12-bit CMOS DAC,
the AD7545, configured for either a unipolar binary (2-quadrant
multiplication) or bipolar (4-quadrant multiplication) operation.
Capacitor C1 provides phase compensation which reduces overshoot and ringing.
Figure 16. Unipolar Binary Operation
Figure 14. Circuit for Driving a Large Capacitance Load
Table II. Recommended Trim Resistor Values vs.
Grades for AD7545 for VD = 5 V
Trim
Resistor
JN/AQ/
SD
KN/BQ/
TD
LN/CQ/
UD
GLN/GCQ/
GUD
R1
R2
500 Ω
150 Ω
200 Ω
68 Ω
100 Ω
33 Ω
20 Ω
6.8 Ω
Figure 17. Bipolar Operation
–10–
REV. C
AD713
Figure 18. A Programmable State Variable Filter Circuit
FILTER APPLICATIONS
A Programmable State Variable Filter
For the state variable or universal filter configuration of Figure
18 to function properly, DACs A1 and B1 need to control the
gain and Q of the filter characteristic, while DACs A2 and B2
must accurately track for the simple expression of fC to be true.
This is readily accomplished using two AD7528 DACs and one
AD713 quad op amp. Capacitor C3 compensates for the effects
of op amp gain-bandwidth limitations.
This filter provides low pass, high pass and band pass outputs
and is ideally suited for applications where microprocessor
control of filter parameters is required. The programmable
range for component values shown is fC = 0 to 15 kHz and
Q = 0.3 to 4.5.
GIC and FDNR FILTER APPLICATIONS
The closely matched and uniform ac characteristics of the
AD713 make it ideal for use in GIC (gyrator) and FDNR (frequency dependent negative resistor) filter applications. Figures
19 and 21 show the AD713 used in two typical active filters.
The first shows a single AD713 simulating two coupled inductors
configured as a one-third octave bandpass filter. A single section
of this filter meets ANSI class II specifications and handles a
7.07 V rms signal with <0.002% THD (20 Hz–20 kHz).
Figure 21 shows a 7-pole antialiasing filter for a 2 ⫻ oversampling (88.2 kHz) digital audio application. This filter has <0.05
dB pass band ripple and 19.8 ± 0.3 µs delay, dc-20 kHz and will
handle a 5 V rms signal (VS = ± 15 V) with no overload at any
internal nodes.
The filter of Figure 19 can be scaled for any center frequency by
using the formula:
fC =
where all resistors and capacitors scale equally. Resistors R3–R8
should not be greater than 2 kΩ in value, to prevent parasitic
oscillations caused by the amplifier’s input capacitance.
Figure 19. A 1/3 Octave Filter Circuit
REV. C
1.11
2πRC
–11–
AD713
If this is not practical, small lead capacitances (10–20 pF)
should be added across R5 and R6. Figures 20 and 22 show the
output amplitude vs. frequency of these filters.
Figure 22. Relative Output Amplitude vs. Frequency
of Antialiasing Filter
Figure 20. Output Amplitude vs. Frequency of 1/3
Octave Filter
Figure 21. An Antialiasing Filter
–12–
REV. C
AD713
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Pin Plastic (N-14A) DIP Package
REV. C
14-Pin Cerdip (Q-14) Package
–13–
16-Pin SOIC (R-16) Package
Revision History
Location
Page
10/01—Data Sheet changed from REV. B to REV. C.
Edits to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
PRINTED IN U.S.A.
Edits to METALLIZATION PHOTOGRAPH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
C00824–0–1/02(C)
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
–14–