WS512K32-XXX / EDI8C32512CA HI-RELIABILITY PRODUCT 512Kx32 SRAM MODULE, SMD 5962-94611 FEATURES ■ Access Times of 15*, 17, 20, 25, 35, 45, 55ns ■ 5 Volt Power Supply ■ Packaging ■ Low Power CMOS ■ Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation • 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP (Package 400). • 68 lead, 40mm Hermetic Low Profile CQFP, 3.5mm (0.140") (Package 502), Package to be developed. ■ Weight WS512K32-XH1X - 13 grams typical WS512K32-XG2TX / EDI8C32512CA-E - 13 grams typical WS512K32-XG4TX - 20 grams typical NOTE: For non-SMD new designs, please use the WS512K32XXX part number for inquiries and orders. • 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square (Package 509) 4.57mm (0.180") height. Designed to fit JEDEC 68 lead 0.990" CQFJ footprint (Fig. 3). ■ Organized as 512Kx32, User Configurable as 1Mx16 or 2Mx8 * 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice. ■ Commercial, Industrial and Military Temperature Ranges ■ TTL Compatible Inputs and Outputs FIG. 1 PIN CONFIGURATION FOR WS512K32N-XH1X TOP VIEW 1 12 23 PIN DESCRIPTION 34 45 56 I/O0-31 Data Inputs/Outputs I/O8 WE2 I/O15 I/O24 VCC I/O31 A0-18 Address Inputs I/O9 CS2 I/O14 I/O25 CS4 I/O30 WE1-4 Write Enables GND I/O10 I/O13 WE4 I/O26 I/O29 CS1-4 Chip Selects OE Output Enable VCC Power Supply A13 I/O11 I/O12 A6 I/O27 I/O28 A14 A10 OE A7 A3 A0 GND Ground A15 A11 A18 NC A4 A1 NC Not Connected A16 A12 WE1 A8 A5 A2 A17 VCC I/O7 A9 WE3 I/O23 I/O0 CS1 I/O6 I/O16 CS3 I/O22 I/O1 NC I/O5 I/O17 GND I/O21 I/O2 I/O3 I/O4 I/O18 I/O19 I/O20 BLOCK DIAGRAM W E1 CS1 512K x 8 8 11 22 33 44 55 W E3 CS3 W E4 CS4 512K x 8 8 512K x 8 8 512K x 8 8 66 I/O0-7 June 1999 Rev. 4 W E2 CS2 OE A0-18 1 I/O8-15 I/O16-23 I/O24-31 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WS512K32-XXX / EDI8C32512CA FIG. 2 PIN CONFIGURATION FOR WS512K32-XG4TX PIN DESCRIPTION NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC TOP VIEW 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 I/O0-31 Data Inputs/Outputs A0-18 Address Inputs WE Write Enables CS1-4 Chip Selects OE Output Enable VCC Power Supply GND Ground NC Not Connected BLOCK DIAGRAM CS1 CS 2 CS 3 CS 4 WE OE A0-18 512K x 8 512K x 8 512K x 8 512K x 8 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 8 8 8 VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 NC NC NC NC NC 8 FIG. 3 I/O16-23 I/O8-15 I/O0-7 PIN CONFIGURATION FOR WS512K32-XG2TX AND EDI8C32512CA-E PIN DESCRIPTION NC A0 A1 A2 A3 A4 A5 CS3 GND CS4 WE1 A6 A7 A8 A9 A10 VCC TOP VIEW I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O24-31 I/O0-31 Data Inputs/Outputs 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 A0-18 Address Inputs WE1-4 Write Enables 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 0.940" Output Enable VCC Power Supply W E1 CS1 W E2 CS2 W E3 CS3 W E4 CS4 OE A0-18 NC NC A18 WE4 OE CS2 A17 WE2 WE3 A16 CS1 A15 A14 A13 A12 A11 VCC Chip Selects OE GND Ground The White 68 lead G2T CQFP NC Not Connected fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. BLOCK DIAGRAM 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 512K x 8 8 I/O0-7 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 CS1-4 2 512K x 8 8 I/O8-15 512K x 8 8 I/O16-23 512K x 8 8 I/O24-31 WS512K32-XXX / EDI8C32512CA TRUTH TABLE ABSOLUTE MAXIMUM RATINGS Parameter Symbol Min Max Unit CS OE WE Mode Data I/O Power H L L L X L H X X H H L Standby Read Out Disable Write High Z Data Out High Z Data In Standby Active Active Active TA -55 +125 °C TSTG -65 +150 °C Signal Voltage Relative to GND VG -0.5 Vcc+0.5 V Junction Temperature TJ 150 °C 7.0 V Operating Temperature Storage Temperature Supply Voltage VCC -0.5 CAPACITANCE (TA = +25°C) RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Unit Supply Voltage VCC 4.5 5.5 V Input High Voltage VIH 2.2 V CC + 0.3 V Input Low Voltage VIL -0.5 +0.8 V Operating Temp (Mil) TA -55 +125 °C Parameter Symbol Conditions OE capacitance COE VIN = 0 V, f = 1.0 MHz WE1-4 capacitance HIP (PGA) CQFP G4T CQFP G2T/E CWE VIN = 0 V, f = 1.0 MHz Max Unit 50 pF pF 20 50 20 CS1-4 capacitance CCS VIN = 0 V, f = 1.0 MHz 20 pF Data I/O capacitance CI/O VI/O = 0 V, f = 1.0 MHz 20 pF Address input capacitance CAD VIN = 0 V, f = 1.0 MHz 50 pF This parameter is guaranteed by design but not tested. DC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Symbol Conditions Units Min Max 10 µA Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC Output Leakage Current I LO CS = VIH, OE = VIH, VOUT = GND to VCC 10 µA ICC x 32 CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 540 mA Operating Supply Current x 32 Mode Standby Current I SB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 80 mA Output Low Voltage VOL IOL = 8mA for 15 - 35ns, IOL = 2.1mA for 45 - 55ns, Vcc = 4.5 0.4 V Output High Voltage VOH IOH = -4.0mA for 15 - 35ns, IOH = -1.0mA for 45 - 55ns, Vcc = 4.5 2.4 V NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V DATA RETENTION CHARACTERISTICS (TA = -55°C to +125°C) Parameter Symbol Conditions Units Min Data Retention Supply Voltage Data Retention Current V DR CS ≥ V CC -0.2V I CCDR1 V CC = 3V Typ 2.0 3.2 Max 5.5 V 28* mA * Also available in Low Power version, please call factory for information. 3 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WS512K32-XXX / EDI8C32512CA AC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Symbol Read Cycle -15* Min Read Cycle Time t RC Address Access Time t AA Output Hold from Address Change t OH Chip Select Access Time t ACS -17 Max 15 Min -20 Max Min 17 Max 20 15 0 -25 0 Min Max Max ns 45 0 55 ns 55 ns 25 ns 0 35 12 Min Units 55 35 25 10 -55 45 0 20 9 Max 25 0 17 Min -45 35 20 0 8 Max 25 17 15 Min -35 ns 45 Output Enable to Output Valid t OE Chip Select to Output in Low Z t CLZ 1 2 2 2 2 4 25 4 25 4 Output Enable to Output in Low Z t OLZ 1 0 0 0 0 0 0 0 Chip Disable to Output in High Z t CHZ 1 12 12 12 12 15 20 20 ns Output Disable to Output in High Z t OHZ 1 12 12 12 12 15 20 20 ns ns ns * 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice. 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS (VCC = 5.0V, VSS = 0V, TA = -55°C to +125°C) Parameter Symbol Write Cycle -15* Min -17 Max Min -20 Max Min -25 Max Min -35 Max Min -45 Max Min -55 Max Units Min Max Write Cycle Time t WC 15 17 20 25 35 45 55 ns Chip Select to End of Write t CW 13 15 15 17 25 35 50 ns Address Valid to End of Write t AW 13 15 15 17 25 35 50 ns Data Valid to End of Write t DW 10 11 12 13 20 25 25 ns Write Pulse Width t WP 13 15 15 17 25 35 40 ns Address Setup Time t AS 2 2 2 2 2 2 2 ns Address Hold Time t AH 0 0 0 0 0 5 5 ns Output Active from End of Write t OW 1 2 2 3 4 4 5 5 Write Enable to Output in High Z t WHZ 1 Data Hold Time t DH 8 0 9 11 0 0 13 0 15 0 20 0 ns 20 0 ns * 15ns Access Time available only in Commercial and Industrial Temperature. This speed is not fully characterized and is subject to change without notice. 1. This parameter is guaranteed by design but not tested. 2. The Address Setup Time of minimum 2ns is for the G2T and H1 packages. t AS minimum for the G4T package is 0ns. FIG. 4 AC TEST CONDITIONS AC TEST CIRCUIT Parameter I OL Current Source VZ D.U.T. ≈ 1.5V (Bipolar Supply) C eff = 50 pf I OH Current Source White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 4 Typ ns Unit Input Pulse Levels VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V NOTES: V Z is programmable from -2V to +7V. I OL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω. V Z is typically the midpoint of VOH and VOL . I OL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. WS512K32-XXX / EDI8C32512CA FIG. 5 tRC TIMING WAVEFORM - READ CYCLE ADDRESS tAA CS tRC tCHZ tACS ADDRESS tCLZ tAA OE tOE tOLZ tOH DATA I/O PREVIOUS DATA VALID DATA I/O DATA VALID tOHZ DATA VALID HIGH IMPEDANCE READ CYCLE 1 (CS = OE = VIL, WE = VIH) READ CYCLE 2 (WE = VIH) FIG. 6 WRITE CYCLE - WE CONTROLLED tWC ADDRESS tAW tAH tCW CS tAS tWP WE tOW tWHZ tDW DATA I/O tDH DATA VALID WRITE CYCLE 1, WE CONTROLLED FIG. 7 WRITE CYCLE - CS CONTROLLED tWC WS32K32-XHX ADDRESS tAS tAW tAH tCW CS tWP WE tDW DATA I/O tDH DATA VALID WRITE CYCLE 2, CS CONTROLLED 5 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WS512K32-XXX / EDI8C32512CA PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1) 27.3 (1.075) ± 0.25 (0.010) SQ PIN 1 IDENTIFIER SQUARE PAD ON BOTTOM 25.4 (1.0) TYP 4.34 (0.171) MAX 3.81 (0.150) ± 0.13 (0.005) 1.42 (0.056) ± 0.13 (0.005) 0.76 (0.030) ± 0.13 (0.005) 2.54 (0.100) TYP 1.27 (0.050) TYP DIA 15.24 (0.600) TYP 0.46 (0.018) ± 0.05 (0.002) DIA 25.4 (1.0) TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T) 39.6 (1.56) ± 0.38 (0.015) SQ PIN 1 IDENTIFIER 3.56 (0.140) MAX Pin 1 12.7 (0.500) ± 0.5 (0.020) 4 PLACES 5.1 (0.200) ± 0.25 (0.010) 4 PLACES 0.38 (0.015) ± 0.08 (0.003) 68 PLACES 1.27 (0.050) TYP 0.25 (0.010) ± 0.05 (0.002) 38 (1.50) TYP 4 PLACES ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 6 WS512K32-XXX / EDI8C32512CA PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T/E) 25.15 (0.990) ± 0.26 (0.010) SQ 4.57 (0.180) MAX 22.36 (0.880) ± 0.26 (0.010) SQ 0.27 (0.011) ± 0.04 (0.002) 0.25 (0.010) REF Pin 1 R 0.25 (0.010) 24.03 (0.946) ± 0.26 (0.010) 0.19 (0.007) ± 0.06 (0.002) 1° / 7° 1.0 (0.040) ± 0.127 (0.005) 23.87 (0.940) REF DETAIL A 1.27 (0.050) TYP SEE DETAIL "A" 0.38 (0.015) ± 0.05 (0.002) 20.3 (0.800) REF The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. 0.940" TYP ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES 7 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 WS512K32-XXX / EDI8C32512CA ORDERING INFORMATION NOTE: For non-SMD new designs, please use the WS128K32-XXX part number for inquiries and orders. W S 512K 32 X - XXX X X X LEAD FINISH: Blank = Gold plated leads A = Solder dip leads DEVICE GRADE: Q = MIL-STD-883 Compliant M = Military Screened -55°C to +125°C I = Industrial -40°C to 85°C C = Commercial 0°C to +70°C PACKAGE TYPE: H1 = Ceramic Hex-In-line Package, HIP (Package 400) G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509) G4T = 40mm Low Profile CQFP (Package 502) ACCESS TIME (ns) IMPROVEMENT MARK: N = No Connect at pin 21 and 39 in HIP for Upgrades ORGANIZATION, 512Kx32 User configurable as 1Mx16 or 2Mx8 SRAM WHITE ELECTRONIC DESIGNS CORP. EDI 8 C 32 512 CA X E X WHITE ELECTRONIC DESIGNS SRAM CERAMIC MCM ORGANIZATION, 512Kx32 TECHNOLOGY: CA = CMOS Standard Power LPA = Low Power * ACCESS TIME (ns) PACKAGE TYPE: E = 22.4mm Ceramic Quad Flat Pack, Low Profile CQFP (Package 509) DEVICE GRADE: B = MIL-STD-883 Compliant M = Military Screened -55°C to +125°C I = Industrial -40°C to +85°C C = Commercial 0°C to +70°C * Low Power Data Retention only available in G2T/E Package Type White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520 8 WS512K32-XXX / EDI8C32512CA DEVICE TYPE SPEED PACKAGE SMD NO. 512K x 32 SRAM Module 55ns 66 pin HIP (H1) 5962-94611 05HTX 512K x 32 SRAM Module 45ns 66 pin HIP (H1) 5962-94611 06HTX 512K x 32 SRAM Module 35ns 66 pin HIP (H1) 5962-94611 07HTX 512K x 32 SRAM Module 25ns 66 pin HIP (H1) 5962-94611 08HTX 512K x 32 SRAM Module 20ns 66 pin HIP (H1) 5962-94611 09HTX 512K x 32 SRAM Module 17ns 66 pin HIP (H1) 5962-94611 10HTX 512K x 32 SRAM Module 55ns 68 lead CQFP Low Profile (G4T) 5962-94611 05HYX 512K x 32 SRAM Module 45ns 68 lead CQFP Low Profile (G4T) 5962-94611 06HYX 512K x 32 SRAM Module 35ns 68 lead CQFP Low Profile (G4T) 5962-94611 07HYX 512K x 32 SRAM Module 25ns 68 lead CQFP Low Profile (G4T) 5962-94611 08HYX 512K x 32 SRAM Module 20ns 68 lead CQFP Low Profile (G4T) 5962-94611 09HYX 512K x 32 SRAM Module 17ns 68 lead CQFP Low Profile (G4T) 5962-94611 10HYX 512K x 32 SRAM Module 55ns 68 lead CQFP/J (G2T) 5962-94611 05HMX 512K x 32 SRAM Module 45ns 68 lead CQFP/J (G2T) 5962-94611 06HMX 512K x 32 SRAM Module 35ns 68 lead CQFP/J (G2T) 5962-94611 07HMX 512K x 32 SRAM Module 25ns 68 lead CQFP/J (G2T) 5962-94611 08HMX 512K x 32 SRAM Module 20ns 68 lead CQFP/J (G2T) 5962-94611 09HMX 512K x 32 SRAM Module 17ns 68 lead CQFP/J (G2T) 5962-94611 10HMX 9 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520