Silicon Junction FETs (Small Signal) 2SK0198 (2SK198) Silicon N-Channel Junction FET For low-frequency amplification unit: mm +0.2 2.8 –0.3 ■ Features +0.25 0.65±0.15 1.45 0.95 1 3 +0.1 0.4 –0.05 1.9±0.2 1.5 –0.05 0.95 +0.2 ● High mutual conductance gm ● Low noise type ● Mini-type package, allowing downsizing of the sets and automatic insertion through the tape/magazine packing. 2.9 –0.05 0.65±0.15 Ratings Unit Drain to Source voltage Parameter VDSX Symbol 30 V Gate to Drain voltage VGDO −30 V Drain current ID 20 mA Gate current IG 10 mA Allowable power dissipation PD 150 mW Channel temperature Tch 150 °C Storage temperature Tstg −55 to +150 °C +0.1 0.16 –0.06 0.1 to 0.3 0.4±0.2 0 to 0.1 ■ Absolute Maximum Ratings (Ta = 25°C) 0.8 +0.2 1.1 –0.1 2 1: Source 2: Drain 3: Gate JEDEC: TO-236 EIAJ: SC-59 Mini Type Package (3-pin) Marking Symbol (Example): 1O ■ Electrical Characteristics (Ta = 25°C) Parameter Symbol Drain to Source cut-off current IDSS * Gate to Source leakage current IGSS VGS = −30V, VDS = 0 Gate to Source cut-off voltage VGSC VDS = 10V, ID = 10µA Mutual conductance gm Input capacitance (Common Source) Ciss Reverse transfer capacitance (Common Source) Crss Noise figure * NV Conditions VDS = 10V, VGS = 0 VDS = 10V, ID = 0.5mA, f = 1kHz VDS = 10V, VGS = 0, f = 1kHz VDS = 10V, VGS = 0, f = 1MHz VDS = 30V, ID = 1mA, GV = 80dB Rg = 100kΩ, Function = FLAT min typ 0.5 − 0.1 4 13 max Unit 12 mA −100 nA −1.5 V mS 14 pF 3.5 pF 60 mV IDSS rank classification Runk P Q R IDSS (mA) 0.5 to 3 2 to 6 4 to 12 Marking Symbol 1OP 1OQ 1OR Note) The part number in the parenthesis shows conventional part number. 245 Silicon Junction FETs (Small Signal) 2SK0198 P D Ta I D V DS 8 9.6 VDS=10V Ta=25˚C 7 200 8.0 160 120 80 6 VGS=0V 5 4 – 0.1V 3 – 0.2V 2 – 0.3V 40 1 20 40 60 80 100 120 140 160 0 Ambient temperature Ta (˚C) 3.2 Ta=75˚C 1.6 2 4 6 8 10 25˚C 0 –1.0 12 Drain to source voltage VDS (V) g m VGS IDSS=5.0mA 4 IDSS=5.0mA VDS=10V Ta=25˚C 16 12 2.0mA 8 4 2.0mA 0 – 0.8 0 – 0.6 – 0.4 – 0.2 0 0 Gate to source voltage VGS (V) 1 2 3 4 5 6 7 8 Drain current ID (mA) C rss V DS 12 VGS=–3V f=1MHz Ta=25˚C Noise figure NF (dB) 3 2 1 VDS=10V ID=5.2mA Ta=25˚C 10 4 8 6 Rg=500Ω 4 2 1kΩ 0 0 1 3 10 30 Drain to source voltage VDS 100 (V) – 0.2 0 1 10 102 103 Frequency f (Hz) f=1MHz VGS=–3V Ta=25˚C 8 6 Ciss 4 Coss 2 0 1 3 10 30 100 Drain to source voltage VDS (V) NF f 5 Input capacitance (Common source), Output capacitance (Common source) Ciss,Coss (pF) Mutual conductance gm (mS) 8 – 0.4 10 VDS=10V Ta=25˚C 12 – 0.6 C iss, C oss V DS 20 16 – 0.8 Gate to source voltage VGS (V) gm I D 20 Reverse transfer capacitance (Common source) Crss (pF) 4.8 – 0.4V 0 0 246 6.4 –25˚C 0 Mutual conductance gm (mS) Drain current ID (mA) Drain current ID (mA) Allowable power dissipation PD (mW) 240 I D V GS 105 Request for your special attention and precautions in using the technical information and semiconductors described in this material (1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. 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