ETC 74LVQ138SJX

Revised June 2001
74LVQ138
Low Voltage 1-of-8 Decoder/Demultiplexer
General Description
Features
The LVQ138 is a high-speed 1-of-8 decoder/demultiplexer.
This device is ideally suited for high-speed bipolar memory
chip select address decoding. The multiple input enables
allow parallel expansion to a 1-of-24 decoder using just
three LVQ138 devices or a 1-of-32 decoder using four
LVQ138 devices and one inverter.
■ Ideal for low power/low noise 3.3V applications
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
■ Improved latch-up immunity
■ Guaranteed incident wave switching into 75Ω
■ 4kV minimum ESD immunity
■ Demultiplexing capability
■ Multiple input enable for each expansion
■ Active LOW mutually exclusive outputs
Ordering Code:
Order Number
Package Number
Package Description
74LVQ138SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVQ138SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
© 2001 Fairchild Semiconductor Corporation
DS011350
Pin Names
Description
A0–A2
Address Inputs
E1–E2
Enable Inputs
E3
Enable Input
O0–O7
Outputs
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74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer
February 1992
74LVQ138
Functional Description
Logic Diagram
The LVQ138 high-speed 1-of-8 decoder/demultiplexer
accepts three binary weighted inputs (A0, A1, A2) and,
when enabled, provides eight mutually exclusive activeLOW outputs (O0–O7). The LVQ138 features three Enable
inputs, two active-LOW (E1, E2) and one active-HIGH (E3).
All outputs will be HIGH unless E1 and E2 are LOW and E3
is HIGH. This multiple enable function allows easy parallel
expansion of the device to a 1-of-32 (5 lines to 32 lines)
decoder with just four LVQ138 devices and one inverter
(see Figure 1). The LVQ138 can be used as an 8-output
demultiplexer by using one of the active LOW Enable
inputs as the data input and the other Enable inputs as
strobes. The Enable inputs which are not used must be
permanently tied to their appropriate active-HIGH or activeLOW state.
Truth Table
Inputs
Outputs
E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
X
X
X
H
H
H
H
H
H
H
H
L
L
H
L
L
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
L
H
H
H
H
H
L
L
H
H
H
L
H
H
H
L
H
H
H
H
L
L
H
L
L
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
L
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
L
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
FIGURE 1. Expansion to 1-of-32 Decoding
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2
Supply Voltage (VCC)
Recommended Operating
Conditions (Note 2)
−0.5V to +7.0V
DC Input Diode Current (IIK)
Supply Voltage (VCC)
VI = −0.5V
−20 mA
Input Voltage (VI)
VI = VCC + 0.5V
+20 mA
Output Voltage (VO)
DC Input Voltage (VI)
−0.5V to VCC + 0.5V
0V to VCC
−40°C to +85°C
Minimum Input Edge Rate (∆V/∆t)
VO = −0.5V
−20 mA
VIN from 0.8V to 2.0V
VO = VCC + 0.5V
+20 mA
VCC @ 3.0V
125 mV/ns
−0.5V to VCC + 0.5V
DC Output Source
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
±50 mA
or Sink Current (IO)
DC VCC or Ground Current
±200 mA
(ICC or IGND)
Storage Temperature (TSTG)
0V to VCC
Operating Temperature (TA)
DC Output Diode Current (IOK)
DC Output Voltage (VO)
2.0V to 3.6V
−65°C to +150°C
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Latch-Up Source or
±300 mA
Sink Current
DC Electrical Characteristics
Symbol
VIH
Parameter
Minimum High Level
Input Voltage
VIL
Maximum Low Level
Input Voltage
VOH
Minimum High Level
Output Voltage
VOL
Maximum Low Level
Output Voltage
IIN
Maximum Input
Leakage Current
TA = +25°C
VCC
TA = −40°C to +85°C
Units
(V)
Typ
3.0
1.5
2.0
2.0
V
3.0
1.5
0.8
0.8
V
3.0
2.99
2.9
2.9
V
3.0
3.0
Conditions
Guaranteed Limits
0.002
2.58
2.48
V
0.1
0.1
V
3.0
0.36
0.44
V
3.6
±0.1
±1.0
µA
VOUT = 0.1V
or VCC − 0.1V
VOUT = 0.1V
or VCC − 0.1V
IOUT = −50 µA
VIN = VIL or VIH (Note 3)
IOH = −12 mA
IOUT = 50 µA
VIN = VIL or VIH (Note 3)
IOL = 12 mA
VI = VCC,
GND
IOLD
Minimum Dynamic (Note 4)
3.6
36
mA
VOLD = 0.8V Max (Note 5)
IOH
Output Current
3.6
−25
mA
VOHD = 2.0V Min (Note 5)
ICC
Maximum Quiescent
40.0
µA
Supply Current
VOLP
Quiet Output
Maximum Dynamic VOL
VOLV
Quiet Output
Minimum Dynamic VOL
VIHD
Maximum High Level
Dynamic Input Voltage
VILD
Maximum Low Level
Dynamic Input Voltage
3.6
4.0
3.3
0.8
V
3.3
−0.8
V
3.3
1.7
2.0
V
3.3
1.7
0.8
V
VIN = VCC
or GND
(Note 6)(Note 7)
(Note 6)(Note 7)
(Note 6)(Note 8)
(Note 6)(Note 8)
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f = 1 MHz.
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74LVQ138
Absolute Maximum Ratings(Note 1)
74LVQ138
AC Electrical Characteristics
TA = +25°C
Symbol
tPLH
Parameter
Propagation Delay
An to On
tPHL
Propagation Delay
An to On
Propagation Delay
tPLH
E1 or E2 to On
tPHL
Propagation Delay
E1 or E2 to On
tPLH
Propagation Delay
E3 to On
Propagation Delay
tPHL
E3 to On
tOSHL,
Output to Output Skew (Note 9)
tOSLH
Data to Output
TA = −40°C to +85°C
CL = 50 pF
VCC
CL = 50 pF
(V)
Min
Typ
Max
Min
Max
2.7
1.5
10.2
18.3
1.5
21.0
3.3 ± 0.3
1.5
8.5
13.0
1.5
15.0
2.7
1.5
9.6
17.6
1.5
20.0
3.3 ± 0.3
1.5
8.0
12.5
1.5
14.0
2.7
1.5
13.2
21.0
1.5
23.0
3.3 ± 0.3
1.5
11.0
15.0
1.5
16.0
2.7
1.5
11.4
19.0
1.5
21.0
3.3 ± 0.3
1.5
9.5
13.5
1.5
15.0
2.7
1.5
13.2
21.8
1.5
23.5
3.3 ± 0.3
1.5
11.0
15.5
1.5
16.5
2.7
1.5
10.2
18.3
1.5
20.0
3.3 ± 0.3
1.5
8.5
13.0
1.5
14.0
2.7
1.0
1.5
1.5
3.3 ± 0.3
1.0
1.5
1.5
Units
ns
ns
ns
ns
ns
ns
ns
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Capacitance
Typ
Units
CIN
Symbol
Input Capacitance
Parameter
4.5
pF
VCC = Open
CPD (Note 10)
Power Dissipation Capacitance
45
pF
VCC = 3.3V
Note 10: CPD is measured at 10 MHz.
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Conditions
74LVQ138
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
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74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
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instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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