Revised April 1999 74VHCT138A 3-to-8 Decoder/Demultiplexer General Description The VHCT138A is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A0, A1 and A2) determine which one of the outputs (O0–O7) will go LOW. When enable input E3 is held LOW or either E1 or E2 is held HIGH, decoding function is inhibited and all outputs go HIGH. E3, E1 and E2 inputs are provided to ease cascade connection and for use as an address decoder for memory systems. Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the sup- ply voltage and to the output pins with VCC = 0V. These circuits prevent device destruction due to mismatched supply and input/output voltages. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. Features ■ High Speed: tPD = 7.6 ns (typ) at VCC = 5V ■ Low power dissipation: ICC = 4 µA (max.) at TA = 25°C ■ Power down protection is provided on all inputs and outputs ■ Pin and function compatible with 74HCT138 Ordering Code: Order Number Package Number 74VHCT138AM Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHCT138ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT138AMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHCT138AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names © 1999 Fairchild Semiconductor Corporation DS500014.prf Description A0–A2 Address Inputs E1–E2 Enable Inputs E3 Enable Input O0–O7 Outputs www.fairchildsemi.com 74VHCT138A 3-to-8 Decoder/Demultiplexer June 1997 74VHCT138A Truth Table Inputs E1 E2 E3 A0 Outputs A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Supply Voltage (VCC) −0.5V to +7.0V DC Input Voltage (VIN) −0.5V to +7.0V Recommended Operating Conditions (Note 5) 4.5V to +5.5V Supply Voltage (VCC) DC Output Voltage (VOUT) 0V to +5.5V Input Voltage (VIN) (Note 2) −0.5V to 7.0V (Note 3) −0.5V to VCC+ 0.5V (Note 3) 0V to VCC −20 mA (Note 2) 0V to 5.5V Input Diode Current (IIK) Output Voltage (VOUT) Output Diode Current (IOK) −40°C to +85°C Operating Temperature (TOPR) ±20 mA (Note 4) DC Output Current (IOUT) ±25 mA DC VCC/GND Current (ICC) ±75 mA Input Rise and Fall Time (tr, tf) VCC = 5.0V ± 0.5V −65°C to +150°C Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 0 ∼ 20 ns/V Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. 260°C Note 2: VCC = 0V. Note 3: HIGH or LOW state. IOUT absolute maximum rating must be observed. Note 4: VOUT <GND, VOUT> VCC (Outputs Active). Note 5: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter TA = 25°C VCC (V) Min VIH HIGH Level Input Voltage 4.5 − 5.5 VIL LOW Level Input Voltage VOH HIGH Level 4.5 4.4 Output Voltage 4.5 3.94 LOW Level 4.5 Output Voltage VOL Typ TA = −40°C to +85°C Max Min 2.0 Max Units 2.0 4.5 − 5.5 V 0.8 0.8 4.5 V 4.4 V 3.80 0.0 Conditions 0.1 0.1 4.5 0.36 0.44 0 − 5.5 ±0.1 ±1.0 V µA VIN = VIH IOH = −50 µA or VIL IOH = −8 mA VIN = VIH IOL = 50 µA or VIL IOL = 8 mA VIN = 5.5V or GND IIN Input Leakage Current ICC Quiescent Supply Current 5.5 4.0 20.0 µA VIN = VCC or GND ICCT Maximum ICC/Input 5.5 1.35 1.50 mA Vin = 3.4V other inputs = VCC or GND IOFF Output Leakage Current 0 0.5 5.0 µA VOUT = 5.5V AC Electrical Characteristics Symbol Parameter tPLH Propagation Delay tPHL An to On tPLH Propagation Delay tPHL E3 to On tPLH Propagation Delay tPHL E1 or E2 to On CIN CPD VCC (V) 5.0 ± 0.5 TA = 25°C Min TA = −40°C to +85°C Typ Max Min Max 7.6 10.4 1.0 12.0 8.1 11.4 1.0 13.0 6.6 9.1 1.0 10.5 7.1 10.1 1.0 11.5 7.0 9.6 1.0 11.0 7.5 10.6 1.0 12.0 Input Capacitance 4 10 Power Dissipation Capacitance 49 5.0 ± 0.5 5.0 ± 0.5 10 Units ns ns Conditions CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF ns CL = 50 pF pF VCC = Open pF (Note 6) Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) = CPD * VCC * fIN + ICC. 3 www.fairchildsemi.com 74VHCT138A Absolute Maximum Ratings(Note 1) 74VHCT138A Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 4 74VHCT138A Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 5 www.fairchildsemi.com 74VHCT138A 3-to-8 Decoder/Demultiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.