ETC HGT1S14N41G3VLT

[ /Title
(HGT1
S14N4
1G3V
LS,
HGTP
14N41
G3VL)
/Subjec
t (14A,
410V
NChann
el,
Logic
Level,
Voltag
e
Clampi
ng
IGBTs
)
/Autho
r ()
/Keyw
ords
(14A,
410V
NChann
el,
Logic
Level,
Voltag
e
Clampi
ng
IGBTs,
HGT1S14N41G3VLS, HGTP14N41G3VL
Data Sheet
September 2001
14A, 410V N-Channel, Logic Level, Voltage
Clamping IGBTs
This N-Channel IGBT is a MOS gated, logic level device
which is intended to be used as an ignition coil driver in
automotive ignition circuits. Unique features include an
active voltage clamp between the collector and the gate
which provides Self Clamped Inductive Switching (SCIS)
capability in ignition circuits. Internal diodes provide ESD
protection for the logic level gate. Both a series resistor and
a shunt resister are provided in the gate circuit
Formerly Developmental Type TA49360.
PACKAGE
4887
Features
• Ignition Energy = 340mJ at TJ (STARTING) = 25oC
• Typical Internal Clamp Voltage = 410V at TJ = 25oC
• Logic Level Gate Drive
• ESD Gate Protection
• TJ = 175oC
• Internal Series and Shunt Gate Resistors
• 24V Reverse Battery Capability
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
PART NUMBER
File Number
BRAND
HGT1S14N41G3VLS
TO-263AB
14N41GVL
HGTP14N41G3VL
TO-220AB
14N41GVL
Packaging
JEDEC TO-263AB
NOTE: When ordering, use the entire part number. To obtain the TO263AB in tape and reel, drop the S and add the suffix T; i.e.
HGT1S14N41G3VLT
COLLECTOR
(FLANGE)
G
E
Symbol
COLLECTOR
JEDEC TO-220AB
R1
GATE
E
R2
C
G
EMITTER
COLLECTOR
(FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,417,385
4,430,792
4,443,931
4,466,176
4,516,143
4,532,534
4,587,713
4,598,461
4,605,948
4,620,211
4,631,564
4,639,754
4,639,762
4,641,162
4,644,637
4,682,195
4,684,413
4,694,313
4,717,679
4,743,952
4,783,690
4,794,432
4,801,986
4,803,533
4,809,045
4,809,047
4,810,665
4,823,176
4,837,606
4,860,080
4,883,767
4,888,627
4,890,143
4,901,127
4,904,609
4,933,740
4,963,951
4,969,027
©2001 Fairchild Semiconductor Corporation
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
HGT1S14N41G3VLS,
HGTP14N41G3VL
UNITS
Collector to Emitter Breakdown Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCER
430
V
Collector to Emitter Breakdown Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES
445
V
Emitter to Collector Breakdown Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVECS
24
V
Collector Current Continuous at VGE = 5V, TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25
25
A
at VGE = 5V, TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . IC110
18
A
Gate to Emitter Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGEM
±10
V
Inductive Switching Current at L = 3 mH, TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . ISCIS
15
A
at L = 3 mH, TC = 150oC . . . . . . . . . . . . . . . . . . . . . . . . . . . ISCIS
11.5
A
Collector to Emitter Avalanche Energy at L = 3 mH, TC = 25oC . . . . . . . . . . . . . . . . . . . . EAS
340
mJ
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
136
W
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.91
W/oC
Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSTG
-55 to 175
oC
Operating Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ
-55 to 175
oC
Electrostatic Discharge Voltage HBM at 250pF, 1500Ω All Pin Configurations . . . . . . . . .ESD
5
kV
Electrostatic Discharge Voltage MM at 200pF, 0Ω All Pin Configurations . . . . . . . . . . . . .ESD
2
kV
Maximum Lead Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. May be exceeded if IGEM is limited to 10mA.
Electrical Specifications
TJ = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Collector to Emitter Breakdown Voltage
BVCER
IC = 10mA, RG = 1kΩ, VGE = 0V,
TJ = -40oC to 150oC (Figure 17)
380
410
430
V
Collector to Emitter Breakdown Voltage
BVCES
IC = 10mA, VGE = 0V, TJ = -40oC to 150oC
395
425
445
V
-
3
-
V
Gate to Emitter Plateau Voltage
Gate Charge
Collector to Emitter Clamp Breakdown Voltage
Emitter to Collector Breakdown Voltage
Collector to Emitter Leakage Current
VGEP
QG(ON)
BVCE(CL)
BVECS
ICES
IC = 10A, VCE = 12V
IC = 10A, VCE = 12V, VGE = 5V (Figure 16)
IC = 15A, RG = 1kΩ
IC = 10mA
VCE = 350V,
VGE = 0V (Figure 13)
VCE = 15V, VGE = 0V
Emitter to Collector Leakage Current
Gate to Emitter Threshold Voltage
Collector to Emitter On-State Voltage
Collector to Emitter On-State Voltage
IECS
VGE(TH)
VCE(ON)
VCE(ON)
VEC = 24V, VGE = 0V
(Figure 13)
IC = 6A, VGE = 4.0V
(Figures 3 to 9)
IC = 10A, VGE = 4.5V
(Figures 3 to 9)
IC = 14A, VGE = 5V
(Figures 3 to 9)
26
-
nC
410
430
V
24
28
-
V
TJ = 25oC
-
-
40
µA
TJ = 150oC
-
-
200
µA
TJ = 25oC
-
-
10
µA
TJ = 150oC
TJ = 25oC
TJ = 150oC
-
-
50
µA
-
-
1
mA
IC = 1mA, VCE = VGE (Figure 12)
IC = 10A, VGE = 3.7V
(Figures 3 to 9)
380
TJ = 25oC
TJ = 150oC
TJ = -40oC
TJ = 25oC
TJ = 25oC
TJ = 150oC
TJ = 25oC
TJ = 175oC
-
-
40
mA
1.3
1.8
2.2
V
-
1.6
2.65
V
-
1.7
2.75
V
-
1.3
1.7
V
-
1.25
1.6
V
-
1.45
1.7
V
-
1.55
1.8
V
-
1.65
2.0
V
-
1.8
2.3
V
Gate Series Resistance
R1
-
80
-
Ω
Gate to Emitter Resistance
R2
10
18
26
kΩ
©2001 Fairchild Semiconductor Corporation
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
Electrical Specifications
TJ = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
Current Turn-On Delay Time Resistive Load
MIN
TYP
MAX
UNITS
IGES
VGE = ±10V
±384
±555
±1000
µA
BVGES
IGES = ±5mA
±12
±14
-
V
Gate to Emitter Leakage Current
Gate to Emitter Breakdown Voltage
TEST CONDITIONS
td(ON)I
Current Turn-On Rise Time Resistive Load
trI
VDD = 14V, RG = 1kΩ,
VGE = 5V (Figure 14)
VDD = 14V, RG = 1kΩ,
VGE = 5V (Figure 14)
IC = 11.5A, TJ = 25oC
-
0.9
1.5
µs
IC = 6.5A, TJ = 150oC
-
0.75
1.6
µs
IC = 11.5A, TJ = 25oC
-
3.2
4.5
µs
IC = 6.5A, TJ = 150oC
-
2.7
3.8
µs
Current Turn-Off Time - Inductive Load
td(OFF)I + tfI
IC = 6.5A, RG = 1kΩ, VGE = 5V, L = 300µH,
VDD = 300V, TJ = 150oC (Figure 14)
-
9
20
µs
Current Turn-Off Time - Resistive Load
td(OFF)I + tfI
IC = 6.5A, RG = 1kΩ, VGE = 5V, RL = 46Ω,
VDD = 300V, TJ = 25oC (Figure 14)
-
10
15
µs
11.5
-
-
A
15
-
-
A
1.1
oC/W
Inductive Use Test
ISCIS
Thermal Resistance
RθJC
60
(Figure 18)
52
ISCIS CAN BE LIMITED BY gfs AT VGE = 5V
36
28
TJ = 25oC
20
12
TJ = 150oC
4
40
80
120
160
200
40
ISCIS CAN BE LIMITED BY gfs AT VGE = 5V
32
24
TJ = 25oC
16
8
RG = 1kΩ, VGE = 5V
0
2
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VGE = 4.0V
VGE = 3.7V
1.2
VGE = 4.5V
VGE = 5.0V
ICE = 6A
100
175
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE
vs JUNCTION TEMPERATURE
©2001 Fairchild Semiconductor Corporation
6
8
10
FIGURE 2. SELF CLAMPED INDUCTIVE SWITCHING
CURRENT vs. INDUCTANCE
1.3
25
4
L, INDUCTANCE (mH)
FIGURE 1. SELF CLAMPED INDUCTIVE SWITCHING
CURRENT vs TIME IN AVALANCHE
1.0
-50
TJ = 150oC
0
tAV, TIME IN AVALANCHE (µs)
1.1
-
Unless Otherwise Specified
RG = 1kΩ, VGE = 5V
44
-
ISCIS, INDUCTIVE SWITCHING CURRENT (A)
ISCIS, INDUCTIVE SWITCHING CURRENT (A)
Typical Performance Curves
TC = 150oC
L = 3mH, VG = 5V,
RG = 1kΩ (Figures 1, 2)
TC = 25oC
1.62
ICE = 10A
1.58
VGE = 4.0V
1.54
VGE = 3.7V
1.50
1.46
1.42
1.38
VGE = 5.0V
1.34
-50
VGE = 4.5V
25
100
175
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE
vs JUNCTION TEMPERATURE
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
40
Unless Otherwise Specified (Continued)
DUTY CYCLE < 0.5%, TJ = 175oC
PULSE DURATION = 250µs
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
VGE = 5.0V
30
VGE = 4.5V
20
VGE = 3.7V
10
VGE = 4.0V
0
0
2
1
3
4
5
40
DUTY CYCLE < 0.5%, TJ = 150oC
PULSE DURATION = 250µs
30
VGE = 4.5V
20
VGE = 3.7V
VGE = 4.0V
10
0
0
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VGE = 4.5V
VGE = 3.7V
20
VGE = 4.0V
10
0
1
2
3
4
5
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
VGE = 5.0V
30
0
2
3
4
5
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
DUTY CYCLE < 0.5%, TJ = 25oC
PULSE DURATION = 250µs
40
1
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
50
VGE = 5.0V
60
DUTY CYCLE < 0.5%, TJ = -40oC
PULSE DURATION = 250µs
VGE = 5.0V
50
VGE = 4.5V
40
30
VGE = 3.7V
20
VGE = 4.0V
10
0
0
1
2
3
4
5
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 7. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 8. COLLECTOR TO EMITTER ON-STATE VOLTAGE
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
60
VGE
TJ = 25oC
8.0V
50
5.0V
4.5V
40
4.0V
3.5V
30
3.0V
2.5V
20
10
0
0
1
2
3
4
5
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 9. COLLECTOR TO EMITTER ON-STATE VOLTAGE
©2001 Fairchild Semiconductor Corporation
40
DUTY CYCLE < 0.5%, VCE = 5V
PULSE DURATION = 250µs
32
TJ = 150oC
24
TJ = 25oC
16
8
TJ = -40oC
0
1
2
3
4
5
VGE, GATE TO EMITTER VOLTAGE (V)
FIGURE 10. TRANSFER CHARACTERISTIC
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
Typical Performance Curves
Unless Otherwise Specified (Continued)
2.2
VGE = 5V
VGE(TH) , THRESHOLD VOLTAGE (V)
ICE , DC COLLECTOR CURRENT (A)
28
24
20
16
12
8
4
0
25
50
75
100
125
150
ICE = 1mA
VCE = VGE
2.0
1.8
1.6
1.4
1.2
1.0
-50
175
25
TC , CASE TEMPERATURE (oC)
FIGURE 12. THRESHOLD VOLTAGE vs JUNCTION
TEMPERATURE
16
ICE = 6.5A, VGE = 5V, RG = 1kΩ
14
VECS = 24V
1000
SWITCHING TIME (µs)
LEAKAGE CURRENTS (µA)
10000
100
VCES = 300V
10
VCES = 250V
RESISTIVE tOFF
12
10
INDUCTIVE tOFF
8
6
RESISTIVE tON
1
4
0.1
25
50
75
125
100
150
2
25
175
50
TJ, JUNCTION TEMPERATURE (oC)
VGE, GATE TO EMITTER VOLTAGE (V)
8
FREQUENCY = 1MHz
2000
1600
CIES
1200
800
CRES
COES
0
5
10
15
20
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
©2001 Fairchild Semiconductor Corporation
100
125
150
175
FIGURE 14. SWITCHING TIME vs JUNCTION TEMPERATURE
2400
400
75
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 13. LEAKAGE CURRENT vs JUNCTION
TEMPERATURE
C, CAPACITANCE (pF)
175
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 11. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
0
100
25
IG(REF) = 1mA, RL = 1.25Ω, TJ = 25oC
6
VCE = 12V
4
2
VCE = 6V
0
0
8
16
24
32
40
48
56
QG, GATE CHARGE (nC)
FIGURE 16. GATE CHARGE WAVEFORMS
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
Typical Performance Curves
Unless Otherwise Specified (Continued)
BVCER , BREAKDOWN VOLTAGE (V)
412
TJ (oC)
408
ICER = 10mA
-55
404
25
400
150
396
175
392
388
384
380
376
0
2
4
6
8
10
RG , GATE SERIES RESISTANCE (kΩ)
ZθJC , NORMALIZED THERMAL RESPONSE
FIGURE 17. BREAKDOWN VOLTAGE vs SERIES GATE RESISTANCE
100
0.5
0.2
10-1
0.1
t1
0.05
PD
0.02
0.01
10-2
t2
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZθJC X RθJC) + TC
SINGLE PULSE
10-5
10-4
10-3
10-2
10-1
100
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 18. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
3mH
VDD
R
or
L
C
LOAD
C
PULSE
GEN
RG
RG = 1kΩ
DUT
G
E
G
DUT
+
VDD
-
5V
E
FIGURE 19. INDUCTIVE SWITCHING TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
FIGURE 20. tON AND tOFF SWITCHING TEST CIRCUIT
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
TO-263AB
SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E
A
INCHES
A1
H1
MIN
MAX
MIN
MAX
A
0.170
0.180
4.32
4.57
-
A1
0.048
0.052
1.22
1.32
4, 5
TERM. 4
D
L2
L1
L
1
3
b
e
L3
b2
0.350
(8.89)
0.700
(17.78)
0.150
(3.81)
1
b
0.030
0.034
0.77
0.86
4, 5
0.045
0.055
1.15
1.39
4, 5
b2
0.310
-
7.88
-
2
c
0.018
0.022
0.46
0.55
4, 5
D
0.405
0.425
10.29
10.79
-
E
0.395
0.405
10.04
10.28
e1
0.450
(11.43)
TERM. 4
3
c
J1
e1
0.080 TYP (2.03)
0.062 TYP (1.58)
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
1.5mm
DIA. HOLE
NOTES
b1
e
b1
MILLIMETERS
SYMBOL
0.100 TYP
0.200 BSC
-
2.54 TYP
7
5.08 BSC
7
H1
0.045
0.055
1.15
1.39
-
J1
0.095
0.105
2.42
2.66
-
L
0.175
0.195
4.45
4.95
-
L1
0.090
0.110
2.29
2.79
4, 6
L2
0.050
0.070
1.27
1.77
3
L3
0.315
-
8.01
-
2
NOTES:
1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-263AB outline dated 2-92.
2. L3 and b2 dimensions established a minimum mounting surface
for terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L1 is the terminal length for soldering.
7. Position of lead to be measured 0.120 inches (3.05mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 10 dated 5-99.
4.0mm
USER DIRECTION OF FEED
2.0mm
TO-263AB
1.75mm
C
L
24mm TAPE AND REEL
24mm
16mm
COVER TAPE
40mm MIN.
ACCESS HOLE
30.4mm
13mm
330mm
100mm
GENERAL INFORMATION
1. 800 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
©2001 Fairchild Semiconductor Corporation
24.4mm
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
HGT1S14N41G3VLS, HGTP14N41G3VL
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A
INCHES
E
ØP
A1
Q
H1
TERM. 4
D
45o
E1
D1
L1
b1
L
b
c
SYMBOL
1
2
e1
J1
MIN
MAX
NOTES
A
0.170
0.180
4.32
4.57
-
0.048
0.052
1.22
1.32
-
b
0.030
0.034
0.77
0.86
3, 4
b1
0.045
0.055
1.15
1.39
2, 3
c
0.014
0.019
0.36
0.48
2, 3, 4
D
0.590
0.610
14.99
15.49
-
4.06
-
10.41
-
D1
-
0.160
E
0.395
0.410
E1
-
0.030
e1
3
e
MILLIMETERS
MAX
A1
e
60o
MIN
10.04
-
0.100 TYP
0.200 BSC
H1
0.235
0.255
J1
0.100
0.110
L
0.530
0.550
0.76
-
2.54 TYP
5
5.08 BSC
5
5.97
6.47
-
2.54
2.79
6
13.47
13.97
-
L1
0.130
0.150
3.31
3.81
2
ØP
0.149
0.153
3.79
3.88
-
Q
0.102
0.112
2.60
2.84
-
NOTES:
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L1.
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D.
7. Controlling dimension: Inch.
8. Revision 2 dated 7-97.
©2001 Fairchild Semiconductor Corporation
HGT1S14N41G3VLS, HGTP14N41G3VL Rev. A1
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Advance Information
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©2001 Fairchild Semiconductor Corporation
Rev. H4