MILITARY DATA SHEET Original Creation Date: 05/30/96 Last Update Date: 07/30/96 Last Major Revision Date: 05/30/96 MN54F273-X REV 1A0 OCTAL D FLIP-FLOP General Description The F273 has eight edge-triggered D-type Flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input one setup time before the LOW-to HIGH clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required, and the Clock and Master Reset are common to all storage elements. Industry Part Number NS Part Numbers 54F273 54F273DMQB 54F273FMQB 54F273LMQB Prime Die M273 Processing Subgrp Description MIL-STD-883, Method 5004 1 2 3 4 5 6 7 8A 8B 9 10 11 Quality Conformance Inspection MIL-STD-883, Method 5005 1 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 MILITARY DATA SHEET MN54F273-X REV 1A0 Features - Ideal buffer for MOS microprocessor or memory Eight edge-triggered D flip-flops Buffered common clock Buffered, asynchronous Master Reset See F377 for clock enable version See F373 for transparent latch version See F374 for TRI-STSTE version Guaranteed 4000V minimum ESD protection 2 MILITARY DATA SHEET MN54F273-X REV 1A0 (Absolute Maximum Ratings) (Note 1) Storage Temperature -65 C to +150 C Ambient Temperature under Bias -55 C to +125 C Junction Temperature under Bias -55 C to +175 C Vcc Pin Potential to Ground Pin -0.5V to +7.0V Input Voltage (Note 2) -0.5V to +7.0V Input Current (Note 2) -30mA to +5.0mA Voltage Applied to Output in HIGH State (with Vcc=0V) Standard Output TRI-STATE Output Current Applied to Output in LOW State (Max) -0.5V to Vcc -0.5V to +5.5V twice the rated Iol(mA) ESD Last Passing Voltage (Min) 4000V Note 1: Note 2: Absolute Maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions Free Air Ambient Temperature Commercial Military Supply Voltage Military Commercial 0 C to +70 C -55 C to +125 C +4.5V to +5.5V +4.5V to +5.5V 3 MILITARY DATA SHEET MN54F273-X REV 1A0 Electrical Characteristics DC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) DC: VCC 4.5V to 5.5V, Temp range: -55C to 125C SYMBOL PARAMETER CONDITIONS NOTES PINNAME MIN MAX UNIT SUBGROUPS IIH Input High Current VCC=5.5V, VM=2.7V, VINH=5.5V 1, 3 INPUTS 20 uA 1, 2, 3 IBVI Input High Current VCC=5.5V, VM=7.0V, VINH=5.5V 1, 3 INPUTS 100 uA 1, 2, 3 IIL Input LOW Current VCC=5.5V, VM=0.5V, VINH=5.5V 1, 3 INPUTS -0.6 mA 1, 2, 3 VOL Output LOW Voltage VCC=4.5V, VIL=0.8V, IOL=20mA, VINH=5.5V 1, 3 OUTPUTS 0.5 V 1, 2, 3 VOH Output HIGH Voltage VCC=4.5V, VIH=2.0V, IOH=-1.0mA, VINH=5.5V, VINL=0.0V 1, 3 OUTPUTS 2.5 V 1, 2, 3 IOS Short Circuit Current VCC=5.5V, VINH=5.5V, VINL=0.0V, VM=0.0V 1, 3 OUTPUTS -60 -150 mA 1, 2, 3 VCD Input Clamp Diode Voltage VCC=4.5V, IM=-18mA, VINH=5.5V 1, 3 INPUTS -1.2 V 1, 2, 3 ICCH Supply Current VCC=5.5V, VINH=5.5V, VINL=0.0V 1, 3 VCC 44 mA 1, 2, 3 ICCL Supply Current VCC=5.5V, VINH=5.5V, VINL=0.0V 1, 3 VCC 56 mA 1, 2, 3 ICEX Output HIGH Leakage Current VCC=5.5V, VINH=5.5V, VINL=0.0V, VM=5.5V 1, 3 OUTPUTS 250 uA 1, 2, 3 4 MILITARY DATA SHEET MN54F273-X REV 1A0 Electrical Characteristics AC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) AC: CL=50pf, RL=500 OHMS, TR=2.5ns, TF=2.5ns SEE AC FIGS SYMBOL tpLH(1) tpHL(1) tpHL(2) ts(H) ts(L) th(H) PARAMETER Propagation Delay Propagation Delay Propagation Delay Setup Time Setup Time Delay Delay Hold Time CONDITIONS NOTES VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C PINNAME MIN MAX UNIT SUBGROUPS 2, 4 CP to Qn 3.0 7.0 ns 9 2, 4 CP to Qn 2.5 9.5 ns 10, 11 2, 4 CP to Qn 4.0 9.0 ns 9 2, 4 CP to Qn 3.0 11.0 ns 10, 11 2, 4 MR to Q 4.5 9.5 ns 9 2, 4 MR to Q 3.0 11.0 ns 10, 11 5 Dn to CP 3.0 ns 9 5 Dn to CP 3.5 ns 10, 11 5 Dn to CP 3.5 ns 9 5 Dn to CP 4.0 ns 10, 11 5 Dn to CP 0.5 ns 9 5 Dn to CP 1.0 ns 10, 11 th(L) Hold Time VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 Dn to CP 1.0 ns 9, 10, 11 tw(L/H) Pulse Width VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 CP 4.0 ns 9 5 CP 5.0 ns 10, 11 tw(L) Pulse Width VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 MR 4.0 ns 9, 10, 11 tREC Recovery Time VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C 5 MR to CP 3.5 ns 9 5 MR to CP 4.5 ns 10, 11 5 CP 100 MHz 9 5 CP 95 MHz 10, 11 fMAX Maximum Clock Frequency Note 1: Note 2: Note 3: Note 4: VCC=5.0V @25C, VCC=4.5V & 5.5V @-55/125C Screen tested 100% on each device at +25C, +125C & -55C temperature, subgroups A1, 2, 3, 7 & 8. Screen tested 100% on each device at +25C temperature only, subgroup A9. Sample tested (Method 5005, Table 1) on each MFG. lot at +25C, +125C & -55C temperature, subgroups A1, 2, 3, 7 & 8. Sample tested (Method 5005, Table 1) on each MFG. lot at +25C subgroup A9, and periodically at +125C & -55C temperature, subgroups 10 & 11. 5 MILITARY DATA SHEET MN54F273-X REV 1A0 (Continued) Note 5: GUARANTEED BUT NOT TESTED. (Design Characterization Data) 6