AD ADG801BRT

PRELIMINARY TECHNICAL DATA
a
<0.5 Ω
CMOS, Low Voltage, SPST Switches
ADG801/ADG802
FEATURES
Low On Resistance < 0.5 Ω max at 5 V supply
0.1 Ω On Resistance Flatness
+1.8 V to +5.5 V Single Supply
100pA Leakage Currents
14ns Switching Times
Extended Temperature Range -40oC to +125oC
High Current Carrying Capability
Tiny 6 lead SOT23 and 8 Lead µSOIC Packages
Low Power Consumption
TTL/CMOS Compatible Inputs
Pin Compatible with ADG701/ADG702
APPLICATIONS
Power Routing
Audio and Video Signal Routing
Cellular Phones
Modems
PCMCIA Cards
Hard Drives
Data Acquisition Systems
Communication Systems
Relay replacement
Audio and Video Switching
Battery Powered Systems
FUNCTIONAL BLOCK DIAGRAMS
ADG801
S
ADG802
D
S
IN
IN
SWITCHES SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG801/ADG802 are monolithic CMOS SPST (Single
Pole, Single Throw) switches with On Resistance of less than
0.5Ω. These switches are designed on an advanced submicron
process that provides extremely low on resistance, high switching speed and low leakage currents.
1. Low On Resistance (0.25 Ω typical).
The low On Resistance of <0.5Ω means these parts are ideal
for applications where low on resistance switching is critical.
D
2. +1.8V to +5.5V Single Supply Operation.
3. Tiny 6 Lead SOT23 and 8 Lead µSOIC Packages.
4. Pin Compatible with ADG701 (ADG801)
Pin Compatible with ADG702 (ADG802).
The ADG801 is a normally open (NO) switch, while the
ADG802 is normally closed (NC). Each switch conducts
equally well in both directions when ON.
The ADG801 and ADG802 are available in 6-lead SOT-23
and 8 Lead µSOIC packages.
REV. PrE Jan ‘02
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
PRELIMINARY TECHNICAL DATA
ADG801/ADG802–SPECIFICATIONS1
(VDD = 5 V ±10%, VSS = GND = 0 V. All specifications –40°C to +125°C unless otherwise noted.)
o
Parameter
+25 C
–40oC to
+85oC
–40oC to
+125oC
0.5
0 V to VDD V
Ω
0.75
Ω
Ω
0.2
Ω
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
0.25
0.4
On-Resistance Flatness (RFLAT(ON)) 0.05
0.1
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
±0.01
±0.5
Drain OFF Leakage ID (OFF)
±0.01
±0.5
Channel ON Leakage ID, IS (ON) ±0.01
±0.5
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or I INH
DYNAMIC CHARACTERISTICS
tON
t OFF
VDD = +5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V;
Test Circuit 2
VS = VD = 1 V, or 4.5 V;
Test Circuit 3
±1
tbd
±1
tbd
±1
tbd
2.4
0.8
V min
V max
±0.1
µA typ VIN = VINL or VINH
µA max
pF typ
5
typ
max
typ
max
typ
max
VS = 0 V to VDD, IS = –10 mA;
Test Circuit 1
VS = 0 V to VDD, IS = –10 mA
2
30
TBD
Charge Injection
20
TBD
±20
Off Isolation
–65
Bandwidth –3 dB
C S (OFF)
C D (OFF)
C D, CS (ON)
30
55
55
110
POWER REQUIREMENTS
I DD
typ
max
typ
max
Test Conditions/Comments
nA
nA
nA
nA
nA
nA
0.005
C IN, Digital Input Capacitance
Units
TBD
TBD
0.001
1.0
ns typ
ns max
RL = 50 Ω, CL = 35 pF
VS = 3 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF
VS = 3 V; Test Circuit 4
VS = 0 V, RS = 0 Ω, CL = 1 nF, Test
Circuit 5
dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz,
Test Circuit 6
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 7
pF typ f = 1 MHz
pF typ f = 1 MHz
pF typ f = 1 MHz
ns typ
ns max
pC typ
VDD = +5.5 V
µA typ Digital Inputs = 0 V or 5.5 V
µA max
NOTES
1
Temperature ranges are as follows: Extended Temperature Range: – 40°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
–2–
REV. PrE
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
SPECIFICATIONS1(V
DD
= 2.7 V to 3.6 V, VSS = GND = 0 V. All specifications –40°C to +125°C unless otherwise noted.)
o
Parameter
+25 C
–40oC to –40oC to
+85oC
+125oC
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
0.3
0.7
On-Resistance Flatness(RFLAT(ON)) 0.1
0.8
0 V to VDD V
1
Ω typ
Ω max
0.3
Ω typ
LEAKAGE CURRENTS
Source OFF Leakage IS (OFF)
±0.01
±0.5
Drain OFF Leakage ID (OFF)
±0.01
±0.5
Channel ON Leakage ID, IS (ON) ±0.01
±0.5
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
±0.1
tbd
±0.1
tbd
±0.1
tbd
nA
nA
nA
nA
nA
nA
typ
max
typ
max
typ
max
2.0
0.4
V min
V max
±0.1
µA typ
µA max
pF typ
0.005
CIN, Digital Input Capacitance
Units
5
Test Conditions/Comments
VS = 0 V to VDD, IS = –10 mA;
Test Circuit 1
VS = 0 V to VDD, IS = –10 mA
VDD = +3.3 V
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = 3 V/1 V, VD = 1 V/3 V;
Test Circuit 2
VS = VD = 1 V, or 3 V;
Test Circuit 3
VIN = VINL or VINH
2
DYNAMIC CHARACTERISTICS
tON
50
TBD
t OFF
40
TBD
Charge Injection
±20
Off Isolation
–65
Bandwidth –3 dB
C S (OFF)
C D (OFF)
CD, CS (ON)
30
55
55
110
POWER REQUIREMENTS
IDD
TBD
TBD
0.001
1.0
RL = 50 Ω, CL = 35 pF
VS = 1.5 V, Test Circuit 4
RL = 50 Ω, CL = 35 pF
ns max
VS = 1.5 V, Test Circuit 4
pC typ
VS = 0 V, RS = 0 Ω, CL = 1 nF, Test
Circuit 5
dB typ
RL = 50 Ω, CL = 5 pF, f = 1 MHz,
Test Circuit 6
MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 7
pF typ
f = 1 MHz
pF typ
f = 1 MHz
pF typ
f = 1 MHz
ns typ
ns max
ns typ
µA typ
µA max
NOTES
1
Temperature ranges are as follows: Extended Temperature Range: –40°C to +125°C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. PrE
–3–
VDD = +3.3 V
Digital Inputs = 0 V or 3.3 V
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Inputs2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.3 V to VDD +0.3 V
. . . . . . . . . . . . . . . . . . . . or 30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 400 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 800 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Extended . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
µSOIC Package, Power Dissipation . . . . . . . . . . . 315 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . 206°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . . . 44°C/W
SOT-23 Package, Power Dissipation . . . . . . . . . . 282 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . 229.6°C/W
θJC Thermal Impedance . . . . . . . . . . . . . . . . . 91.99°C/W
Lead Temperature, Soldering (10seconds) . . . . . . . 300°C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . +220°C
ESD.....................................................................2kV
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above
those listed in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods
may affect device reliability. Only one absolute maximum rating may
be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
Table I. Truth Table
ADG801 In
ADG802 In
Switch Condition
0
1
1
0
OFF
ON
PIN CONFIGURATIONS
6-Lead Plastic Surface Mount (SOT-23)
(RT-6)
D 1
ADG801/
ADG802
S 2
GND 3
6
V DD
5
NC
TOP VIEW 4
(Not to Scale)
8-Lead Small Outline µ SOIC
(RM-8)
D
NC
IN
1
2
ADG801/
ADG802
8
S
7
GND
NC 3
TOP VIEW 6 IN
V DD 4 (Not to Scale) 5 NC
NC = NO CONNECT
NC = NO CONNECT
ORDERING GUIDE
Model
Temperature Range
Supply Option1 Brand1
Package Descriptions
ADG801BRT
ADG801BRM
ADG802BRT
ADG802BRM
–40°C
–40°C
–40°C
–40°C
3
3
3
3
SOT-23 (Plastic Surface Mount) RT-6
µSOIC (Small Outline)
RM-8
SOT-23 (Plastic Surface Mount) RT-6
µSOIC (Small Outline)
RM-8
1
to
to
to
to
+125°C
+125°C
+125°C
+125°C
V,
V,
V,
V,
5
5
5
5
V
V
V
V
SLB
SLB
SMB
SMB
Package Options
Branding on SOT-23 and µSOIC packages is limited to 3 characters due to space constraints.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG801/ADG802 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
WARNING!
ESD SENSITIVE DEVICE
REV. PrE
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
TERMINOLOGY
VDD
Most positive power supply potential.
IDD
Positive supply current.
GND
Ground (0 V) reference.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
IN
Logic control input.
VD (VS)
Analog voltage on terminals D, S
RON
Ohmic resistance between D and S.
RFLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured
over the specified analog signal range.
IS (OFF)
Source leakage current with the switch “OFF.”
ID (OFF)
Drain leakage current with the switch “OFF.”
ID, IS (ON)
Channel leakage current with the switch “ON.”
VINL
Maximum input voltage for logic “0”.
VINH
Minimum input voltage for logic “1”.
IINL(IINH)
Input current of the digital input.
CS (OFF)
“OFF” switch source capacitance. Measured with reference to ground.
CD (OFF)
“OFF” switch drain capacitance. Measured with reference to ground.
CD,CS(ON)
“ON” switch capacitance. Measured with reference to ground.
CIN
tON
tOFF
Digital input capacitance.
Delay between applying the digital control input and the output switching on. See Test Circuit 4.
Delay between applying the digital control input and the output switching off.
Charge
Injection
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an “OFF” switch.
Crosstalk
A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic
capacitance.
Bandwidth
The frequency at which the output is attenuated by 3dBs.
On Response The Frequency response of the “ON” switch.
Insertion
Loss
REV. PrE
The loss due to the ON resistance of the switch.
–5–
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
TYPICAL PERFORMANCE CHARACTERISTICS
TBD
TBD
TBD
Figure 1. On Resistance as a Function
of VD(VS)
Figure 4. Leakage Currents as a function of VD(VS)
Figure 7. Leakage Currents as a
Function of Temperature
TBD
TBD
TBD
Figure 2. On Resistance as a Function
of VD(VS) for Different Temperatures
Figure 5. Leakage Currents as a function of VD(VS)
Figure 8. Supply Currents vs. Input
Switching Frequency
TBD
TBD
TBD
Figure 3. On Resistance as a Function
of VD(VS) for Different Temperatures
Figure 6. Leakage Currents as a function of Temperature
Figure 9. Charge Injection vs. Source
Voltage
–6–
REV. PrE
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
TBD
TBD
Figure 10. TON/TOFF Times vs. Temperature
Figure 13. On Response vs. Frequency
TBD
Figure 11. Off Isolation vs. Frequency
TBD
Figure 12. Crosstalk vs. Frequency
REV. PrE
–7–
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
Test Circuits
IDS
V1
IS (OFF)
S
VS
D
RON = V1/IDS
D
A
VS
Test Circuit 1. On Resistance
ID (ON)
ID (OFF)
S
A
S
NC
VD
D
A
VD
NC=No Connect
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VDD
0.1µ F
VIN ADG801
50%
50%
VIN
50%
50%
VDD
S
VS
VOUT
D
IN
ADG802
CL
35pF
RL
300⍀
90%
VOUT
90%
GND
tOFF
tON
Test Circuit 4. Switching Times
VDD
VDD
RS
VIN
S
ADG801
ON
VOUT
D
VS
CL
1nF
IN
VIN
OFF
ADG802
VOUT
GND
QINJ = CL ⴛ ⌬VOUT
⌬VOUT
Test Circuit 5. Charge Injection
VDD
VDD
0.1µ F
0.1µ F
NETWORK
ANALYZER
VDD
S
50 Ω
IN
VDD
50 Ω
S
VS
VIN
GND
RL
50 Ω
50 Ω
IN
D
VS
D
VOUT
VIN
GND
OFF ISOLATION = 20 LOG
NETWORK
ANALYZER
VOUT
VS
INSERTION LOSS = 20 LOG
Test Circuit 6. Off Isolation
RL
50 Ω
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Test Circuit 7. Bandwidth
–8–
REV. PrE
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead µSOIC
(RM-8)
6-Lead SOT-23
(RT-6)
0.122 (3.10)
0.114 (2.90)
8
0.122 (3.10)
0.114 (2.90)
0.122 (3.10)
0.106 (2.70)
5
0.071 (1.80)
0.059 (1.50)
0.199 (5.05)
0.187 (4.75)
1
6
5
4
1
2
3
0.118 (3.00)
0.098 (2.50)
4
PIN 1
PIN 1
0.037 (0.95) BSC
0.0256 (0.65) BSC
0.120 (3.05)
0.112 (2.84)
0.006 (0.15)
0.002 (0.05)
0.018 (0.46)
SEATING 0.008 (0.20)
PLANE
REV. PrE
0.075 (1.90)
BSC
0.120 (3.05)
0.112 (2.84)
0.043 (1.09)
0.037 (0.94)
0.011 (0.28)
0.003 (0.08)
33°
27°
0.051 (1.30)
0.035 (0.90)
0.006 (0.15)
0.000 (0.00)
0.028 (0.71)
0.016 (0.41)
–9–
0.057 (1.45)
0.035 (0.90)
0.020 (0.50) SEATING
0.010 (0.25) PLANE
10ⴗ
0.009 (0.23) 0ⴗ
0.003 (0.08)
0.022 (0.55)
0.014 (0.35)