Low Voltage 2-1 Mux, Level Translator ADG3232* FEATURES Operates from 1.65 V to 3.6 V Supply Rails Unidirectional Signal Path, Bidirectional Level Translation Tiny 8-Lead SOT-23 Package Short Circuit Protection LVTTL/CMOS Compatible Inputs APPLICATIONS Level Translation Low Voltage ASIC Translation Low Voltage Clock Switching Serial Interface Translation FUNCTIONAL BLOCK DIAGRAM ���� ���� �� � �� EN ��� GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG3232 is a level translator 2-1 mux designed on a submicron process and operates from supplies as low as 1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supply voltages, allowing bidirectional level translation, i.e., it translates low voltages to higher voltages and vice versa. The signal path is unidirectional, meaning data may flow only from A to Y. 2. The device offers high performance and is fully guaranteed across the supply range. This type of device may be used in applications requiring communication between devices operating from different supply levels. The level translator mux is packaged in one of the smallest footprints available for its pin count. The 8-lead SOT-23 package requires only 8.26 mm 8.26 mm of board space. 1. Bidirectional level translation matches any voltage level from 1.65 V to 3.6 V. 3. Short circuit protection. 4. Tiny SOT-23 package. Table I. Truth Table EN Function L H A1–Y A2–Y *Patent Pending REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. ADG3232–SPECIFICATIONS1 otherwise noted.) (VCC1 = VCC2 = 1.65 V to 3.6 V, GND = 0 V. All specifications TMIN to TMAX, unless Parameter Symbol Conditions Min Output Low Voltage VOL VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V VCC1 = 3.0 V to 3.6 V VCC1 = 2.3 V to 2.7 V VCC1 = 1.65 V to 1.95 V IOH = –100 mA, VCC2 = 3.0 V to 3.6 V VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = –4 mA, VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = –8 mA, VCC2 = 3.0 V to 3.6 V IOH = +100 mA, VCC2 = 3.0 V to 3.6 V VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = +4 mA, VCC2 = 2.3 V to 2.7 V VCC2 = 1.65 V to 1.95 V IOH = +8 mA, VCC2 = 3.0 V to 3.6 V 1.35 1.35 0.65 VCC Output High Voltage VIH VIH VIH VIL VIL VIL VOH LOGIC INPUTS/OUTPUTS3 Input High Voltage4 Input Low Voltage4 SWITCHING CHARACTERISTICS4, 5 Propagation Delay, tPD A1 to Y tPHL, tPLH A2 to Y tPHL, tPLH A1 to Y tPHL, tPLH A2 to Y tPHL, tPLH A1 to Y tPHL, tPLH A2 to Y tPHL, tPLH ENABLE Time EN to Y tEN DISABLE Time EN to Y tDIS ENABLE Time EN to Y tEN DISABLE Time EN to Y tDIS ENABLE Time EN to Y tEN DISABLE Time EN to Y tDIS Input Leakage Current II Output Leakage Current IO POWER REQUIREMENTS Power Supply Voltages Quiescent Power Supply Current Increase in ICC per Input ICC1 ICC2 ICC12 4 3.5 5 4.5 6.5 6.5 4.5 4 5 4.8 7 6.5 1.65 1.65 Digital Inputs = 0 V or VCC Digital Inputs = 0 V or VCC VCC = 3.6 V, One Input at 3.0 V; Others at VCC or GND Max Unit 0.40 0.40 0.45 0.40 0.45 0.40 V V V V V V V V V V V V V V V V V V 6.5 5.4 7.2 6.5 10.25 10 6.5 6.5 7.7 7.2 12 10.5 ±1 ±1 ns ns ns ns ns ns ns ns ns ns ns ns µA µA 3.6 3.6 V V 2 2 µA µA 0.75 µA 0.80 0.70 0.35 VCC 2.4 2.0 VCC – 0.45 2.0 VCC – 0.45 2.4 3.3 V ± 0.3 V, CL = 30 pF, VT = VCC/2 3.3 V ± 0.3 V, CL = 30 pF, VT = VCC/2 2.5 V ± 0.2 V, CL = 30 pF, VT = VCC/2 2.5 V ± 0.2 V, CL = 30 pF, VT = VCC/2 1.8 V ± 0.15 V, CL = 30 pF, VT = VCC/2 1.8 V ± 0.15 V, CL = 30 pF, VT = VCC/2 3.3 V ± 0.3 V, CL = 30 pF, VT = VCC/2 3.3 V ± 0.3 V, CL = 30 pF, VT = VCC/2 2.5 V ± 0.2 V, CL = 30 pF, VT = VCC/2 2.5 V ± 0.2 V, CL = 30 pF, VT = VCC/2 1.8 V ± 0.15 V, CL = 30 pF, VT = VCC/2 1.8 V ± 0.15 V, CL = 30 pF, VT = VCC/2 0 VIN 3.6 V 0 VIN 3.6 V VCC1 VCC2 Typ2 NOTES 1 Temperature range is as follows: B Version, –40°C to +85°C. 2 All typical values are at VCC1 = VCC2, TA = 25°C, unless otherwise stated. 3 VIL and VIH levels are specified with respect to VCC1; VOH and VOL levels are with respect to VCC2. 4 Guaranteed by design, not subject to production test. 5 See Test Circuits and Waveforms. Specifications subject to change without notice. –2– REV. A ADG3232 ABSOLUTE MAXIMUM RATINGS* 8-Lead SOT-23 JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 211°C/W Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . . . 300°C IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . . . 235°C (TA = 25°C, unless otherwise noted.) VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V A1, EN Input Voltage . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V A2 . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC1 to +0.3 V DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . –40°C to +85°C Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. PIN CONFIGURATION ���� � �� � �� � ������� � ���� � �� � � �������� EN � �������������� � ��� ��������������� CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG3232 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ORDERING GUIDE Model Temperature Range Package Description Package Option Branding ADG3232BRJ-REEL ADG3232BRJ-REEL7 –40°C to +85°C –40°C to +85°C SOT-23 SOT-23 RJ-8 RJ-8 W3B W3B PIN FUNCTION DESCRIPTIONS Pin No. Mnemonic Description 1 2 3 4 5 6 7 8 Supply Voltage 1 can be any supply voltage from 1.65 V to 3.6 V. Input Referred to VCC1. Input Referred to VCC1. Active Low Device Enable. When low, bypass mode is enabled; when high, the device is in normal mode. Device Ground Pin. Output Referred to VCC2. Not Internally Connected. Supply Voltage 2 can be any supply voltage from 1.65 V to 3.6 V. REV. A VCC1 A1 A2 EN GND Y NC VCC2 –3– ADG3232–Typical Performance Characteristics ��� ��� ��� ��� ��� ��� ��� ��� ����������� ��� ��� � ��� ��� ��� ��� �������� ��� ��� ��� ����������� � ��� ����������� ��� 1800 ����������� � ��� � 80 VCC1 = V CC2 = 3.3V 800 �� �� �� �� �� �� ���������������� 2000 TA = 25C 1800 1600 1600 1400 1400 ICC2 – A VCC1 = V CC2 = 3.3V 1000 800 600 400 VCC1 = V CC2 = 1.8V VCC1 = V CC2 = 3.3V 50 40 30 VCC1 = V CC2 = 1.8V 0 10k 100M 800 VCC1 = V CC2 = 1.8V � ��� � 1M 10M FREQUENCY – Hz 100M TPC 7. ICC2 vs. Frequency, A1–Y 100k 1M 10M FREQUENCY – Hz 100M TPC 8. ICC2 vs. Frequency, A2–Y –4– ���� � 200 100k 100M � VCC1 = V CC2 = 3.3V 1000 0 10k 1M 10M FREQUENCY – Hz �� 1200 400 100k TPC 6. ICC1 vs. Frequency, A2–Y TA = 25C 600 200 0 10k 1M 10M FREQUENCY – Hz TPC 5. ICC1 vs. Frequency, A1–Y TPC 4. ICC2 vs. Temperature 1200 100k �� TA = 25C 10 0 10k �� �� �� �� �� �� ���������������� 20 VCC1 = V CC2 = 1.8V ��������� �� �� 60 200 � �� 70 1000 400 � TPC 3. ICC1 vs. Temperature TA = 25C 1200 600 � ICC2 – A ��� ICC1 – A ����������� �� 1800 ��� �������� 1400 ICC1 – A ��������� 2000 ����������� �� 2000 ��� 1600 �� �� ��� TPC 2. ICC2 vs. VCC2 ����������� ��������� �� ����������� � TPC 1. ICC1 vs. VCC1 �� ����������� �� ����������� ��� ��� ����������� �� �� ��� ����������� ����������� ��������� �� ��� ����������� �� ��������� ��� ��������� ��������� ��� ��������� ��� ��������� ��� � ��������� ����������� ��� ��� ��� ��� ���������� ��� ��� TPC 9. Enable, Disable Time vs. Supply REV. A ADG3232 �� � ��� ������������������� �� �� ���� � � � � � ��� �� �� �� �� �� �� �� � ���������������������������� � � �� ��� � � � ���������������������������� � � ����������� ����������� � ��������� ���������������� � �� �� �� �� �� �� �� �������������������� TPC 13. Propagation Delay vs. Capacitive Load, A2–Y ���������������������� ���������� ���������� ��� ��������� ����������� ��� ��� TPC 16. Propagation Delay vs. Supply, A1–Y REV. A ��� ��� ��� ���������� ��� ��� ��� � ��� ���������� ��������� ����������� ��� ��� ��� ��� ���������� ��� ��� TPC 15. Propagation Delay vs. Supply ���������� ���������� ��� ���������� ��� ��� ��� ��� ��� ��� ��� ���������� �� ��� ��� � ��� �� ��� ��� �� �� �� �� �� �������������������� ��� ��� TPC 14. Propagation Delay vs. Capacitive Load, A1–Y ��� ��� �� ��� ���������������������������� ���������������������� ���������������������� � ����������� ����������� � ��������� ���������������� � �� �� �� �� �� �� �� �������������������� �� ��� � ���������������������������� � ���������������������������� TPC 12. Rise/Fall Time vs. Capacitive Load, A1/A2–Y � � � � ��� TPC 11. Rise/Fall Time vs. Capacitive Load, A1/A2–Y � ���������������������� �� � �������������������� TPC 10. Enable, Disable Time vs. Temperature ���������������������� �� � � � � �� �� �� ����������������� � � ���������������������������� � ������������������ � ��� ���������������������������� � ����������� ����������� ��������� � ���������������� ���������������������������� � � ���������������������� ��������� � �� ����������� ����������� ��������� ���������������� �� ������������������� � � ��� ��������� ������������������ ��� � �� �� �� ���������������� TPC 17. Propagation Delay vs. Temperature –5– �� ��� ���������� ��� ��� � ��� ��������� ������������������ ��� � �� �� �� ���������������� TPC 18. Propagation Delay vs. Temperature, A1–Y �� ADG3232 ��������� EN�=����� 1.8V A1 �� Y 3.3V 3 2 ���� � �� � � ���� 1 TA = 25�C DATA RATE = 10MHz ����������������� � TPC 19. Input/Output VCC1 = 3.3 V, VCC2 = 1.8 V TA = 25�C DATA RATE = 10MHz TPC 22. Input/Output VCC1 = 3.3 V, VCC2 = 1.8 V 3.3V ��� ��������� ����������������� ��� ���������� A1 1.8V ����������� Y ��� 3 2 ������ ��� ���������� ��� ���������� ��� ���������� ���������� ���������� ��� ���� � TPC 20. Input/Output VCC1 = 1.8 V, VCC2 = 3.3 V �� � � �� �� �� ������������ TPC 23. Y Sink and Source Current ���� � ���� �� � � ���� � ��������� ����������������� TPC 21. Input/Output VCC1 = 1.8 V, VCC2 = 3.3 V –6– REV. A ADG3232 TEST CIRCUITS DESCRIPTION The ADG3232 is a mux level translating device designed on a submicron process that operates from supplies as low as 1.65 V. The device is guaranteed for operation over the supply range 1.65 V to 3.6 V. It operates from two supply voltages, allowing bidirectional level translation, i.e., it translates lower voltages to higher voltages and vice versa. The signal path is unidirectional, meaning data may only flow from A to Y. VCC1 INPUT VT 0V tPHL tPLH VOH OUTPUT VL VOL A1 and EN Input Figure 1. Propagation Delay The A1 and enable (EN) inputs have VIL/VIH logic levels so that the part can accept logic levels of VOL/VOH independent of the value of the supply being used. Both these inputs (A1 and EN) are capable of accepting inputs outside the VCC1 supply range. There are no internal diodes to the supply rails on these pins, so they can handle inputs above the supply but inside the absolute maximum ratings. VCC1 VT EN 0V tEN tDIS VCC1 A1 A2 0V Operation VCC1 Figure 3 shows the ADG3232 in a typical application; the signal paths are from A1 or A2 to Y. The device will level translate the signal applied to A1/A2 from a VCC1 logic level (this level translation can be either to a higher or a lower supply) and route the signal to the Y output, which will have standard VOL/VOH levels for VCC2 supplies. 0V Y2 VOH VT VT VOL The supplies in Figure 3 may be any combination of supplies, e.g., VCC1 and VCC2 may be anywhere in the 1.65 V to 3.6 V range. Figure 2. Enable and Disable Times ���� ���� ���� ������������ ���� �� �������� ������������ ������������ ���� � �� �������� �������� EN ��� Figure 3. Typical Operation of the ADG3232 Level Translating Switch REV. A –7– ADG3232 OUTLINE DIMENSIONS 8-Lead Small Outline Transistor Package [SOT-23] (RJ-8) Dimensions shown in millimeters 8 7 6 5 1 2 3 4 1.60 BSC C03299–0–7/03(A) 2.90 BSC 2.80 BSC PIN 1 0.65 BSC 1.30 1.15 0.90 1.95 BSC 1.45 MAX 0.15 MAX 0.38 0.22 SEATING PLANE 0.22 0.08 8 4 0 0.60 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-178BA Revision History Location Page 7/03—Data Sheet changed from REV. 0 to REV. A. Change to PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 –8– REV. A