AD ADG3233BRJ-REEL

Low Voltage 1.65 V to 3.6 V, Bidirectional
Logic Level Translation, Bypass Switch
ADG3233*
FEATURES
Operates from 1.65 V to 3.6 V Supply Rails
Bidirectional Level Translation, Unidirectional
Signal Path
8-Lead SOT-23 and MSOP Packages
Bypass or Normal Operation
Short Circuit Protection
FUNCTIONAL BLOCK DIAGRAM
VCC1 VCC2
VCC1
A1
APPLICATIONS
JTAG Chain Bypassing
Daisy-Chain Bypassing
Digital Switching
Y1
VCC1
VCC1 VCC2
VCC2
0
Y2
1
A2
EN
GND
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.
1. Bidirectional level translation matches any voltage level from
1.65 V to 3.6 V.
This type of device may be used in applications that require a
bypassing function. It is ideally suited to bypassing devices in a
JTAG chain or in a daisy-chain loop. One switch could be used for
each device or a number of devices, thus allowing easy bypassing
of one or more devices in a chain. This may be particularly
useful in reducing the time overhead in testing devices in the
JTAG chain or in daisy-chain applications where the user does
not wish to change the settings of a particular device.
2. The bypass switch offers high performance and is fully
guaranteed across the supply range.
3. Short circuit protection.
4. Tiny 8-lead SOT-23 package, 8.26 mm ⫻ 8.26 mm board area,
or 8-lead MSOP.
Table I. Truth Table
EN
Signal Path
Function
L
H
A1→Y2, Y1→VCC1
A1→Y1, A2→Y2
Enable Bypass Mode
Enable Normal Mode
The bypass switch is packaged in two of the smallest footprints
available for its required pin count. The 8-lead SOT-23 package
requires only 8.26 mm ⫻ 8.26 mm board space, while the MSOP
package occupies approximately 15 mm ⫻ 15 mm board area.
*Patent Pending
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
= V = 1.65 V to 3.6 V, GND = 0 V, All specifications T
ADG3233–SPECIFICATIONS1 (Votherwise
noted.)
CC1
Parameter
LOGIC INPUTS/OUTPUTS
Input High Voltage4
Symbol
3
VIH
Input Low Voltage4
VIL
Output High Voltage (Y1)
VOH
Output Low Voltage (Y1)
VOL
LOGIC OUTPUTS3
Output High Voltage (Y2)
VOH
Output Low Voltage (Y2)
VOL
SWITCHING CHARACTERISTICS 4, 5
VCC = VCC1 = VCC2 = 3.3 V ± 0.3 V
Propagation Delay, tPD
A1 to Y1 Normal Mode
A2 to Y2 Normal Mode
A1 to Y2 Bypass Mode
ENABLE Time EN to Y1
DISABLE Time EN to Y1
ENABLE Time EN to Y2
DISABLE Time EN to Y2
VCC = VCC1 = VCC2 = 2.5 V ± 0.2 V
Propagation Delay, tPD
A1 to Y1 Normal Mode
A2 to Y2 Normal Mode
A1 to Y2 Bypass Mode
ENABLE Time EN to Y1
DISABLE Time EN to Y1
ENABLE Time EN to Y2
DISABLE Time EN to Y2
VCC = VCC1 = VCC2 = 1.8 V ± 0.15 V
Propagation Delay, tPD
A1 to Y1 Normal Mode
A2 to Y2 Normal Mode
A1 to Y2 Bypass Mode
ENABLE Time EN to Y1
DISABLE Time EN to Y1
ENABLE Time EN to Y2
DISABLE Time EN to Y2
CC2
Conditions
(VCC2 = 1.65 V to 3.6 V, GND = 0 V)
VCC1 = 3.0 V to 3.6 V
VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
VCC1 = 3.0 V to 3.6 V
VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
IOH = –100 µA, VCC1 = 3.0 V to 3.6 V
VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
IOH = –4 mA, VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
IOH = –8 mA, VCC1 = 3.0 V to 3.6 V
IOL = +100 µA, VCC1 = 3.0 V to 3.6 V
VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
IOL = +4 mA, VCC1 = 2.3 V to 2.7 V
VCC1 = 1.65 V to 1.95 V
IOL = +8 mA, VCC1 = 3.0 V to 3.6 V
(VCC1 = 1.65 V to 3.6 V, GND = 0 V)
IOH = –100 µA, VCC2 = 3.0 V to 3.6 V
VCC2 = 2.3 V to 2.7 V
VCC2 = 1.65 V to 1.95 V
IOH = –4 mA, VCC2 = 2.3 V to 2.7 V
VCC2 = 1.65 V to 1.95 V
IOH = –8 mA, VCC2 = 3.0 V to 3.6 V
IOL = +100 µA, VCC2 = 3.0 V to 3.6 V
VCC2 = 2.3 V to 2.7 V
VCC2 = 1.65 V to 1.95 V
IOL = +4 mA, VCC2 = 2.3 V to 2.7 V
VCC2 = 1.65 V to 1.95 V
IOL = +8 mA, VCC2 = 3.0 V to 3.6 V
MIN
Min
Typ2
to TMAX, unless
Max
1.35
1.35
0.65 VCC
Unit
0.40
0.40
0.45
0.40
0.45
0.40
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
0.40
0.40
0.45
0.40
0.45
0.40
V
V
V
V
V
V
V
V
V
V
V
V
0.8
0.7
0.35 VCC
2.4
2.0
VCC – 0.45
2.0
VCC – 0.45
2.4
2.4
2.0
VCC – 0.45
2.0
VCC – 0.45
2.4
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tEN
tDIS
tEN
tDIS
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
3.5
3.5
4
4
2.8
4.5
4
5.4
5.4
6.5
6
4
6.5
6.5
ns
ns
ns
ns
ns
ns
ns
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tEN
tDIS
tEN
tDIS
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
4.5
4.5
4.5
5
3.2
5
4.8
6.2
6.2
6.5
7.2
4.7
7.7
7.2
ns
ns
ns
ns
ns
ns
ns
tPHL, tPLH
tPHL, tPLH
tPHL, tPLH
tEN
tDIS
tEN
tDIS
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
CL = 30 pF, VT = VCC/2
6.7
6.5
6.5
7
4.4
7
6.5
10
10
10.25
10.5
6.5
12
10.5
ns
ns
ns
ns
ns
ns
ns
–2–
REV. 0
ADG3233
Parameter
SWITCHING CHARACTERISTICS
Input Leakage Current
Output Leakage Current
Symbol
4, 5
POWER REQUIREMENTS
Power Supply Voltages
Quiescent Power Supply Current
Increase in ICC per Input
(continued)
II
IO
VCC1
VCC2
ICC1
ICC2
∆ ICC1
Conditions
Min
0 ⱕ VIN ⱕ 3.6 V
0 ⱕ VIN ⱕ 3.6 V
1.65
1.65
Digital Inputs = 0 V or V CC
Digital Inputs = 0 V or V CC
VCC = 3.6 V, One Input at 3.0 V;
Others at VCC or GND
Typ2
Max
Unit
±1
±1
µA
µA
3.6
3.6
2
2
V
V
µA
µA
0.75
µA
NOTES
1
Temperature range is as follows: B Version: –40°C to +85°C.
2
All typical values are at V CC = VCC1 = VCC2, TA = 25°C, unless otherwise stated.
3
VIL and VIH levels are specified with respect to V CC1, VOH and VOL levels for Y1 are specified with respect to VCC1, and VOH and VOL levels are specified for Y2 with
respect to VCC2.
4
Guaranteed by design, not subject to production test.
5
See Test Circuits and Waveforms.
Specifications subject to change without notice.
REV. 0
–3–
ADG3233
ABSOLUTE MAXIMUM RATINGS*
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C
(TA = 25°C, unless otherwise noted.)
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
Digital Inputs to GND . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
A1, EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +4.6 V
A2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC1 + 0.3V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
8-Lead MSOP
␪JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
␪JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 43°C/W
8-Lead SOT-23
␪JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 211°C/W
*
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.
ORDERING GUIDE
Model
Temperature Range
Package Description
Branding
Package Option
ADG3233BRJ-REEL
ADG3233BRJ-REEL7
ADG3233BRM
ADG3233BRM-REEL
ADG3233BRM-REEL7
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
SOT-23
SOT-23
MSOP
MSOP
MSOP
W1B
W1B
W1B
W1B
W1B
RJ-8
RJ-8
RM-8
RM-8
RM-8
PIN CONFIGURATIONS
8-Lead MSOP Package (RM-8)
8-Lead SOT-23 Package (RJ-8)
VCC1 1
A1 2
ADG3233
8
VCC2
7
Y1
VCC2 1
Y1 2
6 Y2
TOP VIEW
EN 4 (Not to Scale) 5 GND
ADG3233
8
VCC1
7
A1
6 A2
TOP VIEW
GND 4 (Not to Scale) 5 EN
A2 3
Y2 3
PIN FUNCTION DESCRIPTIONS
Pin
RJ-8 RM-8 Mnemonic Description
1
8
2
3
7
6
8
1
7
6
2
3
VCC1
VCC2
A1
A2
Y1
Y2
4
5
5
4
EN
GND
Supply Voltage 1, can be any supply voltage from 1.65 V to 3.6 V.
Supply Voltage 2, can be any supply voltage from 1.65 V to 3.6 V.
Input Referred to VCC1.
Input Referred to VCC2.
Output Referred to VCC1.
Output Referred to VCC2. Voltage levels appearing at Y2 will be translated from VCC1 voltage level to a
VCC2 voltage level.
Active Low Device Enable. When low, bypass mode is enabled; when high, the device is in normal mode.
Device Ground.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG3233 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
–4–
REV. 0
Typical Performance Characteristics–ADG3233
5.0
30
TA = 25ⴗC
4.5
4.0
3.5
3.5
3.0
2.5
2.0
VCC2 = 3.3V
TA = 25ⴗC
25
ICC1 – nA
4.0
ICC2 – nA
ICC1 – nA
5.0
TA = 25ⴗC
4.5
3.0
2.5
VCC1 = 3.3V
20
VCC1 = 2.5V
15
VCC1 = 1.8V
2.0
1.5
VCC2 = 2.5V
1.0
1.5
VCC2 = 3.3V
0
1.5
VCC1 = 3.3V
1.0
VCC2 = 1.8V
0.5
10
VCC1 = 2.5V
5
0.5
VCC1 = 1.8V
0
2.0
2.5
3.0
VCC1 – V
3.5
4.0
1.5
TPC 1. ICC1 vs. VCC1
2.0
2.5
3.0
VCC2 – V
3.5
0
0
4.0
TPC 2. ICC2 vs. VCC2
30
25
1800
20
30
40
50 60
70
TEMPERATURE – ⬚C
80
TA = 25ⴗC
TA = 25ⴗC
70
VCC1 = V CC2 = 3.3V
1600
60
1400
15
VCC2 = 2.5V
10
VCC2 = 1.8V
VCC1 = V CC2 = 3.3V
1000
800
400
0
20
VCC1 = V CC2 = 1.8V
VCC1 = V CC2 = 1.8V
10
200
0
10k
–5
0
10
20
30 40 50
60 70
TEMPERATURE – ⬚C
80
TPC 4. ICC2 vs. Temperature
100k
1M
10M
FREQUENCY – Hz
0
10k
100M
TPC 5. ICC1 vs. Frequency,
Normal Mode
2000
1800
1600
1600
1400
1400
1000
800
600
400
VCC1 = V CC2 = 1.8V
800
6
100k
1M
10M
FREQUENCY – Hz
100M
0
10k
tEN
tDIS
4
VCC1 = V CC2 = 1.8V
2
TA = 25ⴗC
VCC1 = VCC2
200
TPC 7. ICC2 vs. Frequency,
Normal Mode
REV. 0
1000
400
200
0
10k
1200
600
100M
8
TIME – ns
VCC1 = V CC2 = 3.3V
10M
1M
FREQUENCY – Hz
10
TA = 25ⴗC
VCC1 = V CC2 = 3.3V
ICC2 –␮A
1200
100k
TPC 6. ICC1 vs. Frequency,
Bypass Mode
2000
TA = 25ⴗC
40
30
600
5
ICC2 –␮A
50
1200
ICC1 –␮A
VCC2 = 3.3V
ICC1 –␮A
ICC2 – nA
20
1800
80
TPC 3. ICC1 vs. Temperature
2000
VCC1 = 3.3V
TA = 25ⴗC
10
100k
1M
10M
FREQUENCY – Hz
TPC 8. ICC2 vs. Frequency,
Bypass Mode
–5–
100M
0
1.5
2.0
2.5
3.0
SUPPLY – V
3.5
4.0
TPC 9. Y1 Enable, Disable Time
vs. Supply
ADG3233
8
6
6
5
5
tEN
4
TIME – ns
tEN
3
tDIS
tDIS
2
2
1
TA = 25ⴗC
VCC1 = VCC2
0
1.5
2.0
2.5
3.0
SUPPLY – V
3.5
16
VCC1 = 3.3V
VCC2 = 1.8V
TA = 25ⴗC
DATA RATE 10Mbps
0
20
40
60
TEMPERATURE – ⴗC
12
tPLH, LOW-TO-HIGH TRANSITION
6
4
tPHL, HIGH-TO-LOW TRANSITION
2
4
22
32
42 52
62 72
82
CAPACITIVE LOAD – pF
92
32
42
52
62
72
82
92
7
VCC1 = 1.8V
VCC2 = 3.3V
TA = 25ⴗC
8 DATA RATE 10Mbps
t , LOW-TO-HIGH TRANSITION
7 LH
6
5
4
3
tHL, HIGH-TO-LOW TRANSITION
PROPAGATION DELAY – ns
8
9
tPHL, HIGH-TO-LOW TRANSITION
22
32
6
92
102
tPLH, LOW-TO-HIGH TRANSITION
5
4
tPHL, HIGH-TO-LOW TRANSITION
3
2
TPC 16. Rise/Fall Time vs. Capacitive
Load, A1–Y2, Bypass Mode
6
42 52
62 72 82
CAPACITIVE LOAD – pF
92
102
TPC 17. Propagation Delay
vs. Capacitive Load A1 to Y1
–6–
102
tPLH, LOW-TO-HIGH TRANSITION
5
4
tPHL, HIGH-TO-LOW TRANSITION
3
2
0
32
92
TPC 15. Rise/Fall Time vs. Capacitive
Load, A1–Y1, A2–Y2
1
22
42 52
62 72 82
CAPACITIVE LOAD – pF
7
0
0
42 52
62 72 82
CAPACITIVE LOAD – pF
3
8
VCC1 = 3.3V
VCC2 = 3.3V
TA = 25ⴗC
DATA RATE 10Mbps
1
1
32
4
0
102
TPC 14. Rise/Fall Time vs. Capacitive
Load, A1–Y2, Bypass Mode
10
22
5
CAPACITIVE LOAD – pF
TPC 13. Rise/Fall Time vs.
Capacitive Load, A1–Y1, A2–Y2
2
6
1
22
102
VCC1 = 1.8V
VCC2 = 3.3V
TA = 25ⴗC
8 DATA RATE 10Mbps
tPLH, LOW-TO-HIGH TRANSITION
7
2
tPHL, HIGH-TO-LOW TRANSITION
0
0
80
9
6
2
0
20
40
60
TEMPERATURE – ⴗC
10
tPLH, LOW-TO-HIGH TRANSITION
8
–20
TPC 12. Y2 Enable, Disable
Time vs. Temperature
10
8
0
–40
80
VCC1 = 3.3V
VCC2 = 1.8V
TA = 25ⴗC
DATA RATE 10Mbps
14
10
RISE/FALL TIME – ns
–20
VCC1 = VCC2 = 3.3V
TPC 11. Y1 Enable, Disable
Time vs. Temperature
RISE/FALL TIME – ns
RISE/FALL TIME – ns
0
–40
4.0
16
12
1
VCC1 = VCC2 = 3.3V
TPC 10. Y2 Enable, Disable
Time vs. Supply
14
tDIS
3
2
RISE/FALL TIME – ns
4
tEN
4
PROPAGATION DELAY – ns
TIME – ns
6
TIME – ns
10
VCC1 = 3.3V
VCC2 = 3.3V
TA = 25ⴗC
DATA RATE 10Mbps
22
32
42 52
62 72 82
CAPACITIVE LOAD – pF
92
102
TPC 18. Propagation Delay
vs. Capacitive Load A2 to Y2
REV. 0
ADG3233
8
6
5
4
tPHL, HIGH-TO-LOW TRANSITION
3
2
VCC1 = 3.3V
VCC2 = 3.3V
TA = 25ⴗC
DATA RATE 10Mbps
1
0
22
32
42 52
62 72 82
CAPACITIVE LOAD – pF
92
tPHL, A2–Y2
4.0
3.0
tPHL, A1–Y1
2.0
1.5
2.0
2.5
3.0
SUPPLY – V
tPHL, A1–Y2
4.0
tPLH , A1–Y2
2.0
TA = 25ⴗC
VCC1 = VCC2
3.5
0
1.5
4.0
TPC 20. Propagation Delay
vs. Supply, Normal Mode
tPHL, A1–Y1
2.0
2.5
3.0
SUPPLY – V
3.5
4.0
TPC 21. Propagation Delay
vs. Supply, Bypass Mode
TA = 25ⴗC
EN = HIGH
PROPAGATION DELAY – ns
tPHL, A1–Y2
2.5
tPLH, A1–Y1
2.0
tPLH, A2–Y2
1.5
1.0
tPLH, A1–Y2
3
1
2.0
A2
TPC 22. Propagation Delay
vs. Temperature, Normal Mode
TA = 25ⴗC
DATA RATE = 10MHz
–20
0
20
40
60
TEMPERATURE – ⴗC
A1
DATA RATE = 10MHz
80
TPC 24. Normal Mode VCC1 = 3.3 V,
VCC2 = 1.8 V
3.3V
A1
3
1.8V
A1
Y2
1.8V
3.3V
2
4
TPC 23. Propagation Delay vs.
Temperature, Bypass Mode
3.3V
Y2
1.0
0
–40
80
3.3V
1.8V
TA = 25ⴗC
VCC1 = VCC2 = 3.3V
0
20
40
60
TEMPERATURE – ⴗC
Y1
A1
3.0
TA = 25ⴗC
VCC1 = VCC2 = 3.3V
–20
tPLH, A2–Y2
TA = 25ⴗC
VCC1 = VCC2
0
102
3.0
0
–40
5.0
6.0
4.0
tPHL, A2–Y2
3.5
0.5
tPLH, A1–Y1
1.0
TPC 19. Propagation Delay vs.
Capacitive Load A1 to Y2, Bypass Mode
4.0
6.0
PROPAGATION DELAY – ns
7.0
tPLH, LOW-TO-HIGH TRANSITION
PROPAGATION DELAY – ns
PROPAGATION DELAY – ns
7
PROPAGATION DELAY – ns
8.0
8.0
Y1
1
1.8V
Y2
3.3V
3
2
3.3V
2
1.8V
A2
3
4
Y2
TA = 25ⴗC
DATA RATE = 10MHz
2
TPC 25. Bypass Mode, VCC1 = 3.3 V,
VCC2 = 1.8 V
REV. 0
TPC 26. Normal Mode VCC1 = 1.8 V,
VCC2 = 3.3 V
–7–
Y1
1.8V
1
TA = 25ⴗC
DATA RATE = 10MHz
TPC 27. Bypass Mode, VCC1 = 1.8 V,
VCC2 = 3.3 V
ADG3233
3.5
TA = 25ⴗC
VCC = VCC1 = VCC2
3
VCC = 3.3V
VOLTAGE – V
2.5
SOURCE
VCC = 2.5V
2
1.5
VCC = 1.8V
VCC = 3.3V
1
VCC = 1.8V
VCC = 2.5V
0.5
SINK
0
0
5
10
15
20
CURRENT – mA
TPC 28. Y1 and Y2 Source and Sink Current
VCC1
INPUT
VCC1
VT
tPHL
tPLH
OUTPUT
VT
EN
0V
0V
tEN
VOH
tDIS
VCC1
VT
A1
VOL
0V
Figure 1. Propagation Delay
VCC1
A2
0V
Y2
VCC1
0V
tEN
Y1 (A1 @ GND)
VOH
VT
VOL
VT
EN
VT
Figure 3. Y2 Enable and Disable Times
tDIS
VOH
VT
VT
VOL
Figure 2. Y1 Enable and Disable Times
–8–
REV. 0
ADG3233
rail, there are no internal diodes to the supply rails, so the device
can handle inputs above the supply but inside the absolute
maximum ratings.
DESCRIPTION
The ADG3233 is a bypass switch designed on a submicron
process that operates from supplies as low as 1.65 V. The device
is guaranteed for operation over the supply range 1.65 V to 3.6 V.
It operates from two supply voltages, allowing bidirectional level
translation, i.e., it translates low voltages to higher voltages and
vice versa. The signal path is unidirectional, meaning data may
only flow from A to Y.
Normal Operation
Figure 4 shows the bypass switch being used in normal mode.
In this mode, the signal paths are from A1 to Y1 and A2 to Y2.
The device will level translate the signal applied to A1 to a VCC1
logic level (this level translation can be either to a higher or
lower supply) and route the signal to the Y1 output, which will
have standard VOL/VOH levels for VCC1 supplies. The signal is
then passed through Device 1 and back to the A2 input pin of
the bypass switch.
A1 and EN Input
The A1 and enable (EN) inputs have VIL/VIH logic levels so that
the part can accept logic levels of VOL/VOH from Device 0 or the
controlling device independent of the value of the supply being
used by the controlling device. These inputs (A1, EN) are capable
of accepting inputs outside the VCC1 supply range. For example,
the VCC1 supply applied to the bypass switch could be 1.8 V
while Device 0 could be operating from a 2.5 V or 3.3 V supply
VCC1
VCC2
DEVICE 1
DEVICE 2
VCC0
DEVICE 0
The logic level inputs of A2 are with respect to the VCC1 supply.
The signal will be level translated from VCC1 to VCC2 and routed
to the Y2 output pin of the bypass switch. Y2 output logic levels
are with respect to the VCC2 supply.
SIGNAL INPUT
SIGNAL OUTPUT
VCC1
VCC2
A1
Y1
A2
Y2
LOGIC 1
EN
BYPASS SWITCH
Figure 4. Bypass Switch in Normal Mode
REV. 0
–9–
ADG3233
VCC1
VCC2
DEVICE 1
DEVICE 2
VCC0
DEVICE 0
SIGNAL OUTPUT
SIGNAL INPUT
VCC1
VCC2
A1
Y1
A2
Y2
LOGIC 0
EN
BYPASS SWITCH
Figure 5. Bypass Switch in Bypass Mode
Bypass Operation
Figure 5 illustrates the device as used in bypass operation.
The signal path is now from A1 directly to Y2, thus bypassing
Device 1 completely. The signal will be level translated to a
VCC2 logic level and available on Y2, where it may be applied
directly to the input of Device 2. In bypass mode, Y1 is pulled
up to VCC1.
The three supplies in Figures 4 and 5 may be any combination
of supplies, i.e., VCC0, VCC1, and VCC2 may be any combination
of supplies, for example, 1.8 V, 2.5 V, and 3.3 V.
–10–
REV. 0
ADG3233
OUTLINE DIMENSIONS
8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
3.00
BSC
8
5
4.90
BSC
3.00
BSC
1
4
PIN 1
0.65 BSC
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.80
0.40
8ⴗ
0ⴗ
0.23
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
8-Lead Small Outline Transistor Package [SOT-23]
(RJ-8)
Dimensions shown in millimeters
2.90 BSC
8
7
6
5
1
2
3
4
1.60 BSC
2.80 BSC
PIN 1
0.65 BSC
1.30
1.15
0.90
1.95
BSC
1.45 MAX
0.15 MAX
0.38
0.22
SEATING
PLANE
0.22
0.08
8ⴗ
4ⴗ
0ⴗ
COMPLIANT TO JEDEC STANDARDS MO-178BA
REV. 0
–11–
0.60
0.45
0.30
–12–
C03297–0–5/03(0)