www.fairchildsemi.com FS7M0880 Fairchild Power Switch(FPS) Features Description • • • • • • • • • • The Fairchild Power Switch(FPS) product family is specially designed for an off line SMPS with minimal external components. The Fairchild Power Switch(FPS) consists of a high voltage power SenseFET and the current mode PWM controller IC. The PWM controller includes an integrated fixed oscillator, the under voltage lock out, the leading edge blanking block, the optimized gate turn-on/turn-off driver, the thermal shut down protection, the over voltage protection, the temperature compensated precision current sources for loop compensation and an fault protection circuit. Compared to just PWM controller combined MosFET or RCC switching converter solution, a Fairchild Power Switch(FPS) can reduce total component price, design size, and weight,also simultaneously increase efficiency, productivity, and system reliability. It has a simple method of application well suited for cost down design in either a flyback converter or a forward converter. Precision Fixed Operating Frequency FS7M0880(66kHz) Pulse By Pulse Over Current Limiting Over Load Protection Over Voltage Protection (Min. 25V) Internal Thermal Shutdown Function Under Voltage Lockout Internal High Voltage Sense FET Latch Up Mode Soft Start TO-3P-5L 1 1. DRAIN 2. GND 3. VCC 4. FB 5. S/S Internal Block Diagram #3 Vcc Voltage Ref. UVLO #4 Feedback Vcc Vcc 5uA 1mA #4 Drain Good Logic Vck OSC S 2.5R Q #5 Soft Start R R LEB Voffset Sense 5V Rsense SenseFET Reset 7.5V Reset #2 Source GND S Thermal Protection Q R OVP OCL Control IC Rev.1.0.1 ©2003 Fairchild Semiconductor Corporation FS7M0880 Absolute Maximum Ratings Parameter Drain-Gate Voltage (RGS=1MΩ) Gate-Source (GND) Voltage (2) Symbol Value Unit VDGR 800 V VGS ±30 V IDM 32.0 ADC EAS 810 mJ IAS 15 A Continuous Drain Current (TC=25°C) ID 8.0 ADC Continuous Drain Current (TC=100°C) ID 5.6 ADC VCC,MAX 30 V VFB -0.3 to VSD V PD 190 W Derating 1.54 W/°C TA -25 to +85 °C TSTG -55 to +150 °C Drain Current Pulsed Single Pulsed Avalanche Energy (3) Avalanche Current (4) Maximum Supply Voltage Input Voltage Range Total Power Dissipation Operating Ambient Temperature Storage Temperature Note: 1. Tj = 25°C to 150°C 2. Repetitive rating: Pulse width limited by maximum junction temperature 3. L = 24mH, VDD = 50V, RG = 25Ω, starting Tj =25°C 4. L = 13µH, starting Tj = 25°C 2 FS7M0880 Electrical Characteristics (SFET part) (Ta=25°C unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit Drain-Source Breakdown Voltage BVDSS VGS=0V, ID=50µA 800 - - V VDS=Max., Rating, VGS=0V - - 50 µA VDS=0.8Max., Rating, VGS=0V, TC=125°C - - 200 µA VGS=10V, ID=5.0A - 1.2 1.5 Ω VDS=15V, ID=5.0A 1.5 2.5 - S - 2460 - - 210 - - 64 - - - 90 - 95 200 - 150 450 - 60 150 - - 150 - 20 - - 70 - Zero Gate Voltage Drain Current IDSS Static Drain-Source On Resistance (note1) RDS(ON) Forward Transconductance (note1) gfs Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Turn On Delay Time td(on) Rise Time Turn Off Delay Time Fall Time tr td(off) tf Total Gate Charge (Gate-Source+Gate-Drain) Qg Gate-Source Charge Qgs Gate-Drain (Miller) Charge Qgd VGS=0V, VDS=25V, f=1MHz VDD=0.5BVDSS, ID=8.0A (MOSFET switching time are essentially independent of operating temperature) VGS=10V, ID=8.0A, VDS=0.5BVDSS (MOSFET switching time are essentially independent of operating temperature) pF nS nC Note: 1. Pulse test: Pulse width ≤ 300µS, duty cycle ≤ 2% 1 2. S = ---R 3 FS7M0880 Electrical Characteristics (CONTROL part) (Continued) (Ta=25°C unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit Start Threshold Voltage VSTART - 14 15 16 V Stop Threshold Voltage VSTOP After turn on 8 9 10 V FOSC - 60 66 72 kHz - ±5 ±10 % - 45 50 55 % UVLO SECTION OSCILLATOR SECTION Initial Frequency Frequency Change With Temperature (2) Maximum Duty Cycle ∆F/∆T -25°C ≤ Ta ≤ +85°C Dmax FEEDBACK SECTION Feedback Source Current IFB Ta=25°C, 0V ≤ Vfb ≤ 3V 0.7 0.9 1.1 mA Shutdown Delay Current Idelay Ta=25°C, 5V ≤ Vfb ≤ VSD 4.0 5.0 6.0 µA SOFT START SECTION Soft Start Voltage VSS VFB =2V 4.7 5.0 5.3 V Soft Start Current ISS Sync & S/S=GND 0.8 1.0 1.2 mA Vref Ta=25°C 4.80 5.00 5.20 V - 0.3 0.6 mV/°C 4.40 5.00 5.60 A REFERENCE SECTION Output Voltage (1) Temperature Stability (1)(2) Vref/∆T -25°C ≤ Ta ≤ +85°C CURRENT LIMIT (SELT-PROTECTION)SECTION Peak Current Limit IOVER Max. inductor current PROTECTION SECTION Thermal Shutdown Temperature (Tj) (1) °C TSD - 140 Over Voltage Protection Voltage VOVP - 25 28 31 V Over Current Protection Voltage VOCP - 1.05 1.10 1.15 V TOTAL DEVICE SECTION Start Up Current Operating Supply Current (Control Part Only) Shutdown Feedback Voltage ISTART VCC=14V - 40 80 uA IOP Ta=25°C - 8 12 mA 150 250 350 uA 6.9 7.5 8.1 V Iop(lat) VSD After latch, Vcc=Vstop-0.1V - Note: 1. These parameters, although guaranteed, are not 100% tested in production 2. These parameters, although guaranteed, are tested in EDS (wafer test) process 4 FS7M0880 Block Diagram It can be divided into several large, functional sections: under voltage lockout circuitry (UVLO); reference voltage; oscillator (OSC); pulse width modulation (PWM) block; protection circuits; and gate driving circuits. described in Fig 2. Although VCC only needs to be set above 9V during operation, it should be set such that OVP does not execute during an overload condition. For a full load, about 18~20V is appropriate for the VCC voltage and for no load, about 13~14V. Start Up Protection Input voltage range: 85 ~ 265 V (AC) When Vac is minimum and it is started by the DC Link bulk capacitor, the starting resistance is calculated as follows: The FPS has several self-protection circuits, which can operate without additional external components, thereby acquiring reliability without increase in cost. After a protection circuit comes on, it can completely stop the SMPS until the cutoff AC power is reconnected (Latch Mode Protection) or it can make the SMPS operate above the UVLO by unlatching the control voltage below the ULVO (Auto Restart Mode Protection). 85 2 – 15 R start = --------------------------- = 1.3MΩ 80µA When Vac is maximum and it is started by the DC Link Bulk capacitor, the power loss is calculated as follows: 2 ( 265 2 – 15 ) Ploss = -------------------------------------- = 0.1 ( W ) 1.3MΩ Va 265V UVLO 85V When it is started by the one-phase of the AC-Lines and Vac is minimum, the starting resistance is calculated as follows: R 2 • 85 2 – 15π = ---------------------------------------- ÷ ( 80µA ) Start 2π = 38MΩ When it is started bythe one-phase of the AC_Line and Vac is maximum, the power loss is calculated as follows: Va ( rms ) = 2 1 π ------ ( Vp sin t – 15 ) dt 2π o ∫ = 177V ( Vp = 265 2 ) Va ( rms ) 2 ( 177 ) 2 = --------------------------- = -----------------P loss Rstart 38M = 82 ( mW ) The starting current across the starting resistor charges the SPS VCC capacitor. When the VCC becomes greater than the starting voltage, the SPS starts to switch the built-in MOSFET. Once it starts, the current in the SPS control IC abruptly is increased to 7mA, makes it difficult to operate with the current through the starting resistor. Therefore, after it starts, the auxiliary winding of the transformer supplies most of the power to SPS. It is best to use an appropriate size VCC power capacitor, generally about 33µF, because if it is too large, the starting time can be delayed. This operation is Figure 1. Detail of the undervoltage lockout (UVLO) circuitry in a Fairchild Power Switch. The gate operating circuit holds in a low state during UVL thereby maintaining the SenseFET at turnoff. These two operations are user-command operations, so the user can select the operation from the IC or by carefully controlling circuit constants. The operation and applications for each protection are described below. Icc [mA] 20 7 Power On Reset Range 0.1 Vcc 6V 9V Fig 2 15V Vz [V] < Start-up Waveform > Figure 2. Start-up Waveform Over Load Protection In abnormal status of SMPS over load is distinguished from load short. This happens when a load exceeds a pre-set load during normal operation. That is, the FPS overload protection circuit stops the FPS if an instantaneous load increases and becomes greater than 50W during normal operation, when the maximum SMPS output had been pre-set to 30W. In this type of protection, the protection 5 FS7M0880 4uA 0 .9 m A V fb Vo #4 D1 C fb Cd D2 V fb * V z = 3 .9 V K A 431 7 .5 V 7.5V 3 .9V 3 .0V 0V t t1 t2 T im e C o n s ta n t = 3.5R *C fb t3 4 u A = C fb * 0 .9 V / t 2 4 u A = C d * 3 .6 V / t3 S h u td o w n Figure 3. SPS Delayed Shutdown circuit can perform undesired operations even during transient state, which lasts until normal operation. As a measure against this problem, this protection circuit in the SPS operates after a specified period to determine whether the condition is a transient or an overload. This is done to prevent protection circuit operation during a transient state, which returns normal after a specified period. This operation is described as follows. Because the FPS uses the current control mode, it cannot flow current over the set maximum current, and therefore the maximum input power is restricted at the characteristic voltage. Therefore, if the output consumes beyond this maximum power, VO, shown in the figure below, becomes less than the set voltage and only the provided minimum current can flow through KA431. As a result, the secondary current of the photocoupler becomes almost zero. If all the SPS’s 0.9mA current source flows through the internal resistor (2.5R + R ·=· 3k), Vfb becomes approximately 3V, and the 4µA current starts to charge Cfb. Because the photocoupler secondary current is almost zero, Vfb continues to increase until it reaches 7.5V, at which time the SPS shutsdown. The delay time to shutdown is the time required to charge Cfb to 4.5V with 4µA and can be easily set. When Cfb is 10nF(103), t2 is approximately 11.2mS and when 0.1µF(104) approximately 120ms. With this amount of the SPS does not shutdown for most transient states. Just increasing Cfb to obtain a longer delay time can become a problem, because Cfb is an important parameter for determining the response speed (Dynamic Response) of the SMPS. Similarly, Vfb exceeds 3V and the 4uA current starts to charge the Cfb. At this time, Vfb continues to increase until it becomes 7.5V, at which time a resistor could be added between the F/B pin and GND to lengthen the time to 6 SPS shutdown. If a part of delay current go through the added resistor, the time to shutdown can be lengthened. In our test the delay shutdown time with Cfb(473) and resistor (3.9M) is about two times longer than with only Cfb(473). When Vfb is 7.5V, the current flowing through this 3.9mΩ resistor is approximately 1.9µA. To obtain the same results, if a zener diode (about 3.9 ~ 4.7V) in series connection with a capacitor is parallel-connected to Cfb, as depicted in Fig 3., the desired shutdown delay time could be obtained according to the size of the capacitor. Over voltage Protection Circuit The FPS has a self-protection feature against malfunctions, such as feedback circuit open or short-circuit. When the feedback terminal short circuits as seen from the primary side, the feedback terminal voltage becomes zero, and switching cannot start as a result. If the feedback terminal opens, then the protection circuit initiates as in the overload protection circuit. If the feedback terminal looks open due to a malfunction in the secondary side feedback circuit or a non-solder, the primary side continues to switch with the set maximum current until the protection circuit come on; therefore, it is normal for the secondary side voltage to become much greater than the rated voltage. If there was no protection circuit guarding against such conditions, the fuse can blow or, even more serious, a fire can start. Even if it does not lead such dire circumstances, the IC connected to the secondary side without a regulator could be destroyed (especially the digital IC such as TTL IC etc.) For such instances, time, the over voltage protection circuit (protection against feedback circuit abnormalities) starts to operate in the SPS. In such circumstances, the output voltage, which increases tremendously, is made proportional FS7M0880 to the SPS VCC voltage. If VCC exceeds 24 V, the SPS IC starts the protection circuit. Therefore, VCC should be appropriately kept below 24V during normal operation. OCP (Over Current Protection) OCP Operating S Q Latch signal R 200ns Rsense 100ns delay entire circuit is seriously stressed. Use of a soft start function avoids such stresses. Figure 6 shows how to implement a soft start for a Fairchild Power Switch(FPS). At turn on, the soft start capacitor on pin 5 of the Fairchild Power Switch(FPS) starts to charge through the 1mA current source. When the voltage across CS reaches 3V, diode DS turns off. No more current flows to it from the 1mA current source. Cs then continues to charge to 5V through the 20kΩ resistor. 10V Fairchild Power Switch(FPS) OCP time 4uA R C 0.9mA PWM Comparator OCP Level 5V Minimum Turn-on Time 20K Fiqure 5. OCP Function & Block #4 The FPS has various built-in, basic protection features. They are the UVLO (Under Voltage Lock Out), OLP (Over Load Protection) and OCP (Over Current Protection). However, if a secondary side diode short or load short occur due to a worst case condition, such as a maximum input voltage putting a large strain on the device, another external component may need to be added. By adding these requirements in the FPS, superior reliability and advantageous cost can be achieved. When gate on signal of the SenseFet is received, simultaneously the OCP block senses Ipeak through the sense resistor for 1us. After the OCP block has turned on, the voltage across the resistor is compared to the pre-set voltage in the comparator, and, if it takes longer than 200ns within the allowed comparison time of 1us, then the comparator produces a high signal, which latches the OCP. fig 4. shows the OCP latch waveform. When there is a diode short/load short, the SPS turns on for the minimum turn-on time. If the instantaneous current is of the form shown in fig 4., the OCP block opens a 1us window to compare the voltage proportional to the current across the resistor with the reference voltage and latches. Here, the 100ns delay after the 200ns is the delay time to SenseFET gate off and is generated from the comparison of the voltage across the sense resistor. #5 CS Figure 6. Soft Start Circuit. Note that when the voltage across CS exceeds 3V, The voltage at the comparator’s inverting terminal no longer follows the voltage across CS. Instead, it follows the output voltage feedback signal. In shutdown or protection circuit operation, capacitor CS is discharged, to enable it to charge from 0V at restart. Soft start operation Normally, the SMPS output voltage increases from start up with a fixed time constant. This is due to the capacitive component of the load. At start up, therefore, the feedback signal applied to the PWM comparator's inverting input reaches its maximum value (1V), This is because the feedback loop is effectively open. Also at this time, the drain current is at its peak value (Ipeak) and maximum allowable power is being delivered to the secondary load. With that said, note that when the SMPS pushes maximum power to the secondary side for this initial fixed time, the 7 FS7M0880 3. Application Note using the SPS -Flyback Application (100W) HOT NTC 47nF /630V Bridge Diode 47kΩ /2W 220uF /400V MBRF2060CT 5MΩ 30uH UF4007 1KΩ 2200uF /50V 2200uF /50V 0.1uF 10Ω 4.7nF Line Filter 1.2kΩ 4.7nF 3 1 Vcc Drain S/S 4.7nF 5 4.7nF 0.45uF /275Vac 12V / 9A DC OUTPUT Q817A 0.45uF /275Vac UF4004 7.6kΩ 2kΩ FUSE: 250V2A 2kΩ 3.3kΩ KA7M0880 GND 2 47uF /50V KA431 1uF /50V FB 4 22nF 10nF Q817A PRIMARY GND 185VAC-265VAC Transformer Specification 2. Winding Specification No. PIN(S → F) WIRE TURNS WINDING METHOD NP/2 1→3 0.4 φ × 1 42 SOLENOID WINDING N+12V 12 → 13 INSULATION : POLYESTER TAPE t = 0.050mm, 1Layer 14mm × 1 8 COPPER WINDING INSULATION : POLYESTER TAPE t = 0.050mm, 3Layer NB 8→7 0.3 φ × 1 9 SOLENOID WINDING INSULATION : POLYESTER TAPE t = 0.050mm, 1Layer NP/2 3→4 0.4 φ × 1 42 SOLENOID WINDING OUTER INSULATION : POLYESTER TAPE t = 0.050mm, 3Layer 3. Electical Characteristic CLOSURE PIN SPEC. REMARKS INDUCTANCE 1-4 700uH ±10% 1kHz, 1V LEAKAGE L 1-4 10uH MAX. 2nd ALL SHORT 4. Core & Bobbin CORE : EER 4042 BOBBIN : EER4042 8 FS7M0880 -Forward Application (250W) 223 56KΩ 56KΩ /630V /2W NTC /2W T1 Line Inductor UF4007 + 12V / 10A T13,14 Line FUSE Inductor 102 472 220kΩ 470uF /200V /1W UF4007 /275V 0.47uF T3 2200uF 2200uF 10Ω /275V 472 /275V 220kΩ 470uF /1W /200V S30SC4M + 5V / 26A L4 T8,9 33kΩ /0.5W 2.2kΩ 33kΩ UF4004 T6 /0.5W 3300uF 10Ω UF4007 1000uF 2.2kΩ Vcc Drain T10,11,12 T7 SP S 5.6kΩ GN S.S. 1kΩ F.B. D 123 33uF 1uF /35V /50V Q817 820Ω 333 104 Q817 103 KA431 103 Transformer Specification 2. Winding Specification No. PIN(S → F) WIRE TURNS WINDING METHOD NP/2 1→3 0.65 φ × 1 50T SOLENOID WINDING N+5V 8, 9 → 10, 11, 12 14mm × 1 4T COPPER WINDING N+12V 13, 14 → 9 0.65 φ × 4 5T SOLENOID WINDING NP/2 1→3 0.65 φ × 1 50T SOLENOID WINDING NVCC 7→6 0.65 φ × 1 6T SOLENOID WINDING 3. Electical Characteristic CLOSURE PIN INDUCTANCE 1-3 LEAKAGE L 1-3 4. Secondary Inductor(L2) Specipication Core : Power Core 27 φ 16 Grade 5V : 12T (1 φ × 2) 10V : 27T (1.2 φ × 1) 9 FS7M0880 Package Dimensions TO-3P-5L 10 FS7M0880 Package Dimensions (Continued) TO-3P-5L(Forming) 11 FS7M0880 Ordering Information Product Number FS7M0880TU FS7M0880YDTU Package TO-3P-5L TO-3P-5L(Forming) Rating Fosc 800V, 8A 67kHz TU : Non Forming Type YDTU : Forming type DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 8/25/03 0.0m 001 Stock#DSxxxxxxxx 2003 Fairchild Semiconductor Corporation