LTC3901
Secondary Side
Synchronous Driver for Push-Pull
and Full-Bridge Converters
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FEATURES
DESCRIPTIO
■
The LTC®3901 is a secondary side synchronous rectifier
driver designed to be used in isolated push-pull and fullbridge converter power supplies. The chip drives two
external N-channel MOSFETs and accepts a transformergenerated bipolar input to maintain sychronization with
the primary side controller.
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■
■
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■
N-Channel Synchronous MOSFET Driver
Programmable Timeout
Reverse Inductor Current Sense
Gate Drive Transformer Synchronization
Sequence Monitor
Wide VCC Supply Range: 4.5V to 11V
15ns Rise/Fall Times at VCC = 5V, CL = 4700pF
Undervoltage Lockout
Small 16-Lead SSOP Package
The LTC3901 provides a full range of protection features
for the external MOSFETs. A programmable timeout function is included that disables both drivers when the synchronization signal is missing or incorrect. Additionally,
the chip senses the output inductor current through the
drain-source resistance of the two MOSFETs, turning off
the MOSFETs if the inductor current reverses. The LTC3901
also shuts off the drivers if the supply is low or if the
synchronization sequence is incorrect.
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APPLICATIO S
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48V Input Isolated DC/DC Converters
Isolated Telecom Power Supplies
Distributed Power Step-Down Converters
Industrial Control System Power Supplies
Automotive and Heavy Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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TYPICAL APPLICATIO
L1
ISOLATION
BARRIER
+
COUT
VOUT
12V
T1
VIN
36V TO 72V
CSE +
MA
MB
ME
VCC
ME
CSE –
GND
LTC3901
CSF +
PVCC
DRVA
DRVB
LTC3723
PUSH-PULL
CONTROLLER
COMP VFB SDRA SDRB
MF
MF
CSF –
PGND
SYNC
TIMER
T2
OUT
FB
LT4430 OR LT1431
OPTOCOUPLER
DRIVER
COMP
3901 F01
Figure 1. Simplified Isolated Push-Pull Converter
3901f
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LTC3901
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ABSOLUTE
AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
NUMBER
TOP VIEW
Supply Voltage
VCC, PVCC ............................................................................ 12V
Input Voltage
CSE–, CSF–, TIMER ................. –0.3V to (VCC + 0.3V)
SYNC ...................................................... –12V to 12V
Input Current
CSE+, CSF+ ..................................................................... 15mA
Operating Temperature Range (Note 2) ...–40°C to 85°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
PVCC 1
16 VCC
ME 2
15 MF
ME 3
14 MF
PGND 4
13 PGND
CSE – 5
12 CSF –
CSE+ 6
11 CSF +
TIMER 7
10 GND
GND 8
9
LTC3901EGN
GN PART
MARKING
SYNC
3901
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
TJMAX = 125°C, θJA = 130°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range. VCC = 5V, TA = 25°C unless otherwise specified. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
VCC
Supply Voltage Range
5
11
V
VUVLO
VCC Undervoltage Lockout Threshold
VCC Undervoltage Lockout Hysteresis
Rising Edge
Rising Edge to Falling Edge
●
4.1
0.5
4.5
V
V
IVCC
VCC Supply Current
VSYNC = 0V
fSYNC = 100kHz, CME = CMF = 4700pF (Note 4)
●
●
0.5
7
1
15
mA
mA
VCC/5
10%
V
–6
–10
µA
40
120
ns
●
4.5
TYP
MAX
UNITS
Timer
●
VTMR
Timer Threshold Voltage
ITMR
Timer Input Current
VTMR = 0V
●
tTMRDIS
Timer Discharge Time
CTMR = 1000pF, RTMR = 4.7k
●
VTMRMAX
Timer Pin Clamp Voltage
CTMR = 1000pF, RTMR = 4.7k
–10%
2.5
V
Current Sense (Note 5)
ICS+
CS+ Input Current
VCS+ = 0V
●
±1
µA
ICS–
CS– Input Current
VCS – = 0V
●
±1
µA
VCSMAX
CS+
IIN = 5mA, Driver Off
VCS
Current Sense Threshold Voltage
10.5
13.5
18
mV
mV
±1
±10
µA
Pin Clamp Voltage
11
VCS – = 0V
(Note 6)
●
●
7.5
3
V
SYNC Input
ISYNC
SYNC Input Current
VSYNC = ±10V
VSYNCP
SYNC Input Positive Threshold
SYNC Positive Input Hysteresis
(Note 7)
SYNC Input Negative Threshold
SYNC Negative Input Hysteresis
(Note 7)
RONH
Driver Pull-Up Resistance
IOUT = –100mA
RONL
Driver Pull-Down Resistance
IPK
Driver Peak Output Current
VSYNCN
●
1.0
1.4
0.2
1.8
V
V
●
–1.8
–1.4
0.2
–1.0
V
V
0.9
1.2
1.6
Ω
0.8
1.2
1.6
Ω
Driver Output
IOUT = 100mA
(Note 7)
●
●
2
A
3901f
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LTC3901
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range. VCC = 5V, TA = 25°C unless otherwise specified. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
60
120
ns
Switching Characteristics (Note 8)
td
SYNC Input to Driver Output Delay
CME = CMF = 4700pF, VSYNC = ±5V
t r, t f
Driver Rise/Fall Time
CME = CMF = 4700pF, VSYNC = ±5V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC3901E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design; characterization and correlation
with statistical process controls.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external MOSFET gates. This current
●
15
ns
will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 5: Both CSE+, CSE– and CSF+, CSF– current sense comparators have
the same performance specifications.
Note 6: The current sense comparator threshold has a 0.33%/°C
temperature coefficient (TC) to match the TC of the external MOSFET
RDSON.
Note 7: Guaranteed by design, not subject to test.
Note 8: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured from ±1.4V at SYNC input to 20%/80% levels at the
driver output.
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TYPICAL PERFOR A CE CHARACTERISTICS
Timeout vs VCC
5.25
TA = 25°C
RTMR = 51k
CTMR = 470pF
5.20
5.15
10
VCC = 5V
RTMR = 51k
CTMR = 470pF
5.20
5.15
TA = 25°C
9 VCC = 5V
= 470pF
C
8 TMR
5.10
5.05
5.00
4.95
7
TIMEOUT (µs)
TIMEOUT (µs)
5.10
TIMEOUT (µs)
Timeout vs RTMR
Timeout vs Temperature
5.25
5.05
5.00
4.95
5
4
4.90
4.90
3
4.85
4.85
2
4.80
4.80
1
4.75
4.75
–50 –25
4
5
6
8
7
VCC (V)
9
10
11
50
25
0
75
TEMPERATURE (°C)
100
3901 G01
0
SYNC Positive Threshold vs
Temperature
VCS(MAX)
Input Current
18
1.8
TA = 25°C
SYNC POSITIVE THRESHOLD (V)
17
16
15
14
13
12
11
100
125
3901 G04
10 20 30 40 50 60 70 80 90 100
RTMR (kΩ)
3901 G03
Clamp Voltage vs CS+
VCS(MAX) CLAMP VOLTAGE (V)
18
17 VCC = 5V, 11V
16
15
14
13
12
11
10
9
8
7
6
5
4
3
0
25
50
75
–50 –25
TEMPERATURE (°C)
0
125
3901 G02
Current Sense Threshold vs
Temperature
CURRENT SENSE THRESHOLD (mV)
6
10
1.7
1.6
1.5
VCC = 11V
1.4
VCC = 5V
1.3
1.2
1.1
0
5
25
10
15
20
CS+ INPUT CURRENT (mA)
30
1.0
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
3901 G05
3901 G06
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LTC3901
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TYPICAL PERFOR A CE CHARACTERISTICS
SYNC Negative Threshold vs
Temperature
120
120
TA = 25°C
CLOAD = 4.7nF
–1.1
110
PROPAGATION DELAY (µs)
–1.2
–1.3
–1.4
–1.5
–1.6
100
90
80
70
60
SYNC TO ME
50
–1.7
110
40
–1.8
–50 –25
0
50
25
75
125
100
5
4
6
TEMPERATURE (°C)
7
8
9
Propagation Delay vs CLOAD
10
RISE/FALL TIME (ns)
90
80
70
SYNC TO ME
45
25
20
15
5
0
9
RISE TIME
5
4
10
6
7
8
9
UNDERVOLTAGE LOCKOUT THRESHOLD
VOLTAGE (V)
TA = 25°C
VCC = 5V
RISE/FALL TIME (ns)
40
35
30
25
20
RISE TIME
FALL TIME
5
0
1
2
3
4
5 6
CLOAD (nF)
125
35
30
25
20
15
RISE TIME
FALL TIME
10
11
0
–50 –25
0
25
50
75
TEMPERATURE (°C)
100
125
3901 G12
Undervoltage Lockout Threshold
Voltage vs Temperature
50
0
100
VCC = 5V
CLOAD = 4.7nF
3901 G11
Rise/Fall Time vs Load
Capacitance
10
75
5
VCC (V)
15
50
10
FALL TIME
3901 G10
45
25
40
30
40
8
0
Rise/Fall Time vs Temperature
35
50
6
7
CLOAD (nF)
SYNC TO MF
3901 G09
TA = 25°C
CLOAD = 4.7nF
10
SYNC TO MF
5
SYNC TO ME
TEMPERATURE (°C)
40
4
60
50
45
100
3
70
Rise/Fall Time vs VCC
TA = 25°C
VCC = 5V
2
80
40
–50 –25
11
50
1
90
3901 G08
120
60
100
VCC (V)
3901 G07
110
VCC = 5V
CLOAD = 4.7nF
50
SYNC TO MF
RISE/FALL TIME (ns)
SYNC NEGATIVE THRESHOLD (V)
VCC = 5V, 11V
PROPAGATION DELAY (µs)
–1.0
PROPAGATION DELAY (µs)
Propagation Delay vs
Temperature
Propagation Delay vs VCC
7
8
9
10
3901 G13
4.5
4.4
4.3
4.2
RISING EDGE
4.1
4.0
3.9
3.8
3.7
3.6
3.5
FALLING EDGE
3.4
3.3
3.2
3.1
3.0
0
25
50
75
–50 –25
TEMPERATURE (°C)
100
125
3901 G14
3901f
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LTC3901
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TYPICAL PERFOR A CE CHARACTERISTICS
VCC Supply Current
vs Load Capacitance
VCC Supply Current vs
Temperature
20
30
CLOAD = 4.7nF
TA = 25°C
25
16
VCC = 11V
SUPPLY CURRENT (mA)
VCC SUPPLY CURRENT (mA)
18
14
12
10
8
VCC = 5V
VCC = 11V
20
15
10
VCC = 5V
5
6
4
–50 –25
0
25
50
75
100
125
TEMPERATURE (°C)
3901 G15
0
0
1
2
3
4
5 6
CLOAD (nF)
7
8
9
10
3901 G16
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PI FU CTIO S
PVCC (Pin 1): Driver Supply Input. This pin powers the
ME and MF drivers. Bypass this pin to PGND using a 4.7µF
low ESR capacitor in close proximity to the LTC3901. This
pin should be connected to the same supply voltage as the
VCC pin.
GND (Pin 8,10): Signal Ground. All internal low power
circuitry returns to this pin. To minimize differential ground
currents, connect GND to PGND right at the LTC3901.
PGND (Pin 4,13): Power Ground. Both drivers return to
this pin. Connect PGND to a high current ground node in
close proximity to the sources of ME and MF.
SYNC (Pin 9): Driver Synchronization Input. 0V at this pin
forces both ME and MF high after an initial negative pulse.
A subsequent positive pulse at SYNC input forces ME to
pull low, whereas a negative pulse forces MF to pull low.
The SYNC signal should alternate between positive and
negative pulses. If the SYNC signal is incorrect, the LTC3901
pulls both MF and ME low.
CSE+, CSE– (Pin 6, 5): ME Current Sense Differential
Input. Connect CSE+ through a series resistor to the drain
of ME and CSE– through a series resistor to the source of
ME. The LTC3901 monitors the CSE inputs 250ns after ME
goes high. If the inductor current reverses and flows into
ME causing CSE+ to rise above CSE– by more than 10.5mV,
the LTC3901 pulls ME low. See the Current Sense section
for more details on choosing the resistance values for
RCSE1 to RCSE3.
CSF+, CSF – (Pin 11, 12): MF Current Sense Differential
Input. Connect CSF+ through a series resistor to the drain
of MF and CSF– through a series resistor to the source of
MF. The LTC3901 monitors the CSF inputs 250ns after MF
goes high. If the inductor current reverses and flows into
MF causing CSF+ to rise above CSF– by more than 10.5mV,
the LTC3901 pulls MF low. See the Current Sense section
for more details on choosing the resistance values for
RCSF1 to RCSF3.
TIMER (Pin 7): Timer Input. Connect this pin to an external
R-C network to program the timeout period. The LTC3901
resets the timer at every positive and negative transition of
the SYNC input. If the SYNC signal is missing or incorrect,
the LTC3901 pulls both ME and MF low once the TIMER
pin goes above the timeout threshold. See the Timer section for more details on programming the timeout period.
MF (Pin 14, 15): Driver Output for MF. This pin drives the
gate of the external N-channel MOSFET, MF.
ME (Pin 2, 3): Driver Output for ME. This pin drives the
gate of the external N-channel MOSFET, ME.
VCC (Pin 16): Power Supply Input. All internal circuits
except the drivers are powered from this pin. Bypass this
pin to GND using a 1µF capacitor in close proximity to the
LTC3901.
3901f
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LTC3901
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BLOCK DIAGRA
SYNC 9
SYNC+
S+
16 VCC
+1.4V
–1.4V
CSE+ 6
–+
5
SYNC
AND
DRIVER
LOGIC
ISE
10.5mV
CSE–
SYNC –
S–
DISABLE
DRIVER
ZCSE
11V
CSF+ 11
10.5mV
CSF– 12
PVCC
3
ME
4
PGND
14 MF
13 PGND
UVLO
ISF
–+
TIMER
RESET
1
ZCSF
11V
TMR
TIMER 7
R1
180k
ZTMR
0.5 • VCC
R2
45k
MTMR
8 10 3901 BD
GND GND
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APPLICATIO S I FOR ATIO
Overview
Push-pull and full bridge converters use power transformers to provide input-to-output isolation and voltage stepup/down. Diodes are used as a simple solution for secondary side rectification. Unfortunately, as output currents
increase, the loss associated with diode forward voltage
drop results in low overall efficiency. The LTC3901 overcomes this problem by providing control and drive for two
external N-channel synchronous MOSFETs. Synchronization to the primary side controller is maintained through a
small signal transformer.
Figure 1 shows a simplified push-pull converter application. T1 is the power transformer; MA and MB are the
primary side power transistors driven by the LTC3723
controller’s DRVA and DRVB outputs. The gate drive
transformer T2 is driven by the LTC3723’s SDRA and
SDRB outputs and provides the synchronization signal to
the LTC3901 on the secondary side. When both SDRA and
SDRB are high, there is no voltage across the transformer’s
primary and the LTC3901 SYNC input is approximately 0V.
According to the polarity of the transformer: if SDRA goes
low while SDRB is high, SYNC is positive; if SDRB goes
low while SDRA is high, SYNC is negative. ME and MF are
the secondary side synchronous switches driven by the
LTC3901’s ME and MF output. Inductor L1 and capacitor
COUT form the output filter, providing DC output voltage to
the load. The feedback path from VOUT through the optocoupler driver and optocoupler back to the primary side
controller is also shown in Figure 1.
Each full cycle of the push-pull converter consists of four
distinct periods. Figure 2 shows the push-pull converter
waveforms.
DRVA
DRVB
SDRA
SDRB
SYNC
0V
ME
MF
3901 F02
Figure 2. Push-Pull Converter Switching Waveforms
3901f
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LTC3901
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APPLICATIO S I FOR ATIO
In the first period, SDRA goes low (followed by DRVA
going high) and T2 generates a positive voltage at the
LTC3901’s SYNC input. The LTC3901’s ME output then
pulls low. Current flows to the load through MOSFET MF,
T1’s secondary and L1.
In the second period, SDRA goes high and T2 provides
approximately 0V at the LTC3901 SYNC input. This causes
the LTC3901’s ME output to go high and both MOSFET ME
and MF to conduct. This is the free-wheeling period with
T1 secondary winding shorted.
In the third period, SDRB goes low (followed by DRVB
going high) and T2 generates a negative voltage at the
LTC3901’s SYNC input. The LTC3901’s MF output then
pulls low. Current flows to the load through MOSFET ME,
T1’s secondary and L1.
The last period is also a free-wheeling period like the
second period. Both SDRA and SDRB are high and the
LTC3901 forces both MOSFETs ME and MF to conduct.
External MOSFET Protection
MOSFETs are also kept on for long periods when the
primary controller enters Burst Mode operation. Both ME
and MF stop switching until the primary controller exits
Burst Mode operation. This would also cause the inductor
current to reverse and the drains to fly high.
In both of these situations, the timer and/or current sense
comparator shuts off the drivers before or immediately
after the inductor current reverses direction. This prevents
the buildup of inductor energy.
Timer
The timer circuit (Figure 3) operates by using an external
R-C charging network to program the timeout period. On
every transition at the SYNC input, the chip generates a
200ns pulse to reset the timer capacitor. If the SYNC signal
is missing or incorrect (allowing the timer capacitor voltage to go high) it shuts off both drivers once the voltage
reaches the timeout threshold. Figure 4 shows the timer
waveforms.
VCC
A programmable timer and two differential input current
sense comparators are included in the LTC3901 for protection of the external MOSFETs during power down and
Burst Mode® operation. The chip also shuts off the
MOSFETs if VCC < 4.1V or if the synchronization sequence
is incorrect.
When the primary controller is powering down, the
LTC3901 continues to operate by drawing power from the
VCC bypass cap, CVCC. The primary controller synchronous output stops switching and the LTC3901 SYNC input
goes to 0V. Both ME and MF remain on and the decreasing
inductor current continues to flow into the load. Once the
inductor current decreases to zero, it reverses direction,
discharging the output capacitor COUT to GND through
both MOSFETs. At the same time, the CVCC voltage continues to drop. When the voltage drops below 4.1V, the
LTC3901 shuts down and pulls both ME and MF low. This
causes the inductor current to stop suddenly and the drain
voltage of both MOSFETs to fly high, due to the buildup of
inductor energy. In the absence of a protection timer, if the
inductor energy is high due to a long period of current
reversal, the drain voltage can go above the MOSFET’s
voltage rating and cause damage to the MOSFET.
Burst Mode is a registered trademark of Linear Technology Corporation.
16
LTC3901
VCC
TIMER
TMR
TIMEOUT
RTMR
32k
7
CTMR
470pF
ZTMR
0.5 • VCC
R1
180k
R2
45k
TIMER
RESET
MTMR
3901 F03
Figure 3. Timer Circuit
0V
SYNC
ME
MF
TIMER RESET
(INTERNAL)
TIMEOUT
THRESHOLD
TIMER
3901 F02
Figure 4. Timer Waveforms
3901f
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LTC3901
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APPLICATIO S I FOR ATIO
The timeout period is determined predominantly by the
external RTMR and CTMR values and is independent of the
VCC voltage. This independence is achieved by making the
timeout threshold a ratio of VCC. The ratio is 0.2x, set
internally by R1 and R2 (see Figure 3). The Timeout period
should be programmed to around 1 period of the primary
switching frequency using the following formula:
TIMEOUT = 0.2 • RTMR • CTMR + 0.27E-06
To reduce error in the timeout setting due to the discharge
time, select CTMR between 100pF and 1000pF. Start with
a CTMR around 470pF and then calculate the required
RTMR. CTMR should be placed as close as possible to the
LTC3901 with minimum PCB trace between CTMR, the
TIMER pin and GND. This is to reduce any ringing caused
by the PCB trace inductance when CTMR discharges. This
ringing may introduce error to the timeout setting.
The timer input also includes a current sinking clamp
circuit (ZTMR in Figure 3) that clamps this pin to about
0.5 • VCC if there is missing SYNC/timer reset pulse. This
clamp circuit prevents the timer capacitor from getting
fully charged up to the rail, which would result in a longer
discharge time. The current sinking capability of the circuit
is around 1mA.
The timeout function can be disabled by connecting the
timer pin to GND.
Synchronization Sequence
A typical push-pull converter cycle always turns off ME
and MF alternately. The SYNC input should alternate
between a positive and negative pulse. The LTC3901
includes a sequential logic to monitor the SYNC input
pulses. If after one positive pulse the SYNC comparator
receives another positive pulse, the LTC3901 sequential
logic shuts off both drivers until a negative pulse appears.
The same applies to double negative pulses; the driver will
turn on only after receiving a positive pulse. This is to
protect the external components in situations where only
one polarity of the SYNC pulse is present and the corresponding driver remains on. Figure 5 shows the SYNC
double pulse operation.
The LTC3901 has two separate SYNC comparators (S+ and
S– in the Block Diagram) to detect the positive and negative pulses. The threshold voltages of both comparators
are designed to be of the same magnitude but opposite in
polarity. In some situations, for example during power-up
or power-down, the SYNC pulse magnitude may be low
(slightly higher or lower than the threshold of the comparators). This can cause only one of the SYNC comparators to
trip. This also appears as a double pulse to the sequential
logic and both drivers will be shut off.
Current Sense
The differential input current sense comparators, ISE and
ISF (Figure 6), are used for sensing the voltage across the
drain-to-source terminal of the MOSFET through the CSX+
and CSX– pins. There are two sets of comparator inputs,
one for each MOSFET (ME and MF). If the inductor current
reverses into the MOSFET causing CSX+ to rise above
CSX– by more than 10.5mV, the LTC3901 turns off the
respective MOSFET. This comparator is used to prevent
inductor reverse current buildup during power-down or
Burst Mode operation, which may cause damage to the
MOSFETs. The 10.5mV input threshold has a positive
temperature coefficient, which closely matches the TC of
the external MOSFET RDS(ON). The current sense comparator is only active 250ns after the respective driver
SECOND NEGATIVE SYNC PULSE,
BOTH ME AND MF PULL LOW
0V
SYNC
ME
MF
3901 F05
EXPECTED POSITIVE SYNC PULSE,
MF PULLS HIGH
Figure 5. SYNC Double Pulse Operation
T1
RCSE1
RCSE2
6
CSE+
ME
5
CSE–
RCSE3
ISE
10.5mV
–+
ZCSE
11V
LTC3901
RCSF1
11
CSF+
MF
12
RCSF3
CSF–
ISF
10.5mV
–+
ZCSF
11V
RCSF2
3901 F06
Figure 6. Current Sense Circuit
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LTC3901
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APPLICATIO S I FOR ATIO
output goes high; this is to avoid any ringing immediately
after the MOSFETs are switched on.
Under no/light load conditions, if the inductor average
current is less than half of its peak-to-peak ripple current,
the inductor current will reverse into MOSFETs during a
portion of the free-wheeling period, forcing CSX+ to rise
above CSX–. The current sense comparator input threshold is set at 10.5mV to prevent tripping under this normal
no load condition. If at no load, the product of the inductor
negative peak current and MOSFET RDS(ON) is higher than
10.5mV; this may trip the comparator and force the
LTC3901 to operate in discontinuous mode. Figure 7
shows the LTC3901 operating in discontinuous mode; the
driver’s output goes low before the next SYNC transition
edge when the inductor current goes negative. In pushpull topology, both MOSFETs conduct the same amount of
current during the free-wheeling period; this will trip both
comparators at the same time. Discontinuous mode is
sometimes undesirable because if the load current sudSDRA
SDRB
0V
SYNC
ME
MF
denly increases when the MOSFETs are off, it creates a
large output voltage drop. To overcome this, add a resistor
divider, RCSX1 and RCSX2 at the CSX+ pin to increase the
10.5mV threshold so that the LTC3901 operates in continuous mode at no load.
The LTC3901 CSX+ pin has an internal current sinking
clamp circuit (ZCSX) that clamps the pin to around 11V.
The clamp circuit, together with the external series resistor RCSX1, protects the CSX+ pins from the high MOSFET
drain voltage in the power delivery cycle. During the power
delivery cycle, one of the MOSFETs (ME or MF) is off. The
drain voltage of the MOSFET that is off is determined by the
primary input voltage and the transformer turn ratio. This
voltage can be high and may damage the internal circuit if
CSX+ is connected directly to the drain of its MOSFET. The
current sinking capability of the clamp circuit is 5mA
minimum.
The value of the resistorsRCSX1, RCSX2 and RCSX3 should
be calculated using the following formulas to meet both
the clamp and threshold voltage requirements:
k = {48 • IRIPPLE • RDS(ON)} –1
RCSX2 = {200 • VIN(MAX) • NS/NP –2200 • (1 + k)} /k
RCSX1 = k • RCSX2
RCSX3 = {RCSX1 • RCSX2} / {RCSX1 + RCSX2}
If k = 0 or less than zero, RCSX2 is not needed and RCSX1
= RCSX3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA
where:
L1
CURRENT
0V
CURRENT SENSE
COMPARATOR TRIP
Figure 7a. Discontinuous Mode Operation at No Load
0V
SYNC
ME
MF
L1
CURRENT
0V
ADJUSTED CURRENT SENSE THRESHOLD
Figure 7b. Continuous Mode Operation
with Adjusted Current Sense Threshold
3901 F06
IRIPPLE = Inductor peak-to-peak ripple current
RDS(ON) = On-resistance of MOSFET at IRIPPLE/2
VIN(MAX) = Primary side main supply maximum input
voltage
NS/NP = Power transformer T1, turn ratio
If the LTC3901 still operates in discontinuous mode with
the calculated resistance value, increase the value of
RCSX1 to raise the threshold. The resistors RCSX1 and
RCSX2 and the CSX+ pins input capacitance plus the PCB
trace capacitance forms an R-C delay; this slows down the
response time of the comparators. The resistors and CSX+
input leakage currents also create an input offset error.
To minimize this delay and error, do not use resistance
value higher than required and make the PCB trace from
3901f
9
LTC3901
U
U
W
U
APPLICATIO S I FOR ATIO
the resistors to the LTC3901 CSX+/CSX– pins as short as
possible . Add a series resistor, RCSX3, with value equal to
parallel sum of RCSX1 and RCSX2 to the CSX– pin and
connect the other end of RCSX3 directly to the source of the
MOSFET.
SYNC Input
Figure 8 shows the external circuit for the LTC3901 SYNC
input. The gate drive transformer (T2) should be selected
based on the primary switching frequency and SDRA/
SDRB output voltage.
The values of the CSG and RSYNC should then be adjusted
to obtain a optimum SYNC pulse shape and amplitude. The
amplitude of the SYNC pulse should be much higher than
the LTC3901 SYNC threshold of ±1.4V. Amplitudes greater
than ±5V will help to speed up the SYNC comparator and
reduce the propagation delay from SYNC to the drivers.
When SDRA and SDRB lines go low, the resulting undershoot or overshoot must not exceed the minimum SYNC
threshold of ±1V.
CSG
0.1µF
SDRB
PRIMARY
CONTROLLER
SDRA
T2
LTC3901
SYNC
RSYNC
4.7k
RSG
220Ω
3901 F08
Figure 8. SYNC Input Circuit
VCC/PVCC Regulator
The VCC/PVCC supply for the LTC3901 can be generated by
peak rectifying the transformer secondary winding as
shown in Figure 9. The Zener diode DZ sets the output
voltage (VZ – 0.7V). Resistor RB (on the order of a few
hundred ohms), in series with the base of QREG, may be
required to surpress high frequency oscillations depending on QREG’s selection. A power MOSFET can also be used
by increasing the zener diode value to offset the drop of the
gate-to-source voltage. The VCC input is separated from
the PVCC input through a 100Ω resistor. This lowers the
driver switching feedthrough. Connect a 1µF bypass capacitor for the VCC supply. PVCC supply current varies
linearly with the supply voltage, driver load and clock
frequency. A 4.7µF bypass capacitor for the PVCC supply
is sufficient for most applications. Alternatively, the
LTC3901 can be powered directly by VOUT if the voltage is
T1
SECONDARY
WINDING
D3
MBR0540
0.1µF
RZ
2k
RB
OPTIONAL
QREG
FZT690B
6V
DZ
CPVCC
4.7µF
RVCC
100Ω
PVCC
VCC
CVCC
1µF
3901 F09
Figure 9. VCC/PVCC Regulator
higher than 4.5V. This reduces the number of external
components needed.
The LTC3901 has an UVLO detector that pulls the drivers’
output low if VCC < 4.1V. The output remains off from
VCC = 1V to 4.1V. The UVLO detector has 0.5V of hysteresis to prevent chattering.
In a typical push-pull converter, the secondary side circuits have no power until the primary side controller starts
operating. Since power for the LTC3901 is derived from
the power transformer T1, the LTC3901 will initially remain off. During this period (VCC < 4.1V), the synchronous
MOSFETs ME and MF will remain off and the MOSFETs’
body diodes will conduct. The MOSFETs may experience
very high power dissipation due to a high voltage drop in
the body diodes. To prevent MOSFET damage, a VCC
voltage greater than 4.1V should be provided quickly. The
VCC supply circuit in Figure 9 will provide power for the
LTC3901 within the first few switching pulses of the
primary controller, preventing overheating of the MOSFETs.
Full-Bridge Converter Application
The LTC3901 can be used in full-bridge converter applications. Figure 10 shows a simplified full-bridge converter
circuit. The LTC3901 circuit and operation is the same as
in the push-pull application (refer to Figure 1). On the primary side there are four power MOSFETs, MA to MD, driven
by the respective outputs of the primary controller. Transformer T3 and T4 step up the gate drives for MA and MC.
Each full cycle of the full-bridge converter includes four
distinct periods which are similar to those found in the
push-pull application. Figure 11 shows the full-bridge
converter switching waveforms. The shaded areas correspond to power delivery periods.
3901f
10
LTC3901
U
W
U U
APPLICATIO S I FOR ATIO
VIN
ISOLATION
BARRIER
MC
MA
T3
L1
T4
VOUT
+
T1
L2
COUT
MB
MD
6
3
ME
CSE +
B
C
D
LTC3722-1
FULL-BRIDGE CONTROLLER
COMP
VFB
E
MF
16
ME
5
CSE –
11
CSF +
GND
8,10
LTC3901
the
A
VCC
14
12
F
9
PVCC
1
MF
CSF –
PGND
SYNC
TIMER
4,13
7
T2
OUT
FB
OPTOCOUPLER
DRIVER
COMP
3901 F10
Figure 10. Simplified Isolated Full-Bridge Converter
In the first period, MB turns off, E goes low (followed by
MA turning on), and the LTC3901 forces ME to turn off.
The primary side delivers power to the load through
MOSFET MF, T1 and L1.
MA
MB
MC
In the second period, MA remains on, MD turns off, and
MC turns on. E goes high and the LTC3901 forces both ME
and MF to conduct. This is the free-wheeling period with
the T1 secondary output shorted.
MD
E
F
0V
SYNC
ME
MF
3901 F11
Figure 11. Full-Bridge Converter Switching Waveforms
In the third period, MA turns off, F goes low (followed by
MB turning on), and the LTC3901 forces MF to turn off.
The primary side delivers power to the load through
MOSFET ME, T1 and L2.
Like the second period, the last period is a free-wheeling
period. MB remains on, MC turns off, MD turns on, F goes
high, and the LTC3901 forces both ME and MF to conduct.
The timeout and current sense operations are the same as
in the push-pull application.
3901f
11
LTC3901
U
W
U
U
APPLICATIO S I FOR ATIO
MOSFET Selection
PC Board Layout Checklist
The required MOSFET RDS(ON) should be determined
based on allowable power dissipation and maximum required output current.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3901:
The MOSFETs body diodes conduct during the power-up
phase, when the LTC3901 VCC supply is ramping up. The
ME and MF signals stay low and the inductor current flows
through the body diodes. The body diodes must be able to
handle the load current during start-up until VCC reaches
4.1V.
1. Connect the 1µF CVCC bypass capacitor as close as
possible to the VCC and GND pins. Connect the 4.7µF
CPVCC bypass capacitor as close as possible to the PVCC
and PGND pins.
The LTC3901 drivers dissipate power while the MOSFETs
are switching. The power dissipation increases with switching frequency, PVCC, and size of the MOSFETs. To calculate the driver dissipation, the total gate charge QG is used.
This parameter is found on the MOSFET manufacturers’
data sheets.
The power dissipated in each LTC3901 MOSFET driver is:
PDRIVER = QG • PVCC • fSW
where fSW is the switching frequency of the converter.
2. Connect the two MOSFET drain terminals directly to the
transformer. The two MOSFET sources should be as close
together as possible.
3. Keep the timer, SYNC and VCC regulator circuit away
from the high current path of ME, MF and T1.
4. Place the timer capacitor, CTMR as close as possible to
the LTC3901.
5. Keep the PCB trace from the resistors RCSX1, RCSX2 and
RCSX3 to the LTC3901 CSX+/CSX– pins as short as possible. Connect the other ends of the resistors directly to the
drain and source of the MOSFET.
6. Make the connection between GND and PGND right at
the LTC3901 pins.
3901f
12
1µF
220pF
66.5k
15
5
100pF
383k
30k
8
10k
16
33k
12
7
13
4
DRVB
14
2
11
0.47µF
5V
1
820Ω
COMP
VREF
SDRB
3
SDRA
150k
68nF
9
SS DPRG
LTC3723EGN-1
CS
10
470Ω
UVLO
CT SPRG RLEB GND FB
VCC
6
DRVA
330pF
75k
6
5
C7
2.2nF
250V
8
D5
D4
6
5
8
•
5
0.1µF
47nF
•
T2
1(1.5mH):0.5
1
4
100k
2
1
1k
0.1µF
C5
68µF
20V
L4
1mH
MOC207
22Ω
+
10V
4
1
9
10
7
8
11
12
V+
3
8.5V
SYNC
360Ω
6
5
GND-F GND-S
8
12
14
MF
15
LTC3901EGN
MF CSE+
4.99k
1/4W
6
VE
Si7892DP
×3
VE
CSE–
5
4.99k
4
–VOUT
2.49k
787Ω
VOUT
8
13
Q2
0.022µF
270Ω
10
GND PGND GND PGND
4.99k
CSF –
LT1431CS8
COLL
REF
220pF
9
CSF+
VF
L6 0.65µH
4.99k
1/4W
11
VF
Si7892DP
×3
100Ω
T1
9:9:7:1:1
•
100Ω
1/4W
5V
R2
0.06Ω
1.5W
Si7450DP
80Ω
1W
•
R1
0.06Ω
1.5W
Si7450DP
80Ω
1W
100pF
200V
•
VIN
10V
1µF
100V
×3
100pF
200V
3
2
•
–VIN
1µF
100V
VIN
•
VIN
L5
1µH
1
T1
9T(150µH):9T:7T:1T:1T
165W 36V-72V Input to 3.3V at 50A Isolated Push-Pull Converter
47Ω
ME
2
+
D2
16
D7
0.68µF
390pF
PVCC
VCC
1
D1
–VOUT
3901 TA01
330Ω
VOUT
7
TIMER
ME
3
C1, C2, C3
470µF
6.3V
×3
VF
1µF
Q1
8.5V
–VOUT
VOUT
–VOUT
D6
9.1V
100Ω
2k
1/4W
–VOUT
1µF
VOUT
1µF, 100V TDK C3225X7R2A105M
C1-C3: SANYO 6TPB470M
C4: TDK C3225X7R1H335M
C5: AVX TPSE686M020R0150
C6: TAIYO YUDEN TMK432BJ106KM
C7: MURATA DE2E3KH222MB3B
D1, D2: DIODES INC. ES1A
D4, D5: BAS21
D6: MMBD5239B
D7: BAT54
L4: COILCRAFT DO1608C-105
L5: VISHAY IHLP-2525CZ-01
L6: PULSE PA1294.650
Q1: FZT690B
Q2: FMMT3904
R1, R2: IRC LRC-LR2512-01-R060-G
T1: EFD25 TRANSPOWER TTI8696
T2: PULSE PA0785
1µF
40.2k 100Ω
C4
3.3µF
50V
470Ω
1W
LTC3901
TYPICAL APPLICATIO S
3901f
13
U
30.1k
12V
MMBZ5242B
1µF
1
11V
6
DRVA
A
4
LTC3723EGN-2
Si7852DP
×2
Si7852DP
×2
1
0.47µF
150pF
9
8
10k
16
7
SDRA
COMP
470pF
1k
10 14 13
FB
68µF
3
6
1
5
3
4
2
2N7002
4.7k
8
CS
7.5Ω
D4
+
5
L2 0.22µH
7.5Ω
D5
220pF
100Ω
9
12
14 15
6
CSE+
5
3k
4
10
13
GND PGND GND PGND
8
2
+
3
–VOUT
16
C2
180µF
16V
VOUT
330pF
7
TIMER
PVCC
CSE– ME ME VCC
10k
4.7k
1/4W
LTC3901EGN
CSF – MF MF
VE
Si7370DP
×2
20Ω 1W
1µF, 100V TDK C4532X7R2A105M
C1: MURATA DE2E3KH222MB3B
C2: SANYO 16SP180M
C3: AVX TPSE686M020R0150
D1-D3: BAS21
D4, D5: MMBD914
L1: COILCRAFT DO1813P-561HC
L2: SUMIDA CDEP105-0R2NC-50
L3: COILCRAFT DO1608C-105
T1: PULSE PA0801.005
T2: PULSE P8207
T3: PULSE PA0785
SYNC
CSF+
11
10k
3k
1500pF
100V
C1
VF
2.2nF
250V
4.7k
1/4W
Si7370DP
×2
VF
VE
T1
5:4:4:2:2
11
7
9
T3
1(1.5mH):0.5
1
4
0.1µF
D3
D2
7
0.22µF B
22Ω
0.47µF
11
3
2
L3
1mH
8
T2
70(980µH):1
CS+
1
1µF
100V
1µF
100V
SDRB
12V
+
C3
1µF
100V
1µF
100V
VREF RAMP CT SPRG GND CS SS
62k
12
DPRG
UVLO
B
DRVB
D1
4 0.22µF
VCC
330pF
1µF
15
5
2
VCC
6
IN+ BOOST
LTC4440ES6
5
TG
GND TS
11V
120Ω
A
3
1µF
100V
•
100pF
15k
1/4W
12V
MMBT3904
1µF
100V
•
215k
VIN
–VIN
48VIN
VIN
•
•
VIN
•
L1
0.56µH
•
•
14
•
•
240W 42V-56V Input to Unregulated 12V Half-Bridge Converter
1
–VOUT
1µF
33.2k
–VOUT
1µF
VOUT
3901 TA02
VOUT
10V
MMBZ5240B
1k
MMBT3904
1µF
100Ω
LTC3901
TYPICAL APPLICATIO S
3901f
U
VIN
93
6
8
3
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
66.5k
1.5nF
4
1µF
15
5
13 7
8
FB GND CT
UVLO
10k
270pF 33k
16
12 14
68nF
0.47µF
1
VREF
9
150k
SPRG RLEB SS DPRG
SDRB
VCC
DRVB
ISNS
DRVA
LTC3723EGN-1
R2
0.03Ω
1.5W
1.5k
4
2
B
R1
0.03Ω
1.5W
Si7852DP
2
4
A
D3
B
243k
330pF
11
22nF
6
6
1
T2
1(1.5mH):0.5
1
4
D6
D5
Si7852DP
5
3
4
2
8
5
C4
2.2nF
250V
8
MOC207
665Ω
5
9
CSF+
22nF
D8
10V
11
1k
6.19k
1/4W
SYNC
220pF
100Ω
100k
2
1
866Ω
1k
1/4W
12
1
0.1µF
14 15
6
CSE+
8
3
4
1k
5
6
5
GND-F GND-S
8
VOUT
–VOUT
2.49k
9.53k
13
2
+
3
16
C1, C2
47µF
16V
×2
10Ω
1W
22nF
10k
470pF
7
TIMER
PVCC
–VOUT
1µF
42.2k
–VOUT
1µF
VOUT
VOUT
4.7µF
MMBT3904
100Ω
–VOUT
12V/20A
VOUT
D7
10V
1k
U
1µF, 100V TDK C3225X7R2A105M
C1, C2: SANYO 16TQC47M
C3: AVX TPSE686M020R0150
C4: MURATA GHM3045X7R222K-GC
D2: DIODES INC. ES1B
D3-D6: BAS21
D7, D8: MMBZ5240B
L4: COILCRAFT DO1608C-105
L5: COILCRAFT DO1813P-561HC
L6: PULSE PA1294.132 OR
PANASONIC ETQP1H1R0BFA
R1, R2: IRC LRC2512-R03G
T1: PULSE PA0805.004
T2: PULSE PA0785
1
470pF
100V
ME ME VCC
866Ω
CSE–
3901 TA03
100Ω
1/4W
10
VF
L6
1.25µH
GND PGND GND PGND
LTC3901EGN
MF MF
V+
LT1431CS8
COLL
REF
CSF –
1k
6.19k
1/4W
VE
1µF
100V
D2
VF
VF
Si7370DP
×2
7
VE
Si7370DP
×2
11
9
T1
4T:6T(65µHMIN):6T:2T:2T
Si7852DP
0.1µF
L4
1mH
ISNS
22Ω
10
+
12V
750Ω
COMP
CS
SDRA
3
C3
68µF
20V
0.1µF
VCC
6
IN+ BOOST
LTC4440ES6
5 4.7Ω
TG
GND TS
6
A
0.1µF
20
200Ω
1/4W
12V
VIN
30k
1/4W
18
2
3
Si7852DP
A
1
12V
•
464k
D4
VCC
6
IN+ BOOST
LTC4440ES6
5 4.7Ω
TG
GND TS
1
12V
•
10
12
16
14
LOAD CURRENT (A)
56VIN
48VIN
42VIN
EFFICIENCY
B
1µF
100V
×3
VF
TYPICAL APPLICATIO S
94
95
96
97
–VIN
1µF
100V
VIN
•
•
L5
0.56µH
•
•
•
42V TO 56V
EFFICIENCY (%)
240W 42V-56V Input to 12V at 20A Isolated 1/4 Brick (2.3" × 1.45")
LTC3901
3901f
15
LTC3901
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
16 15 14 13 12 11 10 9
.254 MIN
.009
(0.229)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 ± .0015
.150 – .157**
(3.810 – 3.988)
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
.015 ± .004
× 45°
(0.38 ± 0.10)
.007 – .0098
(0.178 – 0.249)
2 3
4
5 6
.0532 – .0688
(1.35 – 1.75)
7
8
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN16 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTC1693
High Speed Single/Dual N-Channel MOSFET Drivers
CMOS Compatible Input, VCC Range: 4.5V to 13.2V
LTC1698
Isolated Secondary Synchronous Rectifier Controller
Use with the LT1681, Optocoupler Driver, Pulse
Transformer Synchronization
LT1952
Synchronous DC/DC Forward Controller
Programmable Volt-Second Clamp and Slope Compensation
LTC3722
Synchronous Dual Mode Phase Modulated Full-Bridge Controller
50W to 2kW Power Supply Design, Adaptive Direct Sense ZVS
LTC3723
Synchronous Push-Pull Controller
Adjustable Push-Pull Dead Time, High Efficiency
LTC3900
Synchronous Rectifier Driver for Forward Converters
Similar Function to the LTC3901 but for Forward Converter
LTC4441
6A MOSFET Driver
Adjustable Gate Drive Voltage, Programmable Blanking
LT4430
Optocoupler Driver
SOT-23, Prevents Overshoot
3901f
16
Linear Technology Corporation
LT/TP 1104 1K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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