Philips Semiconductors Product specification PowerMOS transistor Voltage clamped logic level FET with temperature sensing diodes BUK9120-48TC GENERAL DESCRIPTION Protected N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology the device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV and active drain voltage clamping. Temperature sensitive diodes are incorporated for monitoring chip temperature. The device is intended for use in automotive and general purpose switching applications. PINNING - SOT426 PIN gate 2 T1 3 (connected to mb) 5 SYMBOL PARAMETER V(CL)DSR ID Ptot Tj RDS(ON) Drain-source clamp voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V Forward voltage,temperature sense diodes Negative temperature coefficient, temperature sense diodes VF -SF PIN CONFIGURATION MIN. TYP. 40 45 55 52 116 175 20 V A W ˚C mΩ 685 710 735 mV 1.26 1.4 1.54 mV/K SYMBOL d mb T1 g 3 T2 T2 source 1 2 s 4 5 Fig. 1. mb MAX. UNIT DESCRIPTION 1 4 QUICK REFERENCE DATA Fig. 2. drain LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS VDS VDG ±VGS ID ID ID IDM Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Drain-gate clamp current Gate-source clamp current Source T1/T2 voltage Storage temperature Junction temperature continuous continuous Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 140 ˚C Tmb = 25 ˚C Ptot IGD IGS VTS Tstg Tj February 1998 Tmb = 25 ˚C 5ms pulse; ∆ = 0.01 5ms pulse; ∆ = 0.01 - 1 MIN. MAX. UNIT - 40 38 10 52 37 25 208 V V V A A A A - 55 - 55 116 50 50 ±100 175 175 W mA mA V ˚C ˚C Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS VC Electrostatic discharge voltage, Human body model (100pF,1.5KΩ) pins 1,3,5 MIN. MAX. UNIT - 2 kV THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance junction to mounting base Thermal resistance junction to ambient Rth j-a CONDITIONS minimum footprint, FR4 board MIN. TYP. MAX. UNIT - - 1.29 K/W - 50 - K/W MIN. TYP. MAX. UNIT 38 1.0 0.5 - 43 1.5 0.1 - 2.0 2.3 100 250 V V V V µA µA - 0.004 - 2 250 µA µA 10 0.02 - 1 10 - µA µA V - 16 - 20 42 STATIC CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS V(BR)DG VGS(TO) Drain-gate zener voltage Gate threshold voltage IDSS Zero gate voltage drain current 250uA; -55˚C < Tj < 175˚C VDS = VGS; ID = 1 mA; Tj = 175˚C Tj = -55˚C VDS = +35 V; VGS = 0 V; Tj =175 ˚C IDSS Zero gate voltage drain current IGSS Gate source leakage current ±V(BR)GSS VDS = +15 V; VGS = 0 V; Tj =175 ˚C VGS = ±5 V; VDS = 0 V; Tj =175 ˚C Gate source breakdown voltage ±1 mA; RDS(ON) Drain-source on-state resistance VGS = 5 V; ID = 20 A Tj =175 ˚C VF Forward voltage, temperature sense diodes Negative temperature coefficient, temperature sense diodes from 25 ˚C to 140 ˚C Forward voltage hysteresis; temperature sense diodes IF = 250 uA; 685 710 735 mΩ mΩ V mV IF = 250 uA 1.26 1.4 1.54 mV/K 50 mV -SF VHYS February 1998 IF = 125 uA to 250uA 2 25 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes DYNAMIC CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(CL)DSR Drain source clamp voltage (peak value) RG = 10 kΩ; ID = 10 A; -55 < Tj < 175˚C 40 45 55 V gfs Forward transconductance VDS = 25 V; ID = 10 A 20 53 - S Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2200 400 215 2900 500 300 pF pF pF td on tr td off tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 30 V; ID = 25 A; VGS = 5 V; RG = 10 kΩ; - 12 55 60 45 18 80 85 60 µs µs µs µs Ld Internal drain inductance - 2.5 - nH Ls Internal source inductance Measured from upper edge of drain tab to centre of die Measured from source lead soldering point to source bond pad - 7.5 - nH MIN. TYP. MAX. UNIT REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IDR Continuous reverse drain current Pulsed reverse drain current Diode forward voltage - - - 52 A IF = 20 A ; VGS = 0 V IF = 40 A ; VGS = 0 V - 0.95 1 208 1.2 - A V V IDRM VSD CLAMPED ENERGY LIMITING VALUE SYMBOL PARAMETER CONDITIONS WDSRS Non-repetitive drain-source clamped inductive turn off energy Tj = 25˚C prior to clamping; ID = 20 A; VDD < 16 V; VGS = 5 V; RG = 10 kΩ; inductive load February 1998 3 MIN. MAX. UNIT - 450 mJ Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes 120 Normalised Power Derating PD% 10 Zth/(K/W) 110 100 90 1 0.5 80 0.2 70 60 0.1 50 0.1 0.05 PD 0.02 40 30 0.01 tp D= t T 0 tp T 20 10 0 0 20 40 60 80 100 Tmb / C 120 140 160 0.001 180 Fig.3. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 120 0.0001 0.01 t/s 1 100 Fig.6. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Normalised Current Derating ID% 1E-06 150 110 10 VGS/V = 6 8 ID/A 5 4.8 4.6 4.4 4.2 4.0 3.8 100 90 100 80 70 60 50 3.6 40 50 30 20 10 0 0 20 40 60 80 100 Tmb / C 120 140 160 180 0 Fig.4. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V 0 2 4 VDS/V 8 10 Fig.7. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS 1000 0.03 RDS(ON)/mOhm VGS/V = ID/A 3 3.5 0.025 tp = RDS(ON) =VDS/ID 6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 4 1 us 100 4.5 10us 0.02 5 6 100 us DC 0.015 10 1 ms 10ms 100ms 0.01 Self Clamped 1 1 10 VDS/V 0.005 100 Fig.5. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp February 1998 0 20 40 ID/A 60 80 100 Fig.8. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS 4 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes 100 V(CL)DSR/V 50 Tmb / degC = ID/A 49 80 175 25 -55 48 60 47 46 40 45 20 Tj/C = 175 44 25 0 0 1 2 VGS/V 3 4 5 43 6 0 5 RG/kOhm 10 15 Fig.12. Typical clamping voltage V(CL)DSR = f(RG); conditions: ID = 10 A Fig.9. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj 50 0.9 Vf/V gfs/S 0.8 40 0.7 30 If/uA = 0.6 500 20 0.5 250 100 10 0 0.4 0 20 40 ID/A 60 80 50 25 0.3 -50 100 Fig.10. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 25 V 48 0 50 100 Diode Temperature /C 150 200 Fig.13. Typical Vf of sense diodes Vf = f(K); parameter If V(CL)DSR/V -1.25 47 Vf Temperature Coefficient / mV/K -1.3 46 -1.35 45 -1.4 44 43 -1.45 Tmb / degC = 42 175 25 -55 41 40 -1.5 -1.55 0 2 4 6 ID/A 8 10 12 Fig.11. Typical clamping voltage V(CL)DSR = f(ID); conditions: RG = 10 kOhm February 1998 0 50 100 Diode Temperature /C 150 Fig.14. Typical Vf temperature coefficient Vf Temp.Coef.= f(K); conditions: IF = 250 uA 5 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes 2.5 6 BUK959-60 Rds(on) normlised to 25degC 5 Thousands pF 2 1.5 4 3 Ciss 2 1 1 0.5 -100 -50 0 50 Tmb / degC 100 150 Fig.15. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V 2.5 0.1 1 VDS/V 10 100 Fig.18. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 6 BUK959-60 VGS(TO) / V Coss Crss 0 0.01 200 VGS/V max. 5 VDS = 14V 2 VDS = 35V 4 typ. 1.5 3 min. 1 2 0.5 1 0 -100 -50 0 50 Tj / C 100 150 0 200 Fig.16. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS 10 20 QG/nC 30 40 Fig.19. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 50 A; parameter VDS 100 Sub-Threshold Conduction 1E-01 0 IF/A 80 1E-02 2% 1E-03 typ 60 98% 40 1E-04 Tj/C = 1E-05 25 175 20 1E-05 0 0 0.5 1 1.5 2 2.5 3 Fig.17. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS February 1998 0 0.5 1 VSDS/V 1.5 2 Fig.20. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj 6 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes 120 WDSRS% VDD + 110 100 RD 90 VDS 80 - 70 VGS 60 50 RG 0 40 T.U.T. 30 20 10 0 20 40 60 80 100 120 Tmb / C 140 160 180 Fig.23. Switching test circuit. Fig.21. Normalised avalanche energy rating. WDSRS% = f(Tmb); conditions: ID = 20 A + I,V VDD V(CL)DSR L 5V VDS ID - VGS VDS VGS t -ID/100 P,E T.U.T. 0 RGS R 01 shunt PDS = ID x VDS E = PDS dt WDSR t Fig.22. Avalanche energy test circuit. WDSS = 0.5 ⋅ LID2 ⋅ BVDSS /(BVDSS − VDD ) February 1998 Fig.24. Typical Inductive Clamping Waveforms 7 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes MECHANICAL DATA Dimensions in mm 10.3 MAX 4.5 MAX 1.4 MAX 2.5 15.4 11 MAX Net Mass: 1.4 g 0.85 MAX (x4) 3.4 1.7 1.7 3.4 0.5 Fig.25. SOT426 : centre pin connected to mounting base. MOUNTING INSTRUCTIONS Dimensions in mm 11.5 9.0 17.5 3.4 1.7 1.7 3.8 1.3 (x4) Fig.26. SOT426 : soldering pattern for surface mounting. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Epoxy meets UL94 V0 at 1/8". February 1998 8 Rev 1.100 Philips Semiconductors Product specification PowerMOS transistor BUK9120-48TC Voltage clamped logic level FET with temperature sensing diodes DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. February 1998 9 Rev 1.100