STMICROELECTRONICS TS616

TS616
DUAL WIDE BAND OPERATIONAL AMPLIFIER
WITH HIGH OUTPUT CURRENT
■ LOW NOISE : 2.5nV/√Hz
■ HIGH OUTPUT CURRENT : 420mA
■ VERY LOW HARMONIC AND INTERMODULATION DISTORTION
■ HIGH SLEW RATE : 420V/µs
■ -3dB BANDWIDTH : 40MHz@gain=12dB on
25Ω load single ended.
DW
SO8 Exposed-Pad
(Plastic Micro package)
■ 20.7Vp-p DIFFERENTIAL OUTPUT SWING
on 50Ω load, 12V power supply
■ CURRENT FEEDBACK STRUCTURE
■ 5V to 12V POWER SUPPLY
■ SPECIFIED FOR 20Ω and 50Ω
DIFFERENTIAL LOAD
DESCRIPTION
The TS616 is a dual operational amplifier featuring a high output current of 410mA. The drivers
can be configured differentially for driving signals
in telecommunication systems using multiple carriers. The TS616 is ideally suited for xDSL (High
Speed Asymmetrical Digital Subscriber Line) applications. This circuit is capable of driving a 10Ω
or 25Ω load at ±2.5V, 5V, ±6V or +12V power
supply. The TS616 is able to reach a -3dB bandwidth of 40MHz on 25Ω load with a 12dB gain.
This device is designed for high slew rates supporting low harmonic distortion and intermodulation.
APPLICATION
ORDER CODE
Part Number
Temperature Range
Package
-40, +85°C
-40, +85°C
DW
DW
TS616IDW
TS616IDWT
DW = Small Outline Package with Exposed-Pad, T = Tape & Real
PIN CONNECTIONS (top view)
Output1 1
8 VCC +
Inverting Input1 2
-
Non Inverting Input1 3
+
VCC - 4
7 Output2
-
6 Inverting Input2
+
5 Non Inverting Input2
Cross Section View Showing Exposed-Pad
This pad can be connected to a (-Vcc) copper area on the PCB
■ Line driver for xDSL
■ Multiple Video Line Driver
December 2002
1/27
TS616
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Vid
Vin
Parameter
Supply voltage
1)
Differential Input Voltage
Input Voltage Range
2)
3)
Value
Unit
±7
V
±2
V
±6
V
Toper
Operating Free Air Temperature Range
-40 to + 85
°C
Tstd
Storage Temperature
-65 to +150
°C
Tj
Maximum Junction Temperature
150
°C
Rthjc
Thermal Resistance Junction to Case
16
°C/W
°C/W
Rthja
Thermal Resistance Junction to Ambient Area
60
Pmax.
Maximum Power Dissipation (@Ta=25°C) for Tj=150°C
2
W
ESD
CDM : Charged Device Model
1.5
kV
only pins
1, 4, 7, 8
ESD
only pins
2, 3, 5, 6
HBM : Human Body Model
MM : Machine Model
CDM : Charged Device Model
2
kV
200
1.5
V
kV
2
kV
100
V
HBM : Human Body Model
MM : Machine Model
4)
Output Short Circuit
1.
2.
3.
4.
All voltage values, except differential voltage are with respect to network terminal.
Differential voltage are non-inverting input terminal with respect to the inverting input terminal.
The magnitude of input and output voltage must never exceed VCC +0.3V.
An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating.
Destructive dissipation can result from short circuit on amplifiers.
OPERATING CONDITIONS
Symbol
VCC
Vicm
Parameter
Value
Unit
±2.5 to ±6
V
-VCC+1.5V to +VCC-1.5V
V
Power Supply Voltage
Common Mode Input Voltage
TYPICAL APPLICATION:
Differential Line Driver for xDSL Applications
3
8
+
+Vcc
1/2 TS616
TS615
2
_
12.5Ω
1
Vi
Vo
R2
1:2
R1
25Ω
GND
R4
R3
Vi
4
5
_
12.5Ω
1/2 TS616
TS615
+
4
2/27
Vo
-Vcc
100Ω
TS616
ELECTRICAL CHARACTERISTICS
VCC = ±6Volts, Rfb=910Ω,Tamb = 25°C (unless otherwise specified)
Note: As described on page 24 (table 71), the TS616 requires a 620Ω feedback resistor for an optimized bandwidth with a gain of 12B for
a 12V power supply. Nevertheless, due to production test constraints, the TS616 is tested with the same feedback resistor for 12V and 5V
power supplies (910Ω).
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
1
1.6
3.5
Unit
DC PERFORMANCE
Vio
∆Vio
Input Offset Voltage
Differential Input Offset Voltage
Iib+
Positive Input Bias Current
Iib-
Negative Input Bias Current
ZIN+
ZINCIN+
CMR
SVR
Input(+) Impedance
Input(-) Impedance
Input(+) Capacitance
Common Mode Rejection Ratio
20 log (∆Vic/∆Vio)
Supply Voltage Rejection Ratio
Tamb
Tmin. < Tamb < Tmax.
Tamb = 25°C
Tamb
Tmin. < Tamb < Tmax.
Tamb
Tmin. < Tamb < Tmax.
∆Vic = ±4.5V
Tmin. < Tamb < Tmax.
∆Vcc=±2.5V to ±6V
Tmin. < Tamb < Tmax.
20 log (∆Vcc/∆Vio)
ICC
Total Supply Current per Operator
No load
DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTIC
Vout = 7Vp-p, RL = 25Ω
ROL
Open Loop Transimpedance
Tmin. < Tamb. < Tmax.
Small Signal Vout<20mVp
-3dB Bandwidth
AV = 12dB, RL = 25Ω
Large Signal Vout=3Vp
Full Power Bandwidth
BW
AV = 12dB, RL = 25Ω
Small Signal Vout<20mVp
Gain Flatness @ 0.1dB
AV = 12dB, RL = 25Ω
Vout = 6Vp-p, AV = 12dB, RL
Tr
Rise Time
= 25Ω
Vout = 6Vp-p, AV = 12dB, RL
Tf
Fall Time
= 25Ω
Vout = 6Vp-p, AV = 12dB, RL
Ts
Settling Time
= 25Ω
Vout = 6Vp-p, AV = 12dB, RL
SR
Slew Rate
= 25Ω
RL=25Ω Connected to GND
VOH
High Level Output Voltage
RL=25Ω Connected to GND
VOL
Low Level Output Voltage
Vout = -4Vp
Output Sink Current
Tmin. < Tamb < Tmax.
Iout
Vout = +4Vp
Output Source Current
Tmin. < Tamb < Tmax.
58
72
5
7.2
3
3.1
82
54
1
64
62
2.5
30
mV
15
µA
5
13.5
5.7
25
40
µA
kΩ
Ω
pF
dB
81
80
13.5
mV
dB
17
mA
MΩ
MHz
26
7
MHz
10.6
ns
12.2
ns
50
ns
330
420
V/µs
4.8
5.05
-5.3
-490
-395
420
370
-320
330
-5.1
V
V
mA
3/27
TS616
Note: As described on page 24 (table 71), the TS616 requires a 620Ω feedback resistor for an optimized bandwidth with a gain of 12B for
a 12V power supply. Nevertheless, due to production test constraints, the TS616 is tested with the same feedback resistor for 12V and 5V
power supplies (910Ω).
Symbol
Parameter
NOISE AND DISTORTION
eN
Equivalent Input Noise Voltage
iNp
Equivalent Input Noise Current (+)
iNn
Equivalent Input Noise Current (-)
2nd Harmonic Distortion
HD2
(differential configuration)
HD3
3rd Harmonic Distortion
(differential configuration)
IM2
2nd Order Intermodulation Product
(differential configuration)
IM3
4/27
3rd Order Intermodulation Product
(differential configuration)
Test Condition
F = 100kHz
F = 100kHz
F = 100kHz
Vout = 14Vp-p, AV = 12dB
F= 110kHz, RL = 50Ω diff.
Vout = 14Vp-p, AV = 12dB
F= 110kHz, RL = 50Ω diff.
F1= 100kHz, F2 = 110kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
F1= 370kHz, F2 = 400kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
F1 = 100kHz, F2 = 110kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
F1 = 370kHz, F2 = 400kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
Min.
Typ.
Max.
Unit
2.5
15
21
nV/√Hz
pA/√Hz
pA/√Hz
-87
dBc
-83
dBc
-76
dBc
-75
-88
dBc
-87
TS616
ELECTRICAL CHARACTERISTICS
VCC = ±2.5Volts, Rfb=910Ω,Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
0.2
2.5
Unit
DC PERFORMANCE
Vio
∆Vio
Input Offset Voltage
Differential Input Offset Voltage
Iib+
Positive Input Bias Current
Iib-
Negative Input Bias Current
Tamb
Tmin. < Tamb < Tmax.
1
Tamb = 25°C
Tamb
4
Tmin. < Tamb < Tmax.
7
Tamb
1.1
Tmin. < Tamb < Tmax.
1.2
mV
2.5
mV
30
µA
11
µA
ZIN+
Input(+) Impedance
71
ZIN-
Input(-) Impedance
62
Ω
CIN+
Input(+) Capacitance
Common Mode Rejection Ratio
1.5
pF
∆Vic = ±1V
20 log (∆Vic/∆Vio)
Tmin. < Tamb. < Tmax.
Supply Voltage Rejection Ratio
∆Vcc=±2V to ±2.5V
20 log (∆Vcc/∆Vio)
Tmin. < Tamb. < Tmax.
CMR
SVR
55
61
dB
60
63
79
dB
78
ICC
Total Supply Current per Operator
No load
DYNAMIC PERFORMANCE and OUTPUT CHARACTERISTICS
Vout = 2Vp-p, RL = 10Ω
ROL
Open Loop Transimpedance
Tmin. < Tamb. < Tmax.
kΩ
11.5
2
15
4.2
mA
MΩ
1.5
-3dB Bandwidth
Small Signal Vout<20mVp
AV = 12dB, RL = 10Ω
Full Power Bandwidth
Large Signal Vout = 1.4Vp
AV = 12dB, RL = 10Ω
20
Gain Flatness @ 0.1dB
Small Signal Vout<20mVp
AV = 12dB, RL = 10Ω
5.7
MHz
Tr
Rise Time
Vout = 2.8Vp-p, AV = 12dB
RL = 10Ω
11
ns
Tf
Fall Time
Vout = 2.8Vp-p, AV = 12dB
RL = 10Ω
11.5
ns
Ts
Settling Time
Vout = 2.2Vp-p, AV = 12dB
RL = 10Ω
39
ns
SR
Slew Rate
Vout = 2.2Vp-p, AV = 12dB
RL = 10Ω
100
130
V/µs
VOH
High Level Output Voltage
RL=10Ω Connected to GND
1.5
1.7
V
Low Level Output Voltage
RL=10Ω Connected to GND
-300
-400
BW
VOL
Iout
Output Sink Current
Output Source Current
Vout = -1.25Vp
20
MHz
-1.9
Tmin. < Tamb < Tmax.
Vout = +1.25Vp
Tmin. < Tamb < Tmax.
28
-360
200
270
-1.7
V
mA
240
5/27
TS616
Symbol
Parameter
NOISE AND DISTORTION
eN
Equivalent Input Noise Voltage
iNp
Equivalent Input Noise Current (+)
iNn
Equivalent Input Noise Current (-)
Test Condition
Min.
Typ.
HD2
2nd Harmonic Distortion
(differential configuration)
F = 100kHz
F = 100kHz
F = 100kHz
Vout = 6Vp-p, AV = 12dB
F= 110kHz, RL = 20Ω diff.
HD3
3rd Harmonic Distortion
(differential configuration)
Vout = 6Vp-p, AV = 12dB
F= 110kHz, RL = 20Ω diff.
-98
F1= 100kHz, F2 = 110kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-86
F1= 370kHz, F2 = 400kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-88
F1 = 100kHz, F2 = 110kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-90
F1 = 370kHz, F2 = 400kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-85
IM2
IM3
6/27
2nd Order Intermodulation Product
(differential configuration)
3rd Order Intermodulation Product
(differential configuration)
Max.
Unit
2.5
15
21
nV/√Hz
pA/√Hz
pA/√Hz
-97
dBc
dBc
dBc
dBc
TS616
Figure 1: Load Configuration
Figure 4: Load Configuration
Load: RL=25Ω, VCC=±6V
Load: RL=10Ω, VCC=±2.5V
+6V
+
TS616
_
50Ω
cable
49.9Ω
TS616
25Ω
50Ω
cable
10Ω
_
50Ω
33Ω
1W
-6V
+2.5V
+
49.9Ω
11Ω
0.5W
-2.5V
50Ω
Figure 2: Closed Loop Gain vs. Frequency
Figure 5: Closed Loop Gain vs. Frequency
AV=+1
AV=-1
2
2
20
0
-160
(Vcc=±2.5V)
-2
0
-4
phase
(Vcc=±6V)
-180
(Vcc=±2.5V)
-40
-8
(Vcc=±6V)
-10
-60
-12
-80
(Vcc=±2.5V, Rfb=1.1kΩ, Rload=10Ω)
(Vcc=±6V, Rfb=750Ω, Rload=25Ω)
-14
-200
(Vcc=±2.5V)
-6
-220
-8
(Vcc=±6V)
-240
-10
-12
-260
(Vcc=±2.5V, Rfb=1kΩ, Rin=1kΩ, Rload=10Ω)
(Vcc=±6V, Rfb=680Ω, Rin=680Ω, Rload=25Ω)
-14
-100
-16
-280
-16
-120
100
1k
10k
100k
1M
10M
-300
100M
100
1k
Frequency (Hz)
10k
100k
1M
10M
100M
Frequency (Hz)
Figure 3: Closed Loop Gain vs. Frequency
Figure 6: Closed Loop Gain vs. Frequency
AV=+2
AV=-2
8
40
8
(Vcc=±6V)
gain
6
20
(Vcc=±2.5V)
phase
4
-140
gain
6
-160
0
(Vcc=±2.5V)
phase
4
2
(Vcc=±6V)
-180
-40
-2
(Vcc=±6V)
-60
-4
-6
-80
(Vcc=±2.5V, Rfb=1kΩ, Rload=10Ω)
(Vcc=±6V, Rfb=680Ω, Rload=25Ω)
-8
-100
-10
-200
(Vcc=±2.5V)
0
-220
-2
(Vcc=±6V)
Phase (°)
-20
(Vcc=±2.5V)
0
(gain (dB))
2
Phase (°)
(gain (dB))
Phase (°)
-20
-6
(gain (dB))
-4
Phase (°)
(gain (dB)
-140
gain
(Vcc=±2.5V)
phase
-2
40
(Vcc=±6V)
gain
0
-240
-4
-6
-260
(Vcc=±2.5V, Rfb=1kΩ, Rin=510Ω, Rload=10Ω)
(Vcc=±6V, Rfb=680Ω, Rin=750//620Ω, Rload=25Ω)
-8
-280
-10
-120
100
1k
10k
100k
1M
Frequency (Hz)
10M
100M
-300
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
7/27
TS616
Figure 7: Closed Loop Gain vs. Frequency
Figure 10: Closed Loop Gain vs. Frequency
AV=+4
AV=-4
14
14
40
-140
gain
gain
12
12
20
phase
10
(Vcc=±6V)
phase
0
(Vcc=±6V)
-180
-40
4
(Vcc=±6V)
2
-60
0
-80
(Vcc=±2.5V, Rfb=910Ω, Rg=300Ω, Rload=10Ω)
(Vcc=±6V, Rfb=620Ω, Rg=560//330Ω, Rload=25Ω)
-2
(gain (dB))
Phase (°)
-20
(Vcc=±2.5V)
6
-200
(Vcc=±2.5V)
6
-220
4
(Vcc=±6V)
2
-240
0
-260
(Vcc=±2.5V, Rfb=1kΩ, Rin=320//360Ω, Rload=10Ω)
(Vcc=±6V, Rfb=620Ω, Rin=360//270Ω, Rload=25Ω)
-2
-100
-280
-4
-4
-300
-120
100
1k
10k
100k
1M
10M
100
100M
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
Figure 8: Closed Loop Gain vs. Frequency
Figure 11: Closed Loop Gain vs. Frequency
AV=+8
AV=-8
20
20
40
-140
gain
gain
18
18
20
phase
-160
(Vcc=±2.5V)
(Vcc=±2.5V)
16
16
(Vcc=±6V)
phase
0
-180
(Vcc=±6V)
-40
10
(Vcc=±6V)
-60
8
6
(gain (dB))
Phase (°)
-20
(Vcc=±2.5V)
12
-220
10
(Vcc=±6V)
-240
8
6
-80
(Vcc=±2.5V, Rfb=680Ω, Rg=240//160Ω, Rload=10Ω)
(Vcc=±6V, Rfb=510Ω, Rg=270//100Ω, Rload=25Ω)
4
-200
(Vcc=±2.5V)
12
Phase (°)
14
14
(gain (dB))
Phase (°)
8
8
(gain (dB))
-160
(Vcc=±2.5V)
(Vcc=±2.5V)
10
-260
(Vcc=±2.5V, Rfb=680Ω, Rin=160//180Ω, Rload=10Ω)
(Vcc=±6V, Rfb=510Ω, Rin=150//110Ω, Rload=25Ω)
4
-100
-280
2
2
-300
-120
100
1k
10k
100k
1M
10M
100
100M
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
Figure 9: Bandwidth vs. Temperature
Figure 12: Positive Slew Rate
AV=+4, Rfb=620Ω, VCC=±6V, RL=25Ω
AV=+4, Rfb=910Ω
4
50
Vcc=±6V
Load=25Ω
45
2
VOUT (V)
Bw (MHz)
40
35
0
30
-2
Vcc=±2.5V
Load=10Ω
25
20
-40
-20
0
20
40
Temperature (°C)
8/27
60
80
-4
0.0
10.0n
20.0n
30.0n
Time (s)
40.0n
50.0n
TS616
Figure 16: Positive Slew Rate
AV= - 4, Rfb=620Ω, VCC=±6V, R L=25Ω
2
4
1
2
VOUT (V)
VOUT (V)
Figure 13: Positive Slew Rate
AV=+4, Rfb=910Ω, VCC=±2.5V, RL=10Ω
0
-2
-1
-2
0.0
0
10.0n
20.0n
30.0n
40.0n
-4
0.0
50.0n
10.0n
Figure 14: Negative Slew Rate
2
2
1
VOUT (V)
VOUT (V)
4
0
-2
50.0n
40.0n
50.0n
-1
10.0n
20.0n
30.0n
40.0n
-2
0.0
50.0n
10.0n
20.0n
30.0n
Time (s)
Figure 15: Negative Slew Rate
AV=+4, Rfb=910Ω, VCC=±2.5V, RL=10Ω
Figure 18: Negative Slew Rate
AV= - 4, Rfb=620Ω, VCC=±6V, RL=25Ω
2
4
1
2
VOUT (V)
VOUT (V)
40.0n
0
Time (s)
0
-1
-2
0.0
30.0n
Figure 17: Positive Slew Rate
AV= - 4, Rfb=910Ω, VCC=±2.5V, RL=10Ω
AV=+4, Rfb=620Ω, VCC=±6V, RL=25Ω
-4
0.0
20.0n
Time (s)
Time (s)
0
-2
10.0n
20.0n
30.0n
Time (s)
40.0n
50.0n
-4
0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
9/27
TS616
Figure 19: Negative Slew Rate
AV= - 4, Rfb=910Ω, VCC=±2.5V, RL=10Ω
Figure 22: Input Voltage Noise Level
AV=+92, Rfb=910Ω, Input+ connected to Gnd via 10Ω
2
5.0
Input Voltage Noise (nV/√Hz)
VOUT (V)
+
0
-2
0.0
10.0n
20.0n
30.0n
40.0n
4.5
_
4.0
10Ω
Output
- 6V
Ω
910
910Ω
3.5
3.0
2.5
2.0
100
50.0n
+ 6V
1k
10k
Time (s)
100k
1M
(Frequency (Hz)
Figure 20: Slew Rate vs. Temperature
AV=+4, Rfb=910Ω, VCC=±2.5V, RL=10Ω
Figure 23: Transimpedance vs. Temperature
Open Loop
30
200
150
25
Vcc=±6V
Positive SR
20
50
ROL (MΩ)
Slew Rate (V/µs)
100
0
-50
15
10
Negative SR
-100
Vcc=±2.5V
5
-150
-200
-40
-20
0
20
40
60
0
-40
80
-20
0
20
40
60
80
Temperature (°C)
Temperature (°C)
Figure 21: Slew Rate vs. Temperature
AV=+4, Rfb=910Ω, VCC=±6V, RL=25Ω
Figure 24: Icc vs. Power Supply
Open loop, no load
600
30
500
400
20
Icc(+)
200
100
0
10
Positive&Negative SR
Rfb=620Ω
ICC (mA)
Slew Rate (V/µs)
300
Positive&Negative SR
Rfb=910Ω
-100
-200
0
-10
-300
-400
Icc(-)
-20
-500
-600
-40
-20
0
20
40
Temperature (°C)
10/27
60
80
-30
0
1
2
3
4
5
6
VCC (V)
7
8
9
10
11
12
TS616
Figure 25: Iib vs. Power Supply
Figure 28: Iib(+) vs. Temperature
Open loop, no load
Open loop, no load
7
8
IB+
6
7
Vcc=±6V
6
5
IIB(+) (µA)
IB (µA)
5
4
3
IB -
2
4
3
2
Vcc=±2.5V
1
1
0
0
5
6
7
8
9
10
11
12
-1
-40
-20
0
Vcc (V)
20
40
60
80
Temperature (°C)
Figure 26: Iib(-) vs. Temperature
Figure 29: Voh & Vol vs. Power Supply
Open loop, no load
Open loop, RL=25Ω
6
5
5
VOH
4
4
3
VOH & VOL (V)
Vcc=±6V
IIB(-) (µA)
3
2
2
1
0
VOL
-1
-2
Vcc=±2.5V
-3
1
-4
-5
0
-40
-6
-20
0
20
40
60
5
80
6
7
8
Temperature (°C)
9
10
11
12
Vcc (V)
Figure 27: Icc vs. Temperature
Figure 30: Voh vs. Temperature
Open loop, no load
Open loop
6
14
12
10
5
Icc(+) for Vcc=±2.5V
8
6
Icc(+) for Vcc=±6V
4
2
VOH (V)
ICC (mA)
4
0
-2
-4
-6
-8
Vcc=±6vV
Load=25Ω
3
2
Icc(-) for Vcc=±6V
Icc(-) for Vcc=±2.5V
1
-10
Vcc=±2.5V
Load=10Ω
-12
-14
-40
-20
0
20
40
Temperature (°C)
60
80
0
-40
-20
0
20
40
60
80
Temperature (°C)
11/27
TS616
Figure 31: Vol vs. Temperature
Figure 34: CMR vs. Temperature
Open loop
Open loop, no load
0
70
Vcc=±2.5V
Load=10Ω
-1
68
66
CMR (dB)
-2
VOL (V)
Vcc=±6V
64
-3
Vcc=±6V
Load=25Ω
-4
62
60
58
56
Vcc=±2.5V
54
-5
52
-6
-40
-20
0
20
40
60
50
-40
80
-20
0
Temperature (°C)
20
40
60
80
Temperature (°C)
Figure 32: Differential Vio vs. Temperature
Figure 35: SVR vs. Temperature
Open loop, no load
Open loop, no load
450
84
400
82
350
SVR (dB)
∆VIO (µV)
Vcc=±2.5V
300
Vcc=±6V
80
78
Vcc=±6V
250
76
200
-40
-20
0
20
40
60
80
-40
Vcc=±2.5V
-20
0
Temperature (°C)
20
40
60
80
60
80
Temperature (°C)
Figure 33: Vio vs. Temperature
Figure 36: Iout vs. Temperature
Open loop, no load
Open loop, VCC=±6V, RL=10Ω
300
2.0
250
Vcc=±6V
200
150
1.5
100
Isource
1.0
Iout (mA)
VIO (mV)
50
0.5
0
-50
-100
-150
-200
-250
Isink
-300
0.0
-350
Vcc=±2.5V
-0.5
-40
-20
0
20
-400
40
Temperature (°C)
12/27
60
80
-450
-40
-20
0
20
40
Temperature (°C)
TS616
Figure 37: Iout vs. Temperature
Figure 40: Isource vs. Output Amplitude.
Open loop, VCC=±2.5V, RL=25Ω
VCC=±2.5V, Open Loop, no Load
700
300
250
200
600
150
Isource
50
Iout (mA)
Isource (mA)
100
0
-50
-100
-150
500
400
300
-200
-250
200
Isink
-300
100
-350
-400
-450
-40
-20
0
20
40
60
0
0.0
80
0.5
1.0
Temperature (°C)
1.5
2.0
2.5
Vout (V)
Figure 38: Maximum Output Amplitude vs. Load
Figure 41: Isink vs. Output Amplitude
AV=+4, Rfb=620Ω, VCC=±6V
VCC=±6V, Open Loop, no Load
12
0
Vcc=±6V
-100
-200
8
Isink (mA)
VOUT-MAX (VP-P)
10
6
4
-300
-400
Vcc=±2.5V
-500
2
-600
0
0
50
100
150
-700
200
-6
-5
-4
RLOAD (Ω)
-3
-2
-1
Figure 42: Isource vs. Output Amplitude
VCC=±2.5V, Open Loop, no Load
VCC=±6V, Open Loop, no Load
0
700
-100
600
-200
500
Isource (mA)
Isink (mA)
Figure 39: Isink vs. Output Amplitude.
-300
-400
400
300
-500
200
-600
100
-700
-2.5
0
Vout (V)
0
-2.0
-1.5
-1.0
Vout (V)
-0.5
0.0
0
1
2
3
4
5
6
Vout (V)
13/27
TS616
Figure 43: Group Delay
SAFE OPERATING AREA
VCC=±6V, VCC=±2.5V
Figure 44: Safe Operating Area
100
Av=4
Vcc=±6V, Rfb=620Ω, Load=25Ω
Vcc=±2.5V, Rfb=910Ω, Load=10Ω
IF Bw = 10Hz
Smoothing=19.247MHz
on 10ns/div scale
90
70
700
90
600
80
Delay
VINPUT
(mV(ns)
)
RMS
Delay (ns)
80
100
60
50
40
30
Av=4
Vcc=±6V, Rfb=620Ω, Load=25Ω
Vcc=±2.5V, Rfb=910Ω, Load=10Ω
IF Bw = 10Hz
Smoothing=19.247MHz
on 10ns/div scale
60
400
50
SAFE
OPERATING
AREA
300
40
200
30
20
10
70
500
Vcc=+/-6V
Ta=25°C
G=12dB
RL=100Ω
100
20
300k
1M
10M
Frequency (Hz)
50M
100
300k
1M
1M
10M
10M
50M
100M
Frequency
Frequency (Hz)
(Hz)
Figure 44 shows the safe operating condition. This
curve shows the input level vs. the input frequency. It’s necessary to consider this characteristic to
guarantee the design. In the dash-lined zone, the
consumption increases. Moreover, this increased
consumption could do damage to the chip if the
temperature increases.
14/27
TS616
INTERMODULATION DISTORTION PRODUCT
Non-ideal output of the amplifier can be described
by the following series:
2
n
Vout = C 0 + C 1 V in + C 2 V in + …C n V in
due to non-linearity in the input-output amplitude
transfer, where the input is Vin=Asinωt, C0 is the
DC component, C1(Vin) is the fundamental and Cn
is the amplitude of the harmonics of the output signal Vout.
A one-frequency (one-tone) input signal contributes to harmonic distortion. A two-tone input signal contributes to harmonic distortion and intermodulation product.
The study of the intermodulation/distortionfor a
two-tone input signal is the first step in characterizing the driving capability of multi-tone input signals.
In this case :
+ C ( A sin ω t + B sin ω t )
2
1
2
2
… + C ( A sin ω t + B sin ω t )
n
1
2
V
In this expression, we recognize the second order
intermodulation IM2 by the frequencies (ω1-ω2)
and (ω1+ω2) and the third order intermodulation
IM3 by the frequencies (2ω1-ω2), (2ω1+ω2),
(−ω1+2ω2) and (ω1+2ω2).
The measurement of the intermodulation product
of the driver is achieved by using the driver as a
mixer by a summing amplifier configuration. In this
way, the non-linearity problem of an external mixing device is avoided.
Figure 45: Non-inverting Summing Amplifier for
Intermodulation measurements
1kΩ
1kΩ
49.9Ω
+
Vin1
50Ω
+Vcc
49.9Ω
_
100Ω
910Ω
Rout1
300Ω
Vin1
Vout diff.
1:√2
n
50Ω
100Ω
300Ω
49.9Ω
1kΩ
= A sin ω t + B sin ω t
in
1
2
V o ut = C 0 + C 1 ( A sin ω 1 t + B sin ω 2 t )
49.9Ω
1/2TS616
1:√2
√2:1
100Ω
50Ω
Rout2
910Ω
_
49.9Ω
1/2TS616
+
-Vcc
1kΩ
49.9Ω
and :
+ C1 ( A sin ω 1 t + B sin ω 2 t )
C2 2
2
– -------  A cos 2ω t + B cos 2ω t
2
1
2 
+ 2 C2 AB ( cos ( ω 1 – ω 2 )t – cos ( ω 1 – ω 2 ) t )
C3
+  3 -------
 4
The following graphs show the IM2 and the IM3 of
the amplifier in different configurations. The
two-tone input signal was generated by the multisource generator Marconi 2026. Each tone has
the same amplitude. The measurement was performed using a HP3585A spectrum analyzer.
3
3
+  C3 A sin 3ω 1 t + B sin 3ω 2 t


2
3C A B
1
3
+ ------------------------  sin ( 2ω 1 – ω 2 )t – --- sin ( 2ω 1 + ω )t

2
2
2 
2
3C A B
3
1
+ ------------------------  sin ( – ω + 2ω ) t – --- sin ( ω + 2ω )t
1
1

2
2 
2 2
… + C n ( V in )
n
 A 2 + B2
V out = C 0 + C 2  ---------------------
2


 A3 sin ω t + B 3 sin ω t + 2A 2 B sin ω t + 2AB 2 sin ω t
2

1
2
1
15/27
TS616
Figure 49: Intermodulation vs. Load
370kHz & 400kHz, AV=+1.5, Rfb=1kΩ, RL=14Ω diff.,VCC=±2.5V
370kHz & 400kHz, AV=+1.5, Rfb=1kΩ, Vout=6.5Vpp,V CC=±2.5V
-30
-30
-40
-40
IM3
340kHz, 430kHz, 1140kHz, 1170kHz
-50
-50
IM2
30kHz
IM2
770kHz
-60
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
Figure 46: Intermodulation vs. Output Amplitude
IM3
340kHz, 430kHz
-70
-80
-60
IM2
30kHz
IM2
770kHz
-70
-80
-90
-90
IM3
1140kHz, 1170kHz
-100
-100
0
1
2
3
4
5
6
7
-110
8
0
20
40
60
80
100
120
140
160
180
200
Differential Load (Ω)
Differential Output Voltage (Vp-p)
Figure 50: Intermodulation vs. Output Amplitude
370kHz & 400kHz, AV=+1.5, Rfb=1kΩ, RL=28Ω diff.,VCC=±2.5V
100kHz & 110kHz, AV=+4, Rfb=620Ω, RL=200Ω diff.,VCC=±6V
-30
-30
-40
-40
-50
-50
-60
IM3
340kHz, 430kHz
-70
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
Figure 47: Intermodulation vs. Output Amplitude
IM2
770kHz
IM2
30kHz
-80
IM3
90kHz, 120kHz
-60
IM2
210kHz
IM3
310kHz
-70
IM3
320kHz
-80
-90
-90
-100
IM3
1140kHz, 1170kHz
-100
-110
0
1
2
3
4
5
6
7
8
2
4
Differential Output Voltage (Vp-p)
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
Figure 48: Intermodulation vs. Gain
Figure 51: Intermodulation vs. Output Amplitude
370kHz & 400kHz, RL=20Ω diff., Vout=6Vpp, VCC=±2.5V
100kHz & 110kHz, AV=+4, Rfb=620Ω, RL=50Ω diff., VCC=±6V
-30
-30
-40
-40
-60
IM2
30kHz
IM2
770kHz
-70
-80
-70
-80
-90
-100
-100
-110
1.5
2.0
2.5
3.0
Closed Loop Gain (Linear)
16/27
IM2
210kHz
-60
-90
-110
1.0
IM3
90kHz, 120kHz, 310kHz, 320kHz
-50
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
-50
IM3
340kHz, 430kHz, 1140kHz, 1170kHz
3.5
4.0
2
4
6
8
10
12
14
16
18
Differential Output Voltage (Vp-p)
20
22
TS616
Figure 52: Intermodulation vs. Frequency Range
Figure 54: Intermodulation vs. Output Amplitude
AV=+4, Rfb=620Ω, RL=50Ω diff., Vout=16Vpp, VCC=±6V
370kHz & 400kHz, AV=+4, Rfb=620Ω, RL=50Ω diff., VCC=±6V
-30
-60
Quadratic Summation of all IM2 and IM3 components
generated by each two-tones signal
-65
IM3
1140kHz, 1170kHz
-50
f1=100kHz
f2=110kHz
-75
f1=1MHz
f2=1.1MHz
f1=400kHz
f2=430kHz
f1=200kHz
f2=230kHz
-80
IM2 and IM3 (dBc)
-70
(dB)
IM2
30kHz
-40
-85
-60
IM3
340kHz, 430kHz
-70
-80
-90
-90
-95
-100
-100
100k
IM2
770kHz
-110
200k
300k
400k
500k
600k
700k
800k
900k
1M
1.1M
1M
0
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
Frequency (Hz)
Figure 53: Intermodulation vs. Output Amplitude
370kHz & 400kHz, AV=+4, Rfb=620Ω, RL=200Ω diff.,VCC=±6V
-30
-40
IM2 and IM3 (dBc)
-50
IM2
770kHz
IM2
30kHz
-60
IM3
1140kHz, 1170kHz
-70
IM3
340kHz, 430kHz
-80
-90
-100
-110
0
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
17/27
TS616
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Figure 55: Exposed-Pad Package
In the ADSL frequency range, printed circuit board
parasites can affect the closed-loop performance.
THERMAL INFORMATION
The TS616 is housed in an Exposed-Pad plastic
package. As depicted in figure 55, this package
uses a lead frame upon which the die is mounted.
This lead frame is exposed as a thermal pad on
the underside of the package. The thermal contact
is direct with the dice. This thermal path provides
excellent colling.
The thermal pad is electrically isolated from all
pins in the package. It should be soldered to a
copper area of the PCB underneath the package.
Through these thermal paths within this copper area, heat can be conducted away from the package. In this case, the copper area should be connected to (-VCC).
18/27
DICE
The implementation of a proper ground plane on
both sides of the PCB is mandatory to provide low
inductance and low resistance common return.
The most important factors affecting gain flatness
and bandwidth are stray capacitances at the output and inverting input. To minimize these capacitances, the space between signal lines and
ground plane should be increased. Feedback
components connections must be as short as possible in order to decrease the associated inductance which affects high frequency gain errors. It
is very important to choose the smallest possible
external components, for example, surface
mounted devices (SMD) in order to minimize the
size of all DC and AC connections.
1
Side View
Bottom View
DICE
Cross Section View
Figure 56: Evaluation Board
TS616
R201
Figure 57: Schematic Diagram
Non-Inverting
R218
1
_
R216
3
+
1/2 TS616
2
R214
R211
R208
R209
R212
R203
J207
J208
Inverting
R215
R215
J211
R219
7
R217
+
_
1/2 TS616
R204
1/2TS616
5
6
R209
J208
5
R219
7
+
R217
_
R221
6
R204
J210
R218
1
_
R211
R214
J210
J211
R221
R202
1/2TS616
2
R207
J206
+
R220
3
R216
R207
R202
R206
R220
J205
J206
R205
R213
R213
R210
J209
R201
Summing Amplifier
R206
J206
R207
3
+
1/2TS616
2
R218
1
_
R216
R202
Differential Amplifier
3
R207
+
1/2TS616
R218
1
_
J210
R211
R214
R220
2
R216
R202
J206
J210
R211
R214
R220
J205
R212
Power Supply
C201
100uF
C202
+Vcc
100nF
8
J201
+Vcc
3
2
1
_
4
-Vcc
-Vcc
-Vcc
100nF
Exposed-Pad
C204
100uF
C206
C203
R213
+
1/2TS616
J202
GND
J303
-Vcc
R210
R205
J211
R219
7
100nF
J209
+
R221
1/2TS616
5
100nF
_
R217
6
+Vcc
C205
R215
+Vcc
6
1
J204
2
_
1/2TS616
3
5
7
+
-Vcc
19/27
TS616
Figure 58: Component Locations - Top Side
Figure 60: Top Side Board Layout
Figure 59: Component Locations - Bottom Side
Figure 61: Bottom Side Board Layout
20/27
TS616
k is the Boltzmann’s constant, equal
1,374.10-23J/°K. T is the temperature (°K).
NOISE MEASUREMENT
to
Figure 62: Noise Model
The output noise eNo is calculated using the Superposition Theorem. However it is not the simple
sum of all noise sources. The square root of the
sum of the square of each noise source.
+
iN+
R3
TS616
eN
iN-
eNo =
HP3577
Input noise:
8nV/√Hz
_
N3
output
2
2
2
2
2
2
2
= eN × g + iNn × R2 + iNp × R3 × g
R2 2
R2 2
… +  ------- × 4kTR1 + 4kTR2 +  1 + ------- × 4kTR3, ( eq2 )
R1
R1
eNo
R2
N2
R1
2
2
2
2
2
2
V1 + V2 + V3 + V4 + V5 + V6 ,( eq1 )
2
The input noise of the instrumentation must be extracted from the measured noise value. The real
output noise value of the driver is:
N1
2
2
( Measured ) – ( instrumentation ) , ( eq3 )
eNo =
eN : input voltage noise of the amplifier
iNn : negative input current noise of the amplifier
iNp : positive input current noise of the amplifier
The closed loop gain is :
R fb
A V = g = 1 + ---------R
g
The six noise sources are :
R2
V1 = eN ×  1 + -------
R1
V2 = iNn × R 2
R2
V3 = iNp × R3 ×  1 + -------

R1
R2
V4 = – ------- × 4kTR1
R1
V5 =
4 kTR2
R2
V6 =  1 + ------- 4kTR3
R1
We assume that the thermal noise of a resistance
R is:
4kTR ∆ F
wher ∆F is the specified bandwidth.
On 1Hz bandwidth the thermal noise is reduced to
4kTR
The input noise is called the Equivalent Input
Noise as it is not directly measured but it is evaluated from the measurement of the output divided
by the closed loop gain (eNo/g).
After simplification of the fourth and the fifth term
of (eq2) we obtain:
eNo
2
2
2
2
2
2
2
2
= eN × g + iNn × R2 + iNp × R3 × g
R2 2
… + g × 4kTR2 +  1 + ------- × 4kTR3, ( eq4 )
R1
Measurement of eN:
We assume a short-circuit on the non-inverting input (R3=0). (eq4) comes:
eNo =
2
2
2
2
eN × g + iNn × R2 + g × 4kTR2, ( eq5 )
In order to easily extract the value of eN, the resistance R2 will be chosen as low as possible. In the
other hand, the gain must be large enough.
R1=10Ω, R2=910Ω, R3=0, Gain=92
Equivalent Input Noise: 2.57nV/√Hz
Input Voltage Noise: eN=2.5nV/√Hz
Measurement of iNn:
R3=0 and the output noise equation is still the
(eq5). This time the gain must be decreased to decrease the thermal noise contribution.
R1=100Ω, R2=910Ω, R3=0, Gain=10.1
Equivalent Input Noise: 3.40nV/√Hz
Negative Input Current Noise: iNn =21pA/√Hz
Measurement of iNp:
To extract iNp from (eq3), a resistance R3 is connected to the non-inverting input. The value of R3
must be chosen in order to keep its thermal noise
21/27
TS616
contribution as low as possible against the iNp
contribution.
R1=100Ω, R2=910Ω, R3=100Ω, Gain=10.1
Equivalent Input Noise: 3.93nV/√Hz
Positive Input Current Noise: iNp=15pA/√Hz
Conditions: frequency=100kHz, VCC =±2.5V
Instrumentation: Spectrum Analyzer HP3585A
(input noise of the HP3585A: 8nV/√Hz)
The following figure shows the case of a 5V single
power supply configuration
Figure 64: Circuit for +5V single supply
+5V
10µF
+5V
POWER SUPPLY BYPASSING
Correct power supply bypassing is very important
for optimizing the performance in high frequency
ranges. Bypass capacitors should be placed as
close as possible to the IC pins to improve high
frequency bypassing. A capacitor greater than
1µF is necessary to minimize the distortion. For a
better quality bypassing a capacitor of 10nF can
be added using the same implementation conditions. Bypass capacitors must be incorporated for
both the negative and the positive supply.
Figure 63: Circuit for Power Supply Bypassing
+VCC
10µF
+
10nF
+
IN
Rin
1kΩ
100µF
½ TS616
_
OUT
10Ω
R1
820Ω
Rfb
R2
820Ω
+ 1µF
RG
10nF
+
CG
The TS616 operates with power supplies from
12V down to 5V. This can be achieved by either a
dual power supplies of ±6V or ±2.5V or a single
power supply of 12V or 5V referenced to the
ground. In the case of asymmetrical supply, a new
biasing is necessary to assume a positive output
dynamic range between 0V and +VCC supply rails.
Considering the values of VOH and VOL, the amplifier will provide an output dynamic from +0.5V to
10.6V on 25Ω load for a 12V supply and from
0.45V to 3.8V on 10Ω load for a 5V supply.
+
TS616
-
10nF
10µF
+
-VCC
SINGLE POWER SUPPLY
22/27
The amplifier must be biased with a mid-supply
(nominally +VCC/2), in order to maintain the DC
component of the signal at this value. Several options are possible to provide this bias supply, such
as a virtual ground using an operational amplifier
or a two-resistance divider (which is the cheapest
solution). A high resistance value is required to
limit the current consumption. On the other hand,
the current must be high enough to bias the
non-inverting input of the amplifier. If we consider
TS616
this bias current (30µA max.) as the 1% of the current through the resistance divider to keep a stable mid-supply, two resistances of 2.2kΩ can be
used in the case of a 12V power supply and two
resistances of 820Ω can be used in the case of a
5V power supply.
The input provides a high pass filter with a break
frequency below 10Hz which is necessary to remove the original 0 volt DC component of the input
signal, and to fix it at +VCC/2.
CHANNEL SEPARATION - CROSSTALK
The following figure shows the crosstalk from an
amplifier to a second amplifier. This phenomenon,
accentuated at high frequencies, is unavoidable
and intrinsic to the circuit.
Nevertheless, the PCB layout also has an effect
on the crosstalk level. Capacitive coupling between signal wires, distance between critical signal nodes and power supply bypassing are the
most significant factors.
Table 1: Closed-Loop Gain - Feedback Components
VCC (V)
±6
±2.5
Gain
Rfb (Ω)
+1
+2
+4
+8
-1
-2
-4
-8
+1
+2
+4
+8
-1
-2
-4
-8
750
680
620
510
680
680
620
510
1.1k
1k
910
680
1k
1k
910
680
INVERTING AMPLIFIER BIASING
In this case a resistance R is necessary to achieve
good input biasing, see Figure 66.
This resistance is calculated by assuming the negative and positive input bias current. The aim is to
compensate for the offset bias current which could
affect the input offset voltage and the output DC
component. Assuming Ib-, Ib+, Rin, Rfb and a zero
volt output, the resistance R comes: R = Rin // Rfb .
Figure 65: Crosstalk vs. Frequency
AV=+4, Rfb=620Ω, VCC=±6V, Vout=2Vp
-50
-60
CrossTalk (dB)
CHOICE OF THE FEEDBACK CIRCUIT
-70
-80
Figure 66: Compensation of the Input Bias
Current
-90
-100
-110
Rfb
-120
-130
10k
Ib100k
1M
10M
Rin
_
Vcc+
Output
Frequency (Hz)
TS616
+
Vcc-
Ib+
Load
R
23/27
TS616
ACTIVE FILTERING
Figure 67: Low-Pass Active Filtering. Sallen-Key
preferable to use very stable resistors and capacitances values.
In the case of R1=R2:
R
fb
2C – C ---------2
1R
g
ζ = -----------------------------------2 C C
1 2
C1
R1
R2
+
IN
OUT
C2
TS616
_
25Ω
RG
Rfb
910Ω
The resistors Rfb and RG give the gain of the filter
as a classical non-inverting amplification configuration :
A
V
R fb
= g = 1 + ---------Rg
Assume the following expression is the response
of the system:
Vout jω
g
T jω = ------------------- = --------------------------------------------Vinjω
2
jω ( jω )
1 + 2ζ ------- + -------------2
ωc
ωc
INCREASING THE LINE LEVEL BY USING AN
ACTIVE IMPEDANCE MATCHING
With passive matching, the output signal amplitude of the driver must be twice the amplitude on
the load. To go beyond this limitation, active
matching impedance can be used. With this technique, it is possible to keep good impedance
matching with an amplitude on the load higher
than half of the output driver amplitude. This concept is shown in Figure 68 for a differential line.
Figure 68: TS616 as a differential line driver with
an active impedance matching
1µ
100n
Vcc+
+
_
Vcc+
R2
1k
Rs1
10n
GND
Vo°
Vi
1:n
Vo
1/2 R1
R3
RL
Vcc/2
the cut-off frequency is not gain-dependent and it
becomes:
1
ω c = -------------------------------------R1R2C 1C2
The damping factor becomes:
1
ζ = --- ω c ( C1 R 1 + C1 R 2 + C2 R 1 – C1 R 1 g )
2
The higher the gain, the more sensitive the damping factor is. When the gain is higher than 1 it is
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1/2 R1
10µ
Vi
R5
100n
Vo°
1k
GND
+
_
100n
R4
Vcc+
GND
Rs2
Vo
Hybrid
&
Transformer
100Ω
TS616
Component Calculation
Let us consider the equivalent circuit for a single-ended configuration as shown in Figure 69.
Figure 69: Single ended equivalent circuit
By identification of both equations (eq2) and
(eq3), the synthesized impedance is, with
Rs1=Rs2=Rs:
+
Rs1
_
Vi
2R2 R2
Vi  1 + ----------- + --------

R1 R3 Rs1Iout
Vo = ------------------------------------------------ – ----------------------- ,( eq3 )
R2
R2
1 – -------1 – -------R3
R3
Rs
Ro = ----------------- ,( eq4 )
R2
1 – -------R3
Vo°
Vo
R2
Figure 70: Equivalent schematic. Ro is the
synthesized impedance.
-1
R3
½ R1
½ RL
Ro
Let us consider the unloaded system. Assuming
the currents through R1, R2 and R3
are respectively:
2Vi ( Vi – Vo° )
( Vi + Vo )
---------, --------------------------- and -----------------------R1
R2
R3
as Vo° equals Vo without load, the gain in this
case becomes :
2R2 R2
1 + ----------- + -------Vo ( noload )
R1 R3
G = --------------------------------- = -----------------------------------Vi
R2
1 – -------R3
The gain, for the loaded system will be (eq1):
2 R2 R2
1 + ----------- + -------Vo ( with load )
1
R1 R3
GL = -------------------------------------- = --- ------------------------------------ ,( eq1 )
Vi
2
R2
1 – -------R3
As shown in Figure70, this system is an ideal generator with a synthesized impedance as the internal impedance of the system. From this, the output voltage becomes:
Iout
Vi.Gi
1/2RL
Unlike the level Vo° required for a passive impedance, Vo° will be smaller than 2Vo in our case. Let
us write Vo°=kVo with k the matching factor varying between 1 and 2. Assuming that the current
through R3 is negligible, (eq4) becomes the following :
kV oRL
Ro = -----------------------------RL + 2R s1
After choosing the k factor, Rs will equal to
1/2RL(k-1).
A good impedance matching assumes:
1
R o = --- RL ,( eq5 )
2
(eq4) and (eq5) give :
R2
2Rs
-------- = 1 – ----------- ,( eq6 )
R3
RL
By fixing an arbitrary value of R2, (eq6) becomes :
Vo = ( ViG ) – ( RoIout ) ,( eq2 )
with Ro the synthesized impedance and Iout the
output current. On the other hand Vo can be expressed as:
R2
R3 = --------------------2Rs
1 – ----------RL
Finally, the values of R2 and R3 allow us to extract
R1 from (eq1), and it becomes:
25/27
TS616
2R2
R1 = ----------------------------------------------------------- ,( eq7 )
R2
R2

2 1 – -------- GL – 1 – -------
R3
R3
with GL the required gain.
Table 2 : Components Calculation for Impedance
Matching Implementation
GL (gain for the
loaded system)
R1
R2 (=R4)
R3 (=R5)
Rs
Load viewed by
each driver
26/27
GL is fixed for the application requirements
GL=Vo/Vi=0.5(1+2R2/R1+R2/R3)/(1-R2/R3)
2R2/[2(1-R2/R3)GL-1-R2/R3]
Abritrary fixed
R2/(1-Rs/0.5RL)
0.5RL(k-1)
kRL/2
TS616
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO Exposed-Pad)
Millimeters
Inches
Dim.
Min.
A
A1
A2
B
C
D
D1
E
E1
e
H
h
L
k
ddd
Typ.
1.350
0.000
1.100
0.330
0.190
4.800
Max.
Min.
1.750
0.250
1.650
0.510
0.250
5.000
0.053
0.001
0.043
0.013
0.007
0.189
4.000
0.150
3.10
3.800
Max.
0.069
0.010
0.065
0.020
0.010
0.197
0.122
2.41
1.270
5.800
0.250
0.400
0d
Typ.
0.157
0.095
0.050
6.200
0.500
1.270
8d
0.100
0.228
0.010
0.016
0d
0.244
0.020
0.050
8d
0.004
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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