STMICROELECTRONICS TS616IDW

TS616
Dual wide band operational amplifier
with high output current
Features
■
Low noise: 2.5 nV/√Hz
■
High output current: 420 mA
■
Very low harmonic and intermodulation
distortion
■
High slew rate: 420 V/µs
■
-3dB bandwidth: 40 MHz @ gain = 12 dB on
25 Ω single-ended load
■
20.7 Vp-p differential output swing on 50 Ω
load, 12 V power supply
■
Current feedback structure
■
5 V to 12 V power supply
■
Specified for 20 Ω and 50 Ω differential load
DW
SO-8 Exposed-pad
(Plastic micropackage)
Pin connections (top view)
Output1 1
Inverting Input1 2
-
Non Inverting Input1 3
+
VCC - 4
Applications
8 VCC +
7 Output2
-
6 Inverting Input2
+
5 Non Inverting Input2
dice
■
Line driver for xDSL
■
Multiple video line driver
Pad
Cross Section View Showing Exposed-Pad.
This pad must be connected to a (-Vcc) copper area on the PCB
Description
The TS616 is a dual operational amplifier
featuring a high output current of 410 mA. This
driver can be configured differentially for driving
signals in telecommunication systems using
multiple carriers. The TS616 is ideally suited for
xDSL (high speed asymmetrical digital subscriber
line) applications. This circuit is capable of driving
a 10 Ω or 25 Ω load on a range of power supplies:
±2.5 V, 5 V, ±6 V or +12 V. The TS616 is capable
of reaching a -3 dB bandwidth of 40 MHz on 25 Ω
load with a 12 dB gain. This device is designed for
high slew rates and demonstrates low harmonic
distortion and intermodulation.
September 2008
Rev 5
1/37
www.st.com
37
Contents
TS616
Contents
1
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
Safe operating area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5
Intermodulation distortion product . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6
Printed circuit board layout considerations . . . . . . . . . . . . . . . . . . . . . 20
6.1
7
8
9
Thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Noise measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.1
Measurement of eN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.2
Measurement of iNn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.3
Measurement of iNp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Power supply bypassing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.1
Single power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.2
Channel separation and crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Choosing the feedback circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.1
The bias of an inverting amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
9.2
Active filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
10
Increasing the line level using active impedance matching . . . . . . . . 31
11
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
12
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
TS616
1
Typical application
Typical application
Figure 1 shows a schematic of a typical xDSL application using the TS616.
Figure 1.
Differential line driver for xDSL applications
3
8
+
+Vcc
1/2 TS616
TS615
2
_
12.5Ω
1
Vi
Vo
R2
1:2
R1
25Ω
GND
100Ω
R4
R3
Vi
4
5
Vo
_
12.5Ω
1/2 TS616
TS615
+
4
-Vcc
3/37
Absolute maximum ratings and operating conditions
2
TS616
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings
Symbol
VCC
Vid
Vin
Parameter
Supply voltage (1)
Differential input voltage
Input voltage range
(2)
(3)
Value
Unit
±7
V
±2
V
±6
V
Toper
Operating free air temperature range
-40 to + 85
°C
Tstd
Storage temperature
-65 to +150
°C
Maximum junction temperature
150
°C
Rthjc
Thermal resistance junction to case
16
°C/W
Rthja
Thermal resistance junction to ambient area
60
°C/W
Pmax
Maximum power dissipation (at Tamb = 25° C) for
Tj = 150° C
2
W
Tj
ESD
only pins
1, 4, 7, 8
HBM: human body model(4)
MM: machine model(5)
CDM: charged device model(6)
1.5
2
200
kV
kV
V
ESD
only pins
2, 3, 5, 6
HBM: human body model(4)
MM: machine model(5)
CDM: charged device model(6)
1.5
2
100
kV
kV
V
(7)
Output short circuit
1. All voltage values, except differential voltage are with respect to network terminal.
2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of input and output voltage must never exceed VCC +0.3 V.
4. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
5. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
6. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
7. An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive
heating. Destructive dissipation can result from short-circuits on amplifiers.
Table 2.
Symbol
4/37
Operating conditions
Parameter
VCC
Power supply voltage
Vicm
Common mode input voltage
Value
Unit
±2.5 to ±6
V
-VCC+1.5 V to +VCC-1.5 V
V
TS616
Electrical characteristics
3
Electrical characteristics
Table 3.
VCC = ±6 V, Rfb= 910 Ω, Tamb = 25° C (unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
1
3.5
Unit
DC performance
Vio
Input offset voltage
ΔVio
Differential input offset voltage
Iib+
Positive input bias current
Iib-
Negative input bias current
Tamb
mV
Tmin < Tamb < Tmax
1.6
Tamb = 25°C
2.5
Tamb
5
mV
30
µA
Tmin < Tamb < Tmax
7.2
Tamb
3
15
µA
Tmin < Tamb < Tmax
3.1
ZIN+
Input(+) impedance
82
kΩ
ZIN-
Input(-) impedance
54
Ω
CIN+
Input(+) capacitance
1
pF
CMR
Common mode rejection ratio
20 log (ΔVic/ΔVio)
SVR
ICC
ΔVic = ±4.5V
58
dB
Tmin < Tamb < Tmax
ΔVCC = ±2.5V to ±6V
Supply voltage rejection ratio
20 log (ΔVCC/ΔVio)
Tmin < Tamb < Tmax
Total supply current per operator
No load
64
62
72
81
dB
80
13.5
17
mA
Dynamic performance and output characteristics
ROL
Open loop transimpedance
Vout = 7Vp-p, RL = 25Ω
5
13.5
MΩ
Tmin < Tamb < Tmax
5.7
-3dB bandwidth
Small signal Vout < 20mVp
AV = 12dB, RL = 25Ω
Full power bandwidth
Large signal Vout = 3Vp
AV = 12dB, RL = 25Ω
26
Gain flatness @ 0.1dB
Small signal Tamb<20mVp
AV = 12dB, RL = 25Ω
7
MHz
Tr
Rise time
Vout = 6Vp-p, AV = 12dB, RL = 25Ω
10.6
ns
Tf
Fall time
Vout = 6Vp-p, AV = 12dB, RL = 25Ω
12.2
ns
Ts
Settling time
Vout = 6Vp-p, AV= 12dB, RL = 25Ω
50
ns
SR
Slew rate
Vout = 6Vp-p, AV = 12dB, RL = 25Ω
330
420
V/µs
VOH
High level output voltage
RL = 25Ω connected to GND
4.8
5.05
V
VOL
Low level output voltage
RL = 25Ω Connected to GND
BW
25
40
MHz
-5.3
-5.1
V
5/37
Electrical characteristics
Table 3.
TS616
VCC = ±6 V, Rfb= 910 Ω, Tamb = 25° C (unless otherwise specified) (continued)
Symbol
Parameter
Output sink current
Test conditions
Vout = -4Vp
Min.
Typ.
-320
-490
Tmin < Tamb < Tmax
Iout
Output source current
Vout = +4Vp
Max.
Unit
-395
mA
330
420
Tmin < Tamb < Tmax
370
Noise and distortion
eN
Equivalent input noise voltage
F = 100kHz
2.5
nV/√Hz
iNp
Equivalent input noise current (+)
F = 100kHz
15
pA/√Hz
iNn
Equivalent input noise current (-)
F = 100kHz
21
pA/√Hz
HD2
2nd harmonic distortion
(differential configuration)
Vout = 14Vp-p, AV = 12dB
F= 110kHz, RL = 50Ω diff.
-87
dBc
HD3
3rd harmonic distortion
(differential configuration)
Vout = 14Vp-p, AV = 12dB
F= 110kHz, RL = 50Ω diff.
-83
dBc
F1= 100kHz, F2 = 110kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
-76
F1= 370kHz, F2 = 400kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
-75
F1 = 100kHz, F2 = 110kHz
Vout = 16Vp-p, AV = 12dB
RL = 50Ω diff.
-88
F1 = 370kHz, F2 = 400kHz
Vout = 16Vp-p, AV = 12 B
RL = 50Ω diff.
-87
IM2
IM3
6/37
2nd order intermodulation product
(differential configuration)
3rd order intermodulation product
(differential configuration)
dBc
dBc
TS616
Table 4.
Electrical characteristics
VCC = ±2.5 V, Rfb= 910 Ω, Tamb = 25° C (unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
0.2
2.5
Unit
DC performance
Vio
Input offset voltage
ΔVio
Differential input offset voltage
Iib+
Positive input bias current
Iib-
Negative input bias current
Tamb
mV
Tmin < Tamb < Tmax
1
Tamb = 25°C
2.5
Tamb
4
Tmin < Tamb < Tmax
7
mV
30
µA
Tamb
1.1
Tmin < Tamb < Tmax
1.2
11
µA
ZIN+
Input(+) impedance
71
kΩ
ZIN-
Input(-) impedance
62
Ω
CIN+
Input(+) capacitance
1.5
pF
CMR
Common mode rejection ratio
20 log (ΔVic/ΔVio)
ΔVic = ±1V
Supply voltage rejection ratio
20 log (ΔVcc/ΔVio)
ΔVCC= ±2V to ±2.5V
SVR
ICC
Total supply current per
operator
55
61
dB
Tmin < Tamb < Tmax
60
63
79
dB
Tmin < Tamb < Tmax
78
No load
11.5
15
mA
Dynamic performance and output characteristics
ROL
Open loop transimpedance
Vout = 2Vp-p, RL = 10Ω
2
4.2
MΩ
Tmin < Tamb < Tmax
1.5
-3dB bandwidth
Small signal Vout < 20mVp
AV = 12dB, RL = 10Ω
Full power bandwidth
Large signal Vout = 1.4Vp AV= 12dB,
RL = 10Ω
20
Gain flatness @ 0.1dB
Small signal Vout< 20mVp
AV = 12dB, RL = 10Ω
5.7
MHz
Tr
Rise time
Vout = 2.8Vp-p, AV = 12dB RL= 10Ω
11
ns
Tf
Fall time
Vout = 2.8Vp-p, AV = 12dB RL= 10Ω
11.5
ns
Ts
Settling time
Vout = 2.2Vp-p, AV = 12dB RL= 10Ω
39
ns
SR
Slew rate
Vout = 2.2Vp-p, AV = 12dB RL =10Ω
100
130
V/µs
VOH
High level output voltage
RL=10Ω connected to GND
1.5
1.7
V
VOL
Low level output voltage
RL=10Ω connected to GND
BW
Output sink current
Vout = -1.25Vp
20
MHz
-1.9
-300
Tmin < Tamb < Tmax
Iout
Output source current
Vout = +1.25Vp
Tmin < Tamb < Tmax
28
-1.7
V
-400
-360
mA
200
270
240
7/37
Electrical characteristics
Table 4.
Symbol
TS616
VCC = ±2.5 V, Rfb= 910 Ω, Tamb = 25° C (unless otherwise specified) (continued)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Noise and distorsion
eN
Equivalent input noise voltage
F = 100kHz
2.5
nV/√Hz
iNp
Equivalent input noise current
(+)
F = 100kHz
15
pA/√Hz
iNn
Equivalent input noise current
(-)
F = 100kHz
21
pA/√Hz
HD2
2nd harmonic distortion
(differential configuration)
Vout = 6Vp-p, AV = 12 dB
F= 110kHz, RL = 20 Ω diff.
-97
dBc
HD3
3rd harmonic distortion
(differential configuration)
Vout = 6Vp-p, AV = 12dB
F= 110 kHz, RL = 20Ω diff.
-98
dBc
F1= 100 kHz, F2 = 110 kHz
Vout = 6 Vp-p, AV = 12dB
RL = 20Ω diff.
-86
F1= 370kHz, F2 = 400kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-88
F1 = 100kHz, F2 = 110kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-90
F1 = 370kHz, F2 = 400kHz
Vout = 6Vp-p, AV = 12dB
RL = 20Ω diff.
-85
IM2
IM3
8/37
2nd order intermodulation
product
(differential configuration)
3rd order intermodulation
product
(differential configuration)
dBc
dBc
TS616
Electrical characteristics
Figure 2.
Load configuration
Figure 3.
RL= 25 Ω
VCC= ±.5V
RL= 25Ω
VCC= ±6 V
+6V
+
TS616
_
50Ω
cable
TS616
25Ω
Closed loop gain vs. frequency
AV=+1, VCC=±2.5V, Rfb=1.1kΩ, RL= 10Ω
VCC=±6V, Rfb=750Ω, RL= 25Ω
2
Figure 5.
49.9Ω
11Ω
0.5W
50Ω
Closed loop gain vs. frequency
AV=-1, VCC= ±2.5V, Rfb=1kΩ, Rin=1kΩ, RL= 10Ω
VCC=±6V, Rfb=680Ω, Rin=680Ω, RL= 25Ω
40
2
0
20
-160
(Vcc=±2.5V)
(Vcc=±2.5V)
-2
0
-4
phase
(Vcc=±6V)
-180
-40
-8
(Vcc=±6V)
-10
-60
-12
-80
-200
(Vcc=±2.5V)
-6
-220
-8
(Vcc=±6V)
-10
-240
-12
-260
-14
-100
-16
Phase (°)
(Vcc=±2.5V)
(gain (dB))
-6
Phase (°)
-4
-20
-14
-280
-16
-120
100
1k
10k
100k
1M
10M
-300
100M
100
Frequency (Hz)
Figure 6.
Closed loop gain vs. frequency
Figure 7.
100k
1M
10M
100M
Closed loop gain vs. frequency
8
(Vcc=±6V)
gain
-140
gain
6
6
20
(Vcc=±2.5V)
phase
10k
AV=-2, VCC=±2.5V, Rfb=1kΩ, Rin=510Ω, RL=10Ω
VCC=±6V, Rfb=680Ω, Rin=750/620Ω, RL= 25Ω
40
8
4
1k
Frequency (Hz)
AV=+2, VCC=±2.5V, Rfb=1kΩ, RL= 10Ω
VCC=±6V, Rfb=680Ω, RL= 25Ω
-160
(Vcc=±2.5V)
phase
4
(Vcc=±6V)
0
-180
-40
-2
(Vcc=±6V)
-60
-4
-6
-80
-8
-100
-10
-200
(Vcc=±2.5V)
0
-220
-2
(Vcc=±6V)
-4
-240
-6
-260
-8
Phase (°)
-20
(Vcc=±2.5V)
0
(gain (dB))
2
Phase (°)
2
(gain (dB))
-140
gain
0
phase
10Ω
-2.5V
(Vcc=±6V)
gain
50Ω
cable
_
50Ω
33Ω
1W
Figure 4.
-2
+2.5V
+
49.9Ω
-6V
(gain (dB)
Load configuration
-280
-10
-120
100
1k
10k
100k
1M
Frequency (Hz)
10M
100M
-300
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
9/37
Electrical characteristics
Figure 8.
TS616
Closed loop gain vs. frequency
Figure 9.
AV=+4, VCC=±2.5V, Rfb=910Ω, Rg=300Ω, RL=10Ω
VCC=±6V, Rfb=620Ω, Rg=560/330Ω, RL= 25Ω
40
14
Closed loop gain vs. frequency
AV=-4, VCC=±2.5V, Rfb=1kΩ Rin=320/360Ω RL=10Ω
14
VCC=±6V, Rfb=620Ω, Rin=360/270Ω, RL= 25Ω
gain
12
12
20
-160
(Vcc=±2.5V)
10
phase
(Vcc=±2.5V)
10
(Vcc=±6V)
(Vcc=±6V)
-180
-40
4
(Vcc=±6V)
2
-60
0
-80
-2
-200
(Vcc=±2.5V)
6
-220
4
(Vcc=±6V)
2
-240
0
-260
-2
-100
-4
-280
-4
-120
100
1k
10k
100k
1M
10M
-300
100M
100
1k
10k
Frequency (Hz)
100k
1M
20
AV=-8, VCC=±2.5V, Rfb=680Ω Rin=160/180Ω RL=10Ω
40
20
20
18
VCC=±6V, Rfb=510Ω, Rin=150/110Ω, RL= 25Ω
gain
-140
gain
18
-160
(Vcc=±2.5V)
phase
(Vcc=±2.5V)
(Vcc=±6V)
16
0
phase
-180
(Vcc=±6V)
14
-40
10
(Vcc=±6V)
-60
8
6
-80
4
-100
2
-200
(Vcc=±2.5V)
12
-220
10
(Vcc=±6V)
8
-240
6
-260
4
Phase (°)
-20
(Vcc=±2.5V)
12
(gain (dB))
14
Phase (°)
(gain (dB))
100M
Figure 11. Closed loop gain vs. frequency
AV=+8, VCC=±2.5V, Rfb=680Ω, Rg=240/160Ω, RL=10Ω
VCC=±6V, Rfb=510Ω, Rg=270/100Ω, RL= 25Ω
16
10M
Frequency (Hz)
Figure 10. Closed loop gain vs. frequency
-280
2
-120
100
1k
10k
100k
1M
10M
-300
100M
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
Figure 12. Positive slew rate
Figure 13. Positive slew rate
2
2
1
VOUT (V)
4
0
-2
-4
0.0
10M
100M
AV = +4, Rfb = 910 Ω, VCC = ±2.5V, RL= 10Ω
AV = +4, Rfb = 910Ω, VCC = ±6 , RL= 25Ω
VOUT (V)
Phase (°)
-20
(Vcc=±2.5V)
6
(gain (dB))
8
Phase (°)
(gain (dB))
phase
0
8
0
-1
10.0n
20.0n
30.0n
Time (s)
10/37
-140
gain
40.0n
50.0n
-2
0.0
10.0n
20.0n
30.0n
Time (s)
40.0n
50.0n
TS616
Electrical characteristics
Figure 14. Positive slew rate
Figure 15. Positive slew rate
AV = -4, Rfb = 910 Ω, VCC = ±2.5 V, RL= 10 Ω
4
2
2
1
VOUT (V)
VOUT (V)
AV = -4, Rfb = 620 Ω, VCC = ±6 V, RL= 25 Ω
0
-2
-4
0.0
0
-1
10.0n
20.0n
30.0n
40.0n
-2
0.0
50.0n
10.0n
20.0n
Time (s)
Figure 16. Negative slew rate
50.0n
AV = +4, Rfb = 910 Ω, VCC = ±2.5 V, RL= 10 Ω
4
2
2
1
VOUT (V)
VOUT (V)
40.0n
Figure 17. Negative slew rate
AV = +4, Rfb = 620 Ω, VCC = ±6 V, RL= 25 Ω
0
-2
-4
0.0
30.0n
Time (s)
0
-1
10.0n
20.0n
30.0n
40.0n
-2
0.0
50.0n
10.0n
Time (s)
20.0n
30.0n
40.0n
50.0n
Time (s)
Figure 18. Negative slew rate
Figure 19. Negative slew rate
AV = +4, Rfb = 620 Ω, VCC = ±6 V, RL= 25 Ω
AV = +4, Rfb = 910 Ω, VCC = ±2.5 V, RL= 10 Ω
4
2
VOUT (V)
VOUT (V)
2
0
0
-2
-4
0.0
10.0n
20.0n
30.0n
Time (s)
40.0n
50.0n
-2
0.0
10.0n
20.0n
30.0n
40.0n
50.0n
Time (s)
11/37
Electrical characteristics
TS616
Figure 20. Input voltage noise level
Figure 21. ICC vs. power supply
AV = +92, Rfb = 910 Ω
Input+ connected to GND via 25 Ω
Open loop, no load
30
5.0
4.5
_
4.0
10Ω
+ 6V
Output
20
Icc(+)
- 6V
Ω
910
910Ω
10
ICC (mA)
Input Voltage Noise (nV/√Hz)
+
3.5
0
3.0
-10
2.5
-20
Icc(-)
-30
2.0
100
1k
10k
100k
0
1M
1
2
3
4
5
(Frequency (Hz)
6
7
8
9
10
11
12
VCC (V)
Figure 22. Iib vs. power supply
Figure 23. VOH & VOL vs. power supply
Open loop, RL = 25 Ω
Open loop, no load
6
7
5
Iib+
VOH
4
IB+
6
3
VOH & VOL (V)
Iib
IB (μA)
5
4
3
1
0
VOL
-1
-2
Iib-
IB-
2
2
-3
-4
1
-5
-6
0
5
6
7
8
9
10
11
5
12
6
7
8
Vcc (V)
Figure 24. Isource vs. output amplitude
600
600
500
500
Isource (mA)
Isource (mA)
700
400
300
100
100
0
Vout (V)
12/37
300
200
3
12
400
200
2
11
VCC = ±2.5 V, open loop, no load
700
1
10
Figure 25. Isource vs. output amplitude
VCC = ±6 V, open loop, no load
0
9
Vcc (V)
4
5
6
0
0.0
0.5
1.0
1.5
Vout (V)
2.0
2.5
TS616
Electrical characteristics
Figure 26. Isink vs. output amplitude
Figure 27. Isink vs. output amplitude
VCC = ±2.5 V, open loop, no load
0
0
-100
-100
-200
-200
Isink (mA)
Isink (mA)
VCC = ±6 V, open loop, no load
-300
-400
-300
-400
-500
-500
-600
-600
-700
-6
-5
-4
-3
-2
-1
-700
-2.5
0
-2.0
-1.5
Vout (V)
-1.0
-0.5
0.0
Vout (V)
Figure 28. Maximum output amplitude vs. load Figure 29. Bandwidth vs. temperature
AV = +4, Rfb = 620 Ω, VCC = ±6 V
AV = +4, Rfb = 910 Ω
12
50
Vcc=±6V
Load=25Ω
10
45
8
40
Bw (MHz)
VOUT-MAX (VP-P)
Vcc=±6V
6
4
Vcc=±2.5V
35
30
2
Vcc=±2.5V
Load=10Ω
25
0
0
50
100
150
20
-40
200
-20
0
20
40
60
80
60
80
Temperature (°C)
RLOAD (Ω )
Figure 30. Transimpedance vs. temperature
Open loop
Figure 31. ICC vs. temperature
Open loop, no load
30
14
12
10
25
6
20
Icc(+) for Vcc=±6V
4
ICC (mA)
ROL (MΩ )
Icc(+) for Vcc=±2.5V
8
Vcc=±6V
15
2
0
-2
-4
10
-6
Vcc=±2.5V
-8
Icc(-) for Vcc=±6V
Icc(-) for Vcc=±2.5V
-10
5
-12
0
-40
-14
-20
0
20
40
Temperature (°C)
60
80
-40
-20
0
20
40
Temperature (°C)
13/37
Electrical characteristics
TS616
Figure 32. Slew rate vs. temperature
Figure 33. Slew rate vs. temperature
AV = +4, Rfb = 910 Ω, VCC = ±6 V, RL= 25 Ω
AV = +4, Rfb = 910 Ω, VCC = ±2.5 V, RL= 10 Ω
600
200
500
150
400
100
Slew Rate (V/μs)
Slew Rate (V/μs)
300
200
100
0
Positive&Negative SR
Rfb=620Ω
Positive&Negative SR
Rfb=910Ω
-100
-200
-300
Positive SR
50
0
-50
Negative SR
-100
-400
-150
-500
-600
-40
-20
0
20
40
60
-200
-40
80
-20
0
20
Temperature (°C)
40
60
80
Temperature (°C)
Figure 34. Iib(+) vs. temperature
Figure 35. Iib(+) vs. temperature
Open loop, no load
Open loop, no load
8
5
7
Vcc=±6V
4
6
Vcc=±6V
3
IIB(-) (μA)
IIB(+) (μA)
5
4
3
2
2
Vcc=±2.5V
Vcc=±2.5V
1
1
0
-1
-40
-20
0
20
40
60
0
-40
80
-20
Temperature (°C)
20
40
60
80
60
80
Temperature (°C)
Figure 36. VOH vs. temperature
Figure 37. VOL vs. temperature
Open loop
Open loop
6
0
5
-1
4
Vcc=±2.5V
Load=10Ω
-2
Vcc=±6vV
Load=25Ω
VOL (V)
VOH (V)
0
3
2
-3
Vcc=±6V
Load=25Ω
-4
1
-5
Vcc=±2.5V
Load=10Ω
0
-40
-20
0
20
40
Temperature (°C)
14/37
60
80
-6
-40
-20
0
20
40
Temperature (°C)
TS616
Electrical characteristics
Figure 38. Differential Vio vs. temperature
Open loop, no load
Figure 39. Vio vs. temperature
Open loop, no load
2.0
450
Vcc=±6V
1.5
400
VIO (mV)
ΔVIO (μV)
Vcc=±2.5V
350
300
Vcc=±6V
1.0
0.5
0.0
250
Vcc=±2.5V
200
-40
-20
0
20
40
60
-0.5
-40
80
-20
0
Figure 40. Iout vs. temperature
300
250
250
200
200
150
60
80
60
80
100
50
0
0
Iout (mA)
Iout (mA)
80
150
Isource
50
-50
-100
-150
-200
Isource
-50
-100
-150
-200
-250
Isink
-300
-300
-350
-350
-400
-450
-40
60
Open loop, VCC = ±2.5 V, RL= 25 Ω
300
-250
40
Figure 41. Iout vs. temperature
Open loop, VCC = ±6 V, RL= 10 Ω
100
20
Temperature (°C)
Temperature (°C)
Isink
-400
-20
0
20
40
60
-450
-40
80
-20
0
Temperature (°C)
20
40
Temperature (°C)
Figure 42. CMR vs. temperature
Figure 43. SVR vs. temperature
Open loop, no load
Open loop, no load
70
84
68
66
Vcc=±6V
82
62
SVR (dB)
CMR (dB)
64
60
58
56
Vcc=±6V
80
78
Vcc=±2.5V
54
76
52
50
-40
-20
0
20
40
Temperature (°C)
60
80
-40
Vcc=±2.5V
-20
0
20
40
Temperature (°C)
15/37
Safe operating area
4
TS616
Safe operating area
Figure 44 shows the safe operating zone for the TS616. The curve shows the input level vs.
the input frequency—a characteristic curve which must be considered in order to ensure a
good application design. In the dash-lined zone, the consumption increases, and this
increased consumption could do damage to the chip if the temperature increases.
Figure 44. Safe operating area
700
VINPUT (mVRMS)
600
500
Vcc=+/-6V
Ta=25°C
G=12dB
RL=100Ω
400
300
SAFE
OPERATING
AREA
200
100
0
1M
10M
Frequency (Hz)
16/37
100M
TS616
5
Intermodulation distortion product
Intermodulation distortion product
The non-ideal output of the amplifier can be described by the following series, due to a nonlinearity in the input-output amplitude transfer:
2
n
V out = C 0 + C 1 V in + C 2 V in + C n V in
where the single-tone input is Vin=Asinωt, and C0 is the DC component, C1(Vin) is the
fundamental, Cn is the amplitude of the harmonics of the output signal Vout.
A one-frequency (one-tone) input signal contributes to a harmonic distortion. A two-tone
input signal contributes to a harmonic distortion and an intermodulation product.
This intermodulation product, or rather, the study of the intermodulation distortion of a twotone input signal is the first step in characterizing the amplifiers capability for driving multitone signals.
The two-tone input is equal to:
V in = A sin ω1 t + B sin ω2 t
giving:
2
t
= C 0 + C 1 ( A sin ω1 t + B sin ω2 t ) + C 2 ( A sin ω1 t + B sin ω2 t ) …+ C n ( A sin ω1 t + B sin ω2 t )
n
In this expression, we can extract distortion terms and intermodulation terms from a single
sine wave: second-order intermodulation terms IM2 by the frequencies (ω1 - ω2) and (ω1 +ω2)
with an amplitude of C2A2 and third-order intermodulation terms IM3 by the frequencies
(2ω1 - ω2), (2ω1 +ω2), (−ω1 + 2ω2) and (ω1 +2ω2) with an amplitude of (3/4)C3A3.
We can measure the intermodulation product of the driver by using the driver as a mixer via
a summing amplifier configuration. In doing this, the non-linearity problem of an external
mixing device is avoided.
Figure 45. Non-inverting summing amplifier for intermodulation measurements
1kΩ
1kΩ
49.9Ω
+
Vin1
1:√2
50Ω
+Vcc
49.9Ω
1/2TS616
49.9Ω
_
100Ω
910Ω
Rout1
300Ω
Vin1
Vout diff.
1:√2
100Ω
50Ω
300Ω
49.9Ω
1kΩ
√2:1
100Ω
50Ω
Rout2
910Ω
_
49.9Ω
1/2TS616
+
-Vcc
1kΩ
49.9Ω
17/37
Intermodulation distortion product
TS616
The following graphs show the IM2 and the IM3 of the amplifier in different configurations.
The two-tone input signal was generated by the multisource generator Marconi 2026. Each
tone has the same amplitude. The measurement was performed using a HP3585A
spectrum analyzer.
Figure 46. Intermodulation vs. output
amplitude
Figure 47. Intermodulation vs. output
amplitude
370 kHz & 400 kHz
AV = +1.5, Rfb = 1kΩ, VCC = ±2.5 V, RL= 28 Ω diff.
-30
-30
-40
-40
-50
IM2
30kHz
IM2
770kHz
-60
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
370 kHz & 400 kHz
AV = +1.5, Rfb = 1kΩ, VCC = ±2.5 V, RL= 14 Ω diff.
IM3
340kHz, 430kHz
-70
-80
-90
-50
-60
-70
-80
-90
IM3
1140kHz, 1170kHz
-100
IM3
1140kHz, 1170kHz
-100
0
1
2
3
4
5
6
7
8
0
1
Differential Output Voltage (Vp-p)
5
6
7
8
-30
-40
-40
IM3
340kHz, 430kHz, 1140kHz, 1170kHz
-60
IM2
30kHz
IM2
770kHz
-70
IM3
340kHz, 430kHz, 1140kHz, 1170kHz
-50
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
4
370 kHz & 400 kHz
AV = +1.5, Rfb = 1kΩ, Vout= .56 Vpp, VCC = ±2.5 V
-30
-80
-60
IM2
30kHz
IM2
770kHz
-70
-80
-90
-90
-100
-100
-110
1.0
3
Figure 49. Intermodulation vs. load
370 kHz & 400 kHz
Vout= 6 Vpp, VCC = ±2.5 V, RL= 20 Ω diff.
-50
2
Differential Output Voltage (Vp-p)
Figure 48. Intermodulation vs. gain
-110
1.5
2.0
2.5
3.0
Closed Loop Gain (Linear)
18/37
IM2
770kHz
IM2
30kHz
IM3
340kHz, 430kHz
3.5
4.0
0
20
40
60
80
100
120
140
Differential Load (Ω )
160
180
200
TS616
Intermodulation distortion product
Figure 50. Intermodulation vs. output
amplitude
Figure 51. Intermodulation vs. output
amplitude
370 kHz & 400 kHz
AV = +4, Rfb = 620 kΩ, RL= 200 Ω diff., VCC = ±6 V
-30
370 kHz & 400 kHz
AV = +4, Rfb = 620 kΩ, RL= 50 Ω diff., VCC = ±6 V
-30
-40
-50
IM2
770kHz
IM2
30kHz
-60
-50
IM2 and IM3 (dBc)
IM2 and IM3 (dBc)
IM2
30kHz
-40
IM3
1140kHz, 1170kHz
-70
IM3
340kHz, 430kHz
-80
-90
-100
IM3
1140kHz, 1170kHz
-60
IM3
340kHz, 430kHz
-70
-80
-90
-100
-110
0
2
4
6
8
10
12
14
16
18
20
-110
22
0
2
Differential Output Voltage (Vp-p)
8
10
12
14
16
18
20
22
100 kHz & 110 kHz
AV = +4, Rfb = 620 kΩ, RL= 50 Ω diff., VCC = ±6 V
-30
-30
-40
-40
IM3
90kHz, 120kHz, 310kHz, 320kHz
IM2
210kHz
IM3
310kHz
-70
IM2 and IM3 (dBc)
-50
IM3
90kHz, 120kHz
-60
6
Figure 53. Intermodulation vs. output
amplitude
100 kHz & 110 kHz
AV = +4, Rfb = 620 kΩ, RL= 200 Ω diff., VCC = ±6 V
-50
4
Differential Output Voltage (Vp-p)
Figure 52. Intermodulation vs. output
amplitude
IM2 and IM3 (dBc)
IM2
770kHz
IM3
320kHz
-80
-90
-100
IM2
210kHz
-60
-70
-80
-90
-100
-110
-110
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
2
4
6
8
10
12
14
16
18
20
22
Differential Output Voltage (Vp-p)
Figure 54. Intermodulation vs. frequency
range
AV = +4, Rfb = 620 kΩ, RL= 50 Ω diff.,
Vout= 16 Vpp, VCC = ±6 V,
-60
Quadratic Summation of all IM2 and IM3 components
generated by each two-tones signal
-65
-70
(dB)
-75
f1=100kHz
f2=110kHz
f1=200kHz
f2=230kHz
-80
f1=1MHz
f2=1.1MHz
f1=400kHz
f2=430kHz
-85
-90
-95
-100
100k
200k
300k
400k
500k
600k
700k
800k
900k
1M
1.1M
1M
Frequency (Hz)
19/37
Printed circuit board layout considerations
6
TS616
Printed circuit board layout considerations
In the ADSL frequency range, printed circuit board parasites can affect the closed-loop
performance.
The use of a proper ground plane on both sides of the PCB is necessary to provide low
inductance and a low resistance common return. The most important factors affecting gain
flatness and bandwidth are stray capacitance at the output and inverting input. To minimize
capacitance, the space between signal lines and ground plane should be maximized.
Feedback component connections must be as short as possible in order to decrease the
associated inductance which affects high-frequency gain errors. It is very important to
choose the smallest possible external components—for example, surface mounted devices
(SMD)—in order to minimize the size of all DC and AC connections.
6.1
Thermal information
The TS616 is housed in an exposed-pad plastic package. As described in Figure 55, this
package has a lead frame upon which the dice is mounted. This lead frame is exposed as a
thermal pad on the underside of the package. The thermal contact is direct with the dice.
This thermal path provides an excellent thermal performance.
The thermal pad is electrically isolated from all pins in the package. It must be soldered to a
copper area of the PCB underneath the package. Through these thermal paths within this
copper area, heat can be conducted away from the package. The copper area must be
connected to -VCC available on pin 4.
Figure 55. Exposed-pad package
Figure 56. Evaluation board
DICE
1
Side View
Bottom View
DICE
Cross Section View
20/37
R201
R210
R209
R208
J209
J206
R210
R207
Differential Amplifier
J209
J208
J207
R211
R212
R213
R202
R203
R204
R205
5
6
2
R215
R214
+
5
6
2
3
7
1
R215
R214
+
1/2TS616
_
_
1/2TS616
+
1/2TS616
_
_
1/2TS616
+
7
1
R216
R217
J206
R202
R205
R219
R218
R216
R217
R220
R219
R218
R221
3
J211
J210
J211
J210
J206
J205
Summing Amplifier
J208
Inverting
J206
Non-Inverting
J204
J303
-Vcc
J202
GND
J201
+Vcc
1
3
2
-Vcc
+Vcc
Power Supply
R207
R206
R209
R207
C202
R207
100nF
C203
R211
R212
R213
R220
R221
R202
R204
R201
R202
C201
C204
100nF
R211
R213
R206
100uF
100uF
-Vcc
+Vcc
R211
J205
2
3
5
R215
_
_
5
-Vcc
4
+
1/2TS616
_
100nF
6
8
+Vcc
1
7
1
1/2TS616
+
C206
2
3
100nF
C205
R214
1/2TS616
+
+
1/2TS616
_
6
R214
1/2TS616
+
_
3
2
7
1
R218
R219
R218
-Vcc
R220
R221
R220
R216
R217
R216
Exposed-Pad
J210
J211
J210
TS616
Printed circuit board layout considerations
Figure 57. Schematic diagram
21/37
Printed circuit board layout considerations
TS616
Figure 58. Component locations - top side
Figure 59. Component locations - bottom side
Figure 60. Top side board layout
Figure 61. Bottom side board layout
22/37
TS616
7
Noise measurements
Noise measurements
The noise model is shown in Figure 62, where:
●
eN: input voltage noise of the amplifier
●
iNn: negative input current noise of the amplifier
●
iNp: positive input current noise of the amplifier
Figure 62. Noise model
+
iN+
R3
TS616
HP3577
Input noise:
8nV/√Hz
_
N3
iN-
output
eN
R2
N2
R1
N1
The closed loop gain is:
R fb
A V = g = 1 + -------Rg
The six noise sources are:
V1 = eN × ⎛⎝ 1 + R2
--------⎞⎠
R1
V2 = iNn × R2
V3 = iNp × R3 × ⎛⎝ 1 + R2
--------⎞⎠
R1
R2
V4 = – -------- ×
R1
V5 =
4kTR1
4kTR2
V6 = ⎛⎝ 1 + R2
--------⎞⎠ 4kTR3
R1
We assume that the thermal noise of a resistance R is:
4kTR ΔF
where ΔF is the specified bandwidth.
On a 1 Hz bandwidth the thermal noise is reduced to:
4kTR
where k is Boltzmann's constant, equal to 1374.10-23J/°K. T is the temperature (°K).
23/37
Noise measurements
TS616
The output noise eNo is calculated using the Superposition Theorem. However eNo is not
the sum of all noise sources, but rather the square root of the sum of the square of each
noise source, as shown in Equation 1.
Equation 1
2
No =
2
2
2
2
V1 + V2 + V3 + V4 + V5 + V6
2
Equation 2
2
2
2
2
2
2
2
No = eN × g + iNn × R2 + iNp × R3 × g
2
2
R2 2
…+ ⎛ --------⎞ × 4kTR1 + 4kTR2 + ⎛ 1 + R2
--------⎞ × 4kTR3
⎝ R1⎠
⎝
⎠
R1
The input noise of the instrumentation must be extracted from the measured noise value.
The real output noise value of the driver is:
Equation 3
eNo =
2
( Measured ) – ( instrumentation )
2
The input noise is called the Equivalent Input Noise as it is not directly measured but is
evaluated from the measurement of the output divided by the closed loop gain (eNo/g).
After simplification of the fourth and the fifth term of Equation 2 we obtain:
Equation 4
2
2
2
2
2
2
2
2
= eN × g + iNn × R2 + iNp × R3 × g …+ g × 4kTR2 + ⎛ 1 + R2
--------⎞ × 4kT
⎝
R1⎠
7.1
Measurement of eN
If we assume a short-circuit on the non-inverting input (R3=0), Equation 4 becomes:
Equation 5
No =
2
2
2
2
eN × g + iNn × R2 + g × 4kTR2
In order to easily extract the value of eN, the resistance R2 will be chosen as low as
possible. On the other hand, the gain must be large enough:
24/37
●
R1=10 Ω, R2=910 Ω, R3=0, Gain=92
●
Equivalent input noise: 2.57 nV/√Hz
●
Input voltage noise: eN=2.5 nV/√Hz
TS616
7.2
Noise measurements
Measurement of iNn
To measure the negative input current noise iNn, we set R3=0 and use Equation 5. This time
the gain must be lower in order to decrease the thermal noise contribution:
7.3
●
R1=100 Ω, R2=910 Ω, R3=0, gain= 10.1
●
Equivalent input noise: 3.40 nV/√Hz
●
Negative input current noise: iNn =21 pA/√Hz
Measurement of iNp
To extract iNp from Equation 3, a resistance R3 is connected to the non-inverting input. The
value of R3 must be chosen in order to keep its thermal noise contribution as low as
possible against the iNp contribution.
●
R1=100 Ω, R2=910 Ω, R3=100 Ω, Gain=10.1
●
Equivalent input noise: 3.93 nV/√Hz
●
Positive input current noise: iNp=15 pA/√Hz
●
Conditions: Frequency=100 kHz, VCC = ±2.5 V
●
Instrumentation: HP3585A Spectrum Analyzer (the input noise of the HP3585A is
8 nV/√Hz)
25/37
Power supply bypassing
8
TS616
Power supply bypassing
Correct power supply bypassing is very important for optimizing performance in highfrequency ranges. Bypass capacitors should be placed as close as possible to the IC pins to
improve high-frequency bypassing. A capacitor greater than 1 µF is necessary to minimize
the distortion. For better quality bypassing, a capacitor of 10 nF is added using the same
implementation conditions. Bypass capacitors must be incorporated for both the negative
and the positive supply.
Figure 63. Circuit for power supply bypassing
+VCC
10μF
+
10nF
+
TS616
-
10nF
10μF
+
-VCC
8.1
Single power supply
The TS616 can operate with power supplies ranging from 12 V to 5 V. The power supply can
either be single (12 V or 5 V referenced to ground), or dual (such as ±6 V and ±2.5 V).
In the event that a single supply system is used, new biasing is necessary to assume a
positive output dynamic range between 0 V and +VCC supply rails. Considering the values
of VOH and VOL, the amplifier will provide an output dynamic from +0.5 V to 10.6 V on 25 Ω
load for a 12 V supply and from 0.45 V to 3.8 V on 10 Ω load for a 5 V supply.
The amplifier must be biased with a mid-supply (nominally +VCC/2), in order to maintain the
DC component of the signal at this value. Several options are possible to provide this bias
supply, such as a virtual ground using an operational amplifier or a two-resistance divider
(which is the cheapest solution). A high resistance value is required to limit the current
consumption. On the other hand, the current must be high enough to bias the non-inverting
input of the amplifier. If we consider this bias current (30 µA max.) as the 1% of the current
through the resistance divider to keep a stable mid-supply, two resistances of 2.2 kΩ can be
used in the case of a 12 V power supply and two resistances of 820 Ω can be used in the
case of a 5 V power supply.
The input provides a high-pass filter with a break frequency below 10 Hz which is necessary
to remove the original 0 volt DC component of the input signal, and to fix it at +VCC/2.
Figure 64 shows a schematic of a 5 V single power supply configuration.
26/37
TS616
Power supply bypassing
Figure 64. Circuit for +5 V single supply
+5V
10µF
+
IN
Rin
1kΩ
+5V
100µF
½ TS616
OUT
_
10Ω
R1
820Ω
Rfb
R2
820Ω
10nF
+
CG
Channel separation and crosstalk
Figure 65 shows an example of crosstalk from one amplifier to a second amplifier. This
phenomenon, accentuated at high frequencies, is unavoidable and intrinsic to the circuit
itself.
Nevertheless, the PCB layout also has an effect on the crosstalk level. Capacitive coupling
between signal wires, distance between critical signal nodes and power supply bypassing
are the most significant factors.
Figure 65. Crosstalk vs. frequency: AV=+4, Rfb=620 Ω, VCC= ±6 V, Vout= 2 Vp
-50
-60
CrossTalk (dB)
8.2
+ 1µF
RG
-70
-80
-90
-100
-110
-120
-130
10k
100k
1M
10M
Frequency (Hz)
27/37
Choosing the feedback circuit
9
TS616
Choosing the feedback circuit
As described in Figure 67 on page 29, the TS616 requires a 620Ω feedback resistor to
optimize the bandwidth with a gain of 12 dB for a 12 V power supply. Nevertheless, due to
production test constraints, the TS616 is tested with the same feedback resistor for 12 V and
5 V power supplies (910 Ω).
Table 5.
VCC (V)
Closed-loop gain - feedback components
Gain
Rfb (Ω)
+1
750
+2
680
+4
620
+8
510
-1
680
-2
680
-4
620
-8
510
+1
1.1k
+2
1k
+4
910
+8
680
-1
1k
-2
1k
-4
910
-8
680
±6
±2.5
28/37
TS616
9.1
Choosing the feedback circuit
The bias of an inverting amplifier
A resistance is necessary to achieve good input biasing, such as resistance R, shown in
Figure 66.
The magnitude of this resistance is calculated by assuming the negative and positive input
bias current. The aim is to compensate for the offset bias current, which could affect the
input offset voltage and the output DC component. Assuming Ib-, Ib+, Rin, Rfb and a zero
volt output, the resistance R is:
R = Rin // Rfb
Figure 66. Compensation of the input bias current
Rfb
Ib-
Rin
Vcc+
_
Output
TS616
+
Load
Vcc-
Ib+
R
9.2
Active filtering
Figure 67. Low-pass active filtering - Sallen-Key
C1
R1
R2
+
IN
OUT
C2
TS616
_
25Ω
RG
Rfb
910Ω
From the resistors Rfb and RG, we can directly calculate the gain of the filter in a classic noninverting amplification configuration:
R fb
A V = g = 1 + -------Rg
We assume the following expression as the response of the system:
Vout j ω
g
T j ω = ---------------- = ---------------------------------------Vin j ω
jω ( jω) 2
1 + 2ζ ----- + -----------ωc ω 2
c
29/37
Choosing the feedback circuit
TS616
The cutoff frequency is not gain-dependent and so becomes:
1
ωc = -----------------------------------R1R2C1C2
The damping factor is calculated by the following expression:
1
ζ = --- ωc ( C 1 R 1 + C 1 R 2 + C 2 R 1 – C 1 R 1 g )
2
The higher the gain the more sensitive the damping factor is. When the gain is higher than
1, it is preferable to use some very stable resistor and capacitor values. In the case of
R1 = R2:
R fb
2C 2 – C 1 -------Rg
ζ = -------------------------------2 C1 C2
30/37
TS616
10
Increasing the line level using active impedance matching
Increasing the line level using active impedance
matching
With passive matching, the output signal amplitude of the driver must be twice the amplitude
on the load. To go beyond this limitation an active matching impedance can be used. With
this technique, it is possible to maintain good impedance matching with an amplitude on the
load higher than half of the output driver amplitude. This concept is shown in Figure 68 for a
differential line.
Figure 68. TS616 as a differential line driver with active impedance matching
1μ
100n
Vcc+
+
_
Vcc+
GND
R2
1k
10n
Rs1
Vo°
Vi
1:n
Vo
1/2 R1
R3
RL
Vcc/2
1/2 R1
10μ
Vi
1k
+
_
100Ω
R5
100n
GND
Hybrid
&
Transformer
Vo
Vo°
R4
Vcc+
Rs2
GND
100n
Component calculation
Let us consider the equivalent circuit for a single-ended configuration, as shown in
Figure 69.
Figure 69. Single-ended equivalent circuit
+
Vi
Rs1
_
Vo°
Vo
R2
-1
R3
½ R1
½ RL
31/37
Increasing the line level using active impedance matching
TS616
First let’s consider the unloaded system. We can assume that the currents through R1, R2
and R3 are respectively:
2Vi
Vi – Vo° )
( Vi + Vo )
---------, (--------------------------and -----------------------R1
R2
R3
As Vo° equals Vo without load, the gain in this case becomes:
1 + 2R2
----------- + R2
-------Vo
(
noload
)
R1 R3G = -------------------------------- = ----------------------------------Vi
1 – R2
-------R3
The gain, for the loaded system is given by Equation 6:
Equation 6
1 + 2R2
----------- + R2
-------1
R1 R3
Vo
(
withload
)
GL = ------------------------------------- = --- -----------------------------------2
Vi
1 – R2
-------R3
The system shown in Figure 70 is an ideal generator with a synthesized impedance acting
as the internal impedance of the system. From this, the output voltage becomes:
Equation 7
Vo = ( ViG ) – ( Ro ⋅ Iout )
where Ro is the synthesized impedance and Iout the output current.
On the other hand Vo can be expressed as:
Equation 8
Vi ⎛ 1 + 2R2
----------- + R2
--------⎞
⎝
R1 R3⎠ Rs1Iout
Vo = ----------------------------------------------- – ---------------------1 – R2
-------1 – R2
-------R3
R3
By identification of both Equation 7 and Equation 8, the synthesized impedance is, with
Rs1 = Rs2 = Rs:
Equation 9
Rs
Ro = ----------------1 – R2
-------R3
32/37
TS616
Increasing the line level using active impedance matching
Figure 70. Equivalent schematic - Ro is the synthesized impedance
Ro
Iout
Vi.Gi
1/2RL
Let us write Vo°=kVo, where k is the matching factor varying between 1 and 2. If we assume
that the current through R3 is negligible, we can calculate the output resistance, Ro:
kVoRL Ro = ---------------------------RL + 2Rs1
After choosing the k factor, Rs will be equal to 1/2RL(k-1).
For a good impedance matching we assume that:
Equation 10
1
Ro = --- RL
2
From Equation 9 and Equation 10, we derive:
Equation 11
R2
-------- = 1 – 2Rs
----------R3
RL
By fixing an arbitrary value of R2, Equation 11 becomes:
R2
R3 = -------------------1 – 2Rs
----------RL
Finally, the values of R2 and R3 allow us to extract R1 from Equation 6, so that:
Equation 12
2R2
R1 = ---------------------------------------------------------R2
⎛
2 1 – --------⎞ GL – 1 – R2
-------⎝
R3⎠
R3
with GL the required gain.
Table 6.
Components calculation for impedance matching implementation
GL (gain for the loaded system)
R1
GL is fixed for the application requirements
GL= Vo/Vi= 0.5(1+2R2/R1+R2/R3)/(1-R2/R3)
2R2/[2(1-R2/R3)GL-1-R2/R3]
R2 (= R4)
Arbitrarily fixed
R3 (= R5)
R2/(1-Rs/0.5RL)
Rs
Load viewed by each driver
0.5RL(k-1)
kRL/2
33/37
Package information
11
TS616
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
34/37
TS616
Package information
Figure 71. SO-8 exposed pad package mechanical drawing
Table 7.
SO-8 exposed pad package mechanical data
Dimensions
Millimeters
Inches
Ref.
Min.
Typ.
Max.
Min.
Typ.
Max.
A
1.350
1.750
0.053
0.069
A1
0.000
0.150
0.001
0.0059
A2
1.100
1.650
0.043
0.065
B
0.330
0.510
0.013
0.020
C
0.190
0.250
0.007
0.010
D
4.800
5.000
0.189
0.197
D1
E
3.10
3.800
0.122
4.000
0.150
0.157
E1
2.41
0.095
e
1.270
0.050
H
5.800
6.200
0.228
0.244
h
0.250
0.500
0.010
0.020
L
0.400
1.270
0.016
0.050
k
0d
8d
0d
8d
ddd
0.100
0.004
35/37
Ordering information
12
TS616
Ordering information
Table 8.
Order codes
Part number
Temperature range
Package
-40°C to +85°C
SO-8
TS616IDW
TS616IDWT
13
36/37
Packaging
Marking
Tube
TS616
Tape & reel
TS616
Revision history
Date
Revision
Changes
1-Nov-2002
1
First release.
03-Dec-2004
2
Moved note in Table 3 to Section 9: Choosing the feedback circuit on
page 28.
Figure 43 in Revision 1, entitled Group Delay, has been removed
because the results presented were not technically meaningful.
Simplified mathematical representations of the intermodulation
product in Section 5: Intermodulation distortion product on page 17.
In Section 6: Printed circuit board layout considerations on page 20,
change from “The copper area can be connected to (-Vcc) available
on pin 4.” to “The copper area must be connected to -Vcc available
on pin 4.”.
In Section 9.1: The bias of an inverting amplifier on page 29, change
of section title, and correction of referred figure to Figure 66.
24-Oct-2006
3
Format update.
Corrected package mechanical data for SO-8 exposed pad.
16-Apr-2007
4
Corrected package error in Table 8: Order codes.
26-Sep-2008
5
Corrected package error in Table 8: Order codes.
TS616
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