WIRELESS COMMUNICATIONS DIVISION TQ9147B RFOUT 1 16 RFOUT GND 2 15 GND GND 3 14 GND GND 4 13 GND GND 5 12 GND RFIN 6 11 VG2 GND 7 10 GND §High Efficiency VG1 8 9 VD1 §+32 dBm Output Power DATA SHEET 2-Stage AMPS Power Amplifier IC Features §50Ω Matched Input §SO-16 Plastic Package §Monolithic Power Amp Product Description The TQ9147 is a high efficiency two stage GaAs MESFET power amplifier IC intended for use in AMPS (IS-19) applications that operate in the US Cellular (824 849 MHz) band. The TQ9147 requires minimal external RF circuitry and operates from a 4.8-Volt supply. With its flexible, off-chip, single component output matching circuit, the TQ9147 is suitable for use in other applications near the cellular band, such as 900 MHz ISM applications. The TQ9147 utilizes a space saving SO-16 plastic package that minimizes board area and cost. Applications §AMPS Mobile Phones §CDPD Modems §General ISM Band Applications Electrical Specifications1 Parameter Output Power Efficiency Min Typ Max Units +31.5 +32 dBm 55 60 % Note 1: Test Conditions: VDD = 4.8 V, PIN = +7 dBm, Freq. = 824 & 849 MHz, TC = 25°C, Min/max values 100% production tested. Electrical Characteristics For additional information and latest specifications, see our website: www.triquint.com 1 TQ9147B Data Sheet Electrical Characteristics Parameter 1 Conditions Min Frequency tuned for cellular band Typ/Nom 824 Supply Voltage (VDD) Max Units 849 MHz 2.7 4.8 6.0 V +110 oC Temperature measured at case -40 25 POUT VDD = 4.8 V 31.5 32 dBm 30 dBm 60 % PIN = -30 to +7 dBm -90 dBm Small Signal Gain PIN = -10 dBm 32 dB Power Gain POUT = 32 dBm (typ) 25 dB Input Return Loss PIN = -30 to +7 dBm 10 dB VDD = 4.3 V Efficiency 55 Rx band Noise 2 Harmonics 2nd Harmonic 3rd Harmonic 4th Harmonic Spurious (Stability) -30 -35 -35 PIN = -30 to +7 dBm RF Off Isolation Ruggedness VDD at burnout dBc dBc dBc -70 dBc/30 kHz 20 dBc 6.5 V Note 1: Test Conditions: VDD = 4.8 V, PIN = +7 dBm, Freq. = 824 & 849 MHz, VGG = 3.5 V, TC = 25°C. Note 2: Noise power is measured in 30 kHz band width at the transmit frequency plus 45 MHz Note 3: Load is set to 50 ohms, output power measured at nominal test conditions. Load VSWR is set to 10:1 and the angle is varied 360 degrees over 5 seconds. Load set to 50 ohms, output power remeasured and compared with the first measurement to check for no degradation from the first measurement. Absolute Maximum Ratings Parameter Value DC Power Supply Units 8.0 V DC Gate Voltage -5.0 V RF Input Power 20 dBm Storage Temperature -55 to 150 °C Operating Temperature (case) -40 to 110 °C 1 Note 1: Into a 10:1 mismatch. 2 For additional information and latest specifications, see our website: www.triquint.com TQ9147B Data Sheet Typical Performance Test Conditions (Unless Otherwise Specified): VDD = 4.8 V, PIN = +7 dBm, Freq. = 824 & 849 MHz, TC = 25°C, constant gate voltages: VG1 = -1.5 V, VG2 = -2.2 V. Output Power vs. Frequency vs. Temp. Output Power vs. Frequency and VDD 33.0 40 32.5 32.0 30 25 Pout (dBm) POUT (dBm) 35 VDD=3.0 V VDD=3.6 V 20 VDD=4.6 V VDD=5.8 V 15 VDD=7.0 V 31.5 31.0 -30 C 30.5 25 C 30.0 85 C 29.5 110 C 29.0 10 750 800 850 900 750 950 800 Efficiency vs. Frequency and VDD 950 Efficiency vs. Frequency vs. Temp 70 70 68 65 66 60 55 Efficiency ( % ) Efficiency (%) 900 Frequency (MHz) Frequency (MHz) VDD=3.0 V VDD=3.6 V 50 VDD=4.6 V 750 800 850 62 -30 C 60 25 C 85 C 56 VDD=7.0 V 40 64 58 VDD=5.8 V 45 900 110 C 54 950 750 800 Frequency (MHz) 40 30 80 20 Efficiency (%) -10 -20 950 Vd1=0V Vd1=1V Vd1=2V Vd1=3V Vd1=4V Vd1=5V 60 Vd1=0V Vd1=1V Vd1=2V Vd1=3V Vd1=4V Vd1=5V 0 900 Efficiency vs. Input Power vs. Vd1 100 10 850 Freq ( MHz ) Output Power vs. Input Power vs. VD1 POUT (dBm) 850 -30 40 20 0 -20 -40 -10 -5 0 PIN (dBm) 5 10 -40 -10 -5 0 PIN (dBm) For additional information and latest specifications, see our website: www.triquint.com 5 3 TQ9147B Data Sheet S11 vs. Frequency Harmonics vs. Frequency @ T = 25 C -20 -40 S11 (dB) Level (dBc) -30 -50 -60 2nd Harm. 3rd Harm. -70 4th Harm. -80 750 800 850 900 950 -5 -7 -9 -11 -13 -15 -17 -19 -21 -23 -25 750 800 850 Frequency (MHz) Frequency (MHz) 900 950 Test Conditions (Unless Otherwise Specified): VDD = 5 V, PIN = +7 dBm, VGG = -3.5 V, Freq. = 824 & 849 MHz, TC = 25°C, Gate voltage determined by the recommended bias circuit Efficiency vs. Frequency vs. VDD 60.0 33.0 59.5 32.8 59.0 Efficiency (%) POUT (dBm) Output Power vs. Frequency vs. VDD 33.2 32.6 VDD=4.75V 32.4 VDD=5V 32.2 VDD=5.25V 58.5 58.0 Eff, 4.75V 57.5 Eff, 5V 57.0 32.0 Eff, 5.25V 56.5 56.0 31.8 820 825 830 835 840 845 850 820 855 825 830 Frequency (MHz) 845 850 855 Efficiency vs. Frequency vs. Temperature 60 33.0 32.9 32.8 32.7 32.6 32.5 32.4 32.3 32.2 32.1 32.0 59 58 Efficiency (%) Pout (dBm) 840 Frequency (MHz) Output Power vs. Frequency vs. Temperature -30 C 25 C -30 C 57 25 C 56 110 C 55 54 110 C 53 52 820 825 830 835 840 845 850 820 855 825 830 835 840 Frequency (MHz) Frequency (MHz) . 4 835 For additional information and latest specifications, see our website: www.triquint.com 845 850 855 TQ9147B Data Sheet Test Conditions (Unless Otherwise Specified): VDD = 5 V, PIN = +7 dBm, VGG = -3.5 V, Freq. = 824 & 849 MHz, TC = 25°C, Gate voltage determined by the recommended bias circuit Efficiency vs. Frequency vs. Input Power 65 32.5 60 32.0 55 31.5 Efficiency (%) POUT (dBm) Output Power vs. Frequency vs. Input Power 33.0 P in=7dBm P in=3dBm 31.0 P in=-2dBm 30.5 50 45 40 Pin=7 dBm Pin=3 dBm 35 30.0 820 825 830 835 840 Frequency (MHz) 845 850 855 Pin=-2 dBm 30 820 825 830 835 840 845 850 855 Frequency (MHz) For additional information and latest specifications, see our website: www.triquint.com 5 TQ9147B Data Sheet Application/Test Circuit 50 Ω Transmission Line C3 C2 L1 1 RFOUT RFOUT 16 2 GND GND 15 3 GND GND 14 4 13 GND 5 50 Ω Transmission Line VD2 = 4.8 V C1 TQ9147B GND 12 VD1 = 4.8 V R1 6 RFIN VG2 11 7 GND GND 10 8 VG1 VD1 9 C4 R2 R3 Q1 R4 Q2 R5 C5 VGG = -3.5 V Bill of Material for TQ9147B Power Amplifier Application/Test Circuit Component Power Amplifier IC Reference Designator Part Number U1 TQ9147B Q1, Q2 2N3906 Capacitor C1, C4, C5 MCH182F104ZK Capacitor C2, Capacitor Value Size Manufacturer TSSOP-20 TriQuint Semiconductor 0.1 µF 0603 Rohm MCH155A8R2CK 8.2 pF 0402 Rohm C3 MCH155A680JK 68 pF 0402 Rohm Resistor R1 MCR01JW510 51 Ω 0402 Rohm Resistor R2 MCR01JW100 10 Ω 0402 Rohm Resistor R3 MCR01JW621 620 Ω 0402 Rohm Resistor R4 MCR01JW202 2 kΩ 0402 Rohm Resistor R5 MCR01JW391 390 Ω 0402 Rohm Inductor L1 0805CS470 47 nH PNP Transistor 6 For additional information and latest specifications, see our website: www.triquint.com Coilcraft TQ9147B Data Sheet Product Description Gate Bias Voltages and Drain Quiescent Current The TQ9147 is a high efficiency two stage GaAs MESFET power amplifier IC intended for use in AMPS (IS-19) applications that operate in the US Cellular (824 - 849 MHz) band. The TQ9147 requires minimal external RF circuitry and operates from a 4.8-Volt supply. With its flexible, off-chip, single component output matching circuit, the TQ9147 is suitable for use in other applications near the cellular band, such as 900 MHz ISM applications. Parameter The TQ9147 utilizes a space saving SO-16 plastic package that minimizes board area and cost. Value Units VDD 4.8 V VG1 -1.5 V VG2 -2.2 V IDQ1 50 MA IDQ2 0-100 mA The gate of each FET in the IC is RF bypassed on chip. However, additional low frequency filtering and noise suppression must be done externally. This is accomplished with Please refer to the application circuit above. a 51 Ohm resistor (R1) and 0.1 µF cap (C4) from pin 11 (Vg2). This capacitor and resistor combination also ensures device stability under all conditions. Gate Biasing and Bypassing Drain Bypassing The TQ9147 is a dual-supply power amplifier (PA). Because it utilizes depletion-mode MESFETs, a negative bias voltage must be supplied to the gate of each FET. There are several excellent choices of negative voltage bias supplies (charge pumps) on the market, such as the Maxim MAX881R, or the Harris ILC7660S. A simple resistor divider circuit is the most inexpensive way to bias the gates of each stage from the charge pump. However, due to fabrication tolerances and the large window of main supply voltages under which the device can function, the active bias method shown in the application circuit is recommended. C1 (0.1 µF) provides RF bypassing for the high impedance side of the RF choke (L1). Operation This bias technique accurately sets the bias point for each stage and optimizes the quiescent current and efficiency over a wide range of supply voltages and output power levels. The following table lists the nominal values of gate voltage and quiescent current when this bias method is used. It is important to remember that the negative gate voltage must be supplied first in order to protect the device from inadvertent high drain currents. If the drains are turned on before the gate bias is set, the IC can be damaged or destroyed. Input Match The device input is internally matched to 50 Ohms. A 50-Ohm transmission line is all that is required between the PA and the driver amp. Output Match and High Power Bias Injection Pins 1 and 16 are dual-purpose pins, providing for both the RF output and the high power DC input for the drain of the second stage FET. As such, these pins are connected to a 50-Ohm transmission line. Locating C2 (8.2 pF) approximately 200 mils from the device along this transmission line acts as a shorted stub tuner that transforms the low output impedance (~ 7.5 Ohms) of the power stage to 50 Ohms. Varying the position of C2 along the line can alter the output match in order to optimize either power output or efficiency. In general, the farther away C2 is from the pins the higher the efficiency at the expense of power output. The closer the cap is, the higher the output power at the expense of efficiency. By varying the value and position of C2, the device can be easily tuned for a different frequency range such as the 902 – 928 MHz ISM band. C3 (68 pF) is a DC blocking cap. For additional information and latest specifications, see our website: www.triquint.com 7 TQ9147B Data Sheet Drain current for the second stage is injected through L1 (47 nH), which acts as an RF choke on the high power DC feed line. As stated above, C1 is the bypass cap for the high impedance side of L1. Power down Function To fully turn off the PA when not transmitting, a PMOS FET (PFET) switch can be used to control the drain bias to the PA. There are several acceptable models available on the market, such as the IRF7604 from International Rectifier, or any device with low RDSon. An added benefit of incorporating a switch of this type is that it protects the PA from inadvertently powering up the device incorrectly. Since depletion-mode FETs are used in the PA, care must be taken to insure that the gate bias is fully stabilized before drain bias is applied. If not, the full value of IDss will flow, which could damage or destroy the IC. A feature included in the Maxim charge pump allows for a separate control output to run the PFET. This control line holds the PFET off until the gate bias voltage has stabilized. RF Power Control There are three methods of controlling the output power from the TQ9147. All three methods can provide a minimum 25 dB of control range for the device, which exceeds the requirements of IS-19. The first method is to vary the gate bias voltages. Though this approach has the advantage of increased efficiency at lower output power levels, it is hampered by two problems. First, both gate voltages must be varied. Since each stage typically requires a different bias point, the control circuit must monitor both bias points, thereby complicating the design. 8 The second drawback is that most charge pumps, including those recommended above, require large capacitors on the output for filtering and stability. Such large cap values may not allow full compliance with the required 20 mS transition spec between any two power levels. The second method is to vary the input power level. Though this can be done with a simple attenuator between the driver amp and the PA, the response is very non-linear, as the PA must first come out of saturation before the output power can change. Once out of saturation, the first stage is class A biased, which means that the drain current is constant regardless of power settings. The addition of an attenuator also adds to the expense of the parts list and to the board size equation, and increases the insertion loss the driver amp must overcome. The third, and preferred, method is to vary the drain supply voltage to the first stage. By forcing the first stage bias lower, the first stage is always heavily saturated, thus saving battery power. Since the second stage is biased class AB, drain current to that stage lowers as the drive level decreases. This method optimizes battery savings over the other approaches. The simplest implementation of this technique would be to incorporate a second PFET to control the first stage drain. This circuit can be realized buy utilizing a dual PFET such as the International Rectifier IRF7314, which has two low RDSon FETs in a single SO-8 package. By cascoding the two FETs, one implements a master on/off function while the second controls only the first stage drain bias. This technique also fits very well with the active gate biasing circuit that was recommended previously. For additional information and latest specifications, see our website: www.triquint.com TQ9147B Data Sheet Package Pinout RFOUT 1 16 RFOUT GND 2 15 GND VG3 3 14 VD2 GND 4 5 13 TQ9147B GND 12 RFIN 6 11 VG2 GND 7 10 GND VG1 8 9 VD1 Pin Descriptions Pin Name Pin # Description and Usage RFOUT 1,16 Power Amplifier output and second-stage supply voltage. Critical, but simple, matching circuit required. Bias choke for VD2 required, local bypass cap recommend, and DC blocking capacitor required. RFIN 6 RF input to power amplifier. Matched to 50 Ω. Internal DC block. VG1 8 First stage gate voltage. Local bypass cap needed. Set VG1 = -1.5 V or use bias stabilization circuit. VD1 9 First stage supply voltage. Local bypass cap recommended. Use same voltage as VD2 or use bias stabilization circuit. VG2 11 Second stage gate voltage. Local bypass cap needed. Required 50 Ω series resistor near device for stability. Set VG2 = -2.2 V or use bias stabilization circuit. GND 2, 3, 4, 5, 7, 10, 12, 13, 14, 15 Ground connections. Provide thermal path for heat dissipation and RF grounding. Very important to place multiple via holes immediately adjacent to the pins. Revision AA TQS Wireless Communications 8900 • 2300 NE Brookwood Parkway • Hillsboro, OR 97124 • (503) 615-9000 • June 30November, 1998 FAX:(503) 615- TQ9147B Data Sheet Package Type: SOIC-16 Plastic Package with Thermal Tabs Additional Information For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: [email protected] Tel: (503) 615-9000 Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: [email protected] The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright © 1998 TriQuint Semiconductor, Inc. All rights reserved. Revision B, March 18, 1999 10 For additional information and latest specifications, see our website: www.triquint.com