NTR4101P Trench Power MOSFET −20 V, Single P−Channel, SOT−23 Features • • • • Leading −20 V Trench for Low RDS(on) −1.8 V Rated for Low Voltage Gate Drive SOT−23 Surface Mount for Small Footprint Pb−Free Package is Available http://onsemi.com Applications V(BR)DSS • Load/Power Management for Portables • Load/Power Management for Computing • Charging Circuits and Battery Protection RDS(ON) TYP ID MAX 70 m @ −4.5 V −20 V −3.2 A 90 m @ −2.5 V 112 m @ −1.8 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Power Dissipation (Note 1) Symbol Value Unit VDSS −20 V VGS ±8.0 V ID −2.4 A Steady State TA = 25°C TA = 85°C −1.7 t ≤ 10 s TA = 25°C −3.2 Steady State TA = 25°C PD Steady State Power Dissipation (Note 2) ESD Capability (Note 3) W 1.25 TA = 25°C ID TA = 85°C TA = 25°C Pulsed Drain Current G D t ≤ 10 s Continuous Drain Current (Note 2) 0.73 P−Channel MOSFET S −1.8 −1.3 PD 0.42 W tp = 10 s IDM −7.5 A C = 100 pF, RS = 1500 ESD 225 V Operating Junction and Storage Temperature MARKING DIAGRAM & PIN ASSIGNMENT A 3 Drain 3 TR4 W 1 2 °C TJ, TSTG −55 to 150 Source Current (Body Diode) IS −2.4 A Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TL 260 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. SOT−23 CASE 318 STYLE 21 2 Source 1 Gate TR4 W = Device Code = Work Week ORDERING INFORMATION Package Shipping† NTR4101PT1 SOT−23 3000/Tape & Reel NTR4101PT1G SOT−23 Pb−Free 3000/Tape & Reel Device THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit Junction−to−Ambient − Steady State (Note 1) RJA 170 °C/W Junction−to−Ambient − t < 10 s (Note 1) RJA 100 Junction−to−Ambient − Steady State (Note 2) RJA 300 1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) 2. Surface−mounted on FR4 board using the minimum recommended pad size. 3. ESD Rating Information: HBM Class 0 Semiconductor Components Industries, LLC, 2004 October, 2004 − Rev. 3 1 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NTR4101P/D NTR4101P ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min V(BR)DSS −20 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 4) (VGS = 0 V, ID = −250 A) V Zero Gate Voltage Drain Current (Note 4) (VGS = 0 V, VDS = −16 V) IDSS −1.0 A Gate−to−Source Leakage Current (VGS = ±8.0 V, VDS = 0 V) IGSS ±100 nA −0.720 −1.5 V 70 90 112 85 120 210 ON CHARACTERISTICS Gate Threshold Voltage (Note 4) (VGS = VDS, ID = −250 A) VGS(th) Drain−to−Source On−Resistance (VGS = −4.5 V, ID = −1.6 A) (VGS = −2.5 V, ID = −1.3 A) (VGS = −1.8 V, ID = −0.9 A) RDS(on) Forward Transconductance (VDS = −5.0 V, ID = −2.3 A) −0.40 m gFS 75 S Ciss 675 pF Coss 100 Crss 75 CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance ((VGS = 0 V,, f = 1 MHz,, VDS = −10 V)) Reverse Transfer Capacitance Total Gate Charge (VGS = −4.5 V, VDS = −10 V, ID = −1.6 A) QG(tot) 7.5 Gate−to−Source Gate Charge (VDS = −10 V, ID = −1.6 A) QGS 1.2 nC Gate−to−Drain “Miller” Charge (VDS = −10 V, ID = −1.6 A) QGD 2.2 nC RG 6.5 td(on) 7.5 ns tr 12.6 td(off) 30.2 tf 21.0 VSD −0.82 −1.2 V trr 12.8 15 ns ta 9.9 ns Discharge Time tb 3.0 ns Reverse Recovery Charge Qrr 1008 nC Gate Resistance 8.5 nC SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time (VGS = −4.5 4.5 V, VDS = −10 10 V, ID = −1.6 A, RG = 6.0 ) Fall Time DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage (VGS = 0 V, IS = −2.4 A) Reverse Recovery Time Charge Time (VGS = 0 V, V dISD/dt = 100 A/s, IS = −1.6 A) 4. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 NTR4101P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 10 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) 10 TJ = 25°C VGS = −10 V − −2.4 V −2.2 V 8 6 −2.0 V 4 −1.8 V . −1.6 V 2 0 25°C 8 125°C 7 6 5 4 3 2 1 VDS ≥ 20 V 0 0 2 1 3 5 4 6 7 8 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 3 1 2 4 5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE () RDS(on), DRAIN−TO−SOURCE RESISTANCE () TJ = −55°C 9 0.1 VGS = −5.0 V 0.09 T = 125°C 0.08 T = 25°C 0.07 0.06 T = −55°C 0.05 0.04 0.03 0.02 0.01 0 7 3 5 −ID, DRAIN CURRENT (AMPS) 1 9 0.15 0.14 0.13 0.12 0.11 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 6 TJ = 25°C VGS = −2.5 V VGS = −4.5 V 1 3 5 4 6 8 7 −ID, DRAIN CURRENT (AMPS) 2 9 10 Figure 4. On−Resistance vs. Drain Current and Temperature Figure 3. On−Resistance vs. Drain Current and Temperature 100000 VGS = 0 V ID = −1.6 A 10000 −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.4 1.2 1.0 0.8 1000 TJ = 125°C 100 10 0.6 0.4 −50 TJ = 150°C 1.0 −25 0 25 50 75 100 125 150 0 TJ, JUNCTION TEMPERATURE (°C) 2 4 6 8 10 12 14 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 16 NTR4101P 1000 TJ = 25°C C, CAPACITANCE (pF) VGS = 0 V 800 QT 3.5 Ciss 600 400 Coss 200 4.0 3.0 2.5 VDS 2.0 VGS Qgd Qgs 1.5 1.0 ID = −1.6 A TJ = 25°C 0.5 Crss 0 0 2 4 6 8 10 12 14 16 18 20 0 0 4 6 2 Qg, TOTAL GATE CHARGE (nC) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Gate Charge 1000 5 −IS, SOURCE CURRENT (AMPS) VDD = −10 V ID = −1.6 A VGS = −4.5 V t, TIME (ns) 8 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 100 td(off) tf tr td(on) 10 1 VGS = 0 V TJ = 25°C 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 1 10 100 0 RG, GATE RESISTANCE (OHMS) 0.2 0.4 0.6 0.8 1.0 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 4 NTR4101P PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AK NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318−03 AND −07 OBSOLETE, NEW STANDARD 318−08. A L 3 1 V B S 2 DIM A B C D G H J K L S V G C D H J K INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN SOLDERING FOOTPRINT* 0.95 0.037 0.95 0.037 2.0 0.079 0.9 0.035 0.8 0.031 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 NTR4101P ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 6 For additional information, please contact your local Sales Representative. NTR4101P/D