TI BQ76PL102RGTR

bq76PL102
www.ti.com .......................................................................................................................................... SLUS887A – DECEMBER 2008 – REVISED OCTOBER 2009
PowerLAN™ Dual-Cell Li-Ion Battery Monitor With PowerPump™ Cell Balancing
FEATURES
1
• Monitors up to Two Individual Cell Voltages
and Temperatures
• Part of a Complete Low-Cost Solution for
Battery Packs of up to 12 Series and One or
More Parallel Cells (When Used With
bq78PL114).
• Advanced PowerPump™ Balancing
Technology Equalizes Cells in Li-Ion Battery
Packs, Resulting in Longer Run Time and Cell
Life.
• PowerPump™ Cell Balancing Transfers
Charge From Cell to Cell During all Operating
Conditions – No Wasteful Current Bleeding or
Associated Heat Buildup.
• Unique PowerLAN™ Isolated Communications
Technology Permits Simultaneous
Measurement of All Individual Cell Voltages in
a Series String.
• Low Current Consumption:
– <250 µA Active
– <35 µA Standby
– <1 µA Undervoltage Shutdown
• Connects Directly to Cells, No Resistive
Dividers
• Internal LDO Regulator for Support Circuitry
• Ultrasmall Footprint, 3-mm × 3-mm
• Millivolt Measurement Resolution Using
Delta-Sigma A/D Converter
• Self-Calibrating Time Base – No Crystal
Required When Used With bq78PL114
2
APPLICATIONS
•
•
•
•
Uninterruptible Power Supplies (UPS)
Portable Medical and Test Equipment
Electric Bikes and Mild-EV Battery Packs
Multicell Series Strings ≥ 5S
RELATED DEVICES
•
bq78PL114 Master Gateway Battery Controller
DESCRIPTION
The bq76PL102 PowerLAN dual-cell battery monitor
is part of a complete scalable battery management
system for use with arrays of up to 12 Li-Ion
rechargeable cells. The bq76PL102 connects to one
or two cells in a series string, performs voltage and
temperature monitoring of each individual cell, and
reports these parameters over the PowerLAN
communication network. Together with a bq78PL114
master-gateway battery controller, the bq76PL102
forms a
complete
battery
monitoring
and
management
system
for
higher
cell-count
applications.
Partitioning of the battery monitor function on a per
cell basis permits connection and measurement close
to the cell. This results in superior accuracy and
management over competing solutions. This scheme
also facilitates the PowerPump cell balancing system,
a technique which actively balances capacities of
Li-Ion batteries without the excessive heat or
limitations of bleed-balancing techniques.
The bq76PL102 PowerPump cell balancing
technology uses a charge-transfer methodology
which does not bleed off excess energy as heat, but
instead moves energy dynamically from cell to cell as
needed. Balancing is performed during all battery
operational modes – charge, discharge, and rest.
Balancing is automatically coordinated between all
cells on a PowerLAN system. PowerPump balancing
technology results in longer run time and longer cell
life.
The PowerLAN communications architecture has
been engineered to provide robust communications in
tough EMI/RFI environments while avoiding the
excessive power draw, high parts count, and elevated
cost of other solutions. PowerLAN permits easy
scalability using series connections of bq76PL102
dual-cell battery monitors. High-cell-count battery
systems of up to 12 series cells are easily
constructed without complicated high-voltage cell
measurement restrictions.
The bq76PL102 works with
master-gateway battery controller.
the
bq78PL114
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPump, PowerLAN are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2009, Texas Instruments Incorporated
bq76PL102
SLUS887A – DECEMBER 2008 – REVISED OCTOBER 2009 .......................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
Typical
Temp
Sensor
V1
D-S
A/D
XT1
Typical
Temp
Sensor
2.5 V
LDO
PowerPump™
Balancing Logic
Internal
Temperature
PUMP2N
+
Cell Balancing Circuits
Vref
VLDO
Oscillator
XT2
+
PUMP2S
PUMP1N
PUMP1S
VSS
SDO
V2
D-S
A/D
Control Logic
SDI
PowerLAN™ Communications
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
B0345-01
Figure 1. bq76PL102 Simplified Internal Block Diagram
2
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Pack
Positive
SMBus
Pack
Negative
–
+
Pack Protection
Circuits and Fuse
Example 8-cell configuration shown
PowerLAN
Communication
Link
RSENSE
PowerLAN
Master Gateway
Battery Controller
bq78PL114
bq76PL102 Cell
Monitor With
PowerPump
Balancing
bq76PL102 Cell
Monitor With
PowerPump
Balancing
B0332-01
Figure 2. Example Multicell PowerLAN System Implementation
AVAILABLE OPTIONS
The bq76PL102 is currently available in a 3-mm square QFN-16 package, bq76PL102RGT, with a rated
operational temperature range of –40°C to 85°C. (See Figure 5 for specific package information, dimensions, and
tolerances.)
• Order bq76PL102RGTT for 250 quantity, tape and reel
• Order bq76PL102RGTR for 3000 quantity, tape and reel
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bq76PL102
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TDI
3
SDI
4
V1
XT1
XT2
13
Thermal
Pad
5
6
7
8
PUMP2N
2
14
PUMP2S
VLDO
15
PUMP1N
1
16
PUMP1S
VSS
VPP
RGT Package
(Top View)
12
V2
11
TMD
10
TCK
9
SDO
P0019-06
Figure 3. bq76PL102 Pinout (Top View)
CAUTION:
This device is subject to damage from Electrostatic Discharge (ESD). The
device should be stored and handled using appropriate ESD precautions to
prevent damage to the internal circuitry.
PIN FUNCTIONS
PIN
NAME
NO.
I/O (1)
DESCRIPTION (2)
PUMP1N
6
O
Charge-balance gate drive for cell 1 north
PUMP1S
5
O
Charge-balance gate drive for cell 1 south
PUMP2N
8
O
Charge-balance gate drive cell 2 north
PUMP2S
7
O
Charge-balance gate drive cell 2 south
SDI
4
I
PowerLAN serial data input from lower south, downstream part
SDO
9
O
PowerLAN serial data output to north, upstream part
XT1
14
IA
External temperature sensor 1 input (calibrated 50 µA)
XT2
13
IA
External temperature sensor 2 input (calibrated 50 µA)
TCK
10
NC
Do not connect
TDI
3
NC
Do not connect
TMD
11
NC
Do not connect
V1
15
IA
Midpoint cell connection (cell 1 positive and cell 2 negative)
V2
12
P, IA
VLDO
2
P
Low-dropout regulator output – connect to VPP (bypass with 4.7 µF capacitor)
VPP
16
P
Connect to VLDO
VSS
1
P
Connect to most-negative cell voltage (cell 1 negative)
—
P
Thermal pad – connect to VSS
(1)
(2)
(3)
4
Connect to most-positive cell voltage (cell 2 positive) (3)
I - input, IA - analog input, O - output, P - power, NC - no connect
Cell numbering convention is from more-negative (cell 1) to more-positive (cell 2) and is locally referenced.
When there is an odd number of series cells in a battery pack, connect pin V2 of the topmost bq76PL102 to pin V1 of the same
bq76PL102.
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ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
TA
Operating free-air temperature (ambient)
–40 to 85
°C
Tstg
Storage temperature
–65 to 150
Voltage on SDO
Note: not VSS-referenced
Voltage on SDI
Limited by lower cell voltage
Voltage on V1 (V1 – VSS) (2)
Maximum cell voltage
Voltage on V2 (V2 – V1)
(2)
(V1 – 0.5) to (V2 + 0.5)
With respect to VSS
ESD tolerance
JEDEC, JESD22-A114 human-body model, R = 1500 Ω,
C = 100 pF
(1)
(2)
V
(VSS – 0.5) to (V1 + 0.5) (2)
V
–0.5 to 5
V
Maximum cell voltage (not VSS-referenced)
Voltage on XT1 or XT2
°C
(2)
–0.5 to 5
V
(VSS – 0.5) to (V1 + 0.5)
V
2
kV
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is note implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Cell numbering convention is from most negative (Cell 1) to most positive (Cell 2) and is locally referenced.
ELECTRICAL CHARACTERISTICS
TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Two-cell configuration
2.5
3.6
4.5
One-cell configuration (2)
2.8
3.6
4.5
250
350
µA
32
50
µA
10
30
µA
0.5
1
µA
DC CHARACTERISTICS
VCELL (1) (
2)
Cell voltage input
IDD
Operating current (cell 2)
Measuring, reporting, or balancing
ISTBY
Standby-mode current (cell 2)
Idle
ISHIP
Ship-mode current (cell 2)
IUVM (3)
Cell extreme undervoltage-mode current
(cell 2)
VStartup
Minimum startup voltage, V1 and V2
V1 < 2.8 V
2.9
V
V
CELL VOLTAGE MEASUREMENT CHARACTERISTICS
V1 measurement range
2.75
4.5
V2 measurement range
2.75
4.5
Analog resolution
<1
25°C
Accuracy (after calibration)
±3
Measurement temperature coefficient
±7
mV
µV/°C
+150
Conversion time (5)
V
mV
±10 (4)
0°C to 85°C
V
80
ms
85
°C
INTERNAL TEMPERATURE MEASUREMENT CHARACTERISTICS
Measurement range
–30
Resolution
Accuracy (after calibration)
0.1
(4)
0°C to 85°C
Temperature coefficient
(1)
(2)
(3)
(4)
(5)
°C
±2
+1.28
°C
mV/°C
For single-cell operation, V1 must be connected to V2.
During operation after power up
Condition forced by bq78PL114
With respect to voltage shift induced by temperature coefficient at 85C.
Does not include delay due to internode timing delays.
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ELECTRICAL CHARACTERISTICS (continued)
TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
EXTERNAL TEMPERATURE SENSOR(S) TYPICAL CHARACTERISTICS (6)
Measurement range (7)
–40
Resolution
Accuracy (8)
90
0.2
°C
°C
25°C
±2
°C
0°C to 85°C
±2
°C
PowerPump ELECTRICAL CHARACTERISTICS (FOR bq76PL102)
(9)
VOH
High drive, PUMP1S, PUMP2S
IOUT = 10 µA
VOL
Low drive, PUMP1S, PUMP2S
IOUT = –200 µA
VOH
High drive, PUMP1N, PUMP2N
IOUT = 200 µA
VOL
Low drive, PUMP1N, PUMP2N
IOUT = –10 µA
IOH
Source current, PUMP1S, PUMP2S
VOH = V1 – 0.8 V
250
µA
IOL
Sink current, PUMP1N, PUMP2N
VOH = V1 + 0.2 V
–250
µA
tr
Signal rise time
CLoad = 300 pF
100
tf
Signal FET fall time
CLoad = 300 pF
100
fP
Frequency
PWM duty cycle (10)
0.9 V1
V
0.1 V1
0.9 V1
V
V
0.1 V1
204.8
PUMP1S, PUMP2S
67%
PUMP1N, PUMP2N
33%
V
ns
ns
kHz
LDO VOLTAGE CHARACTERISTICS (11)
Load = 200 µA at 25°C, V1 = 2.8 V
VLDO
Single-cell operation, referenced to VSS
VLDO
Dual-cell operation, V1 = V2 = cell voltage Load = 2 mA at 25°C
2.425
2.5
2.575
V
2.425
2.5
2.575
V
VLAN SIGNALS (12) (13) (14)
SDI, C coupling = 1000 pf
100
SDO
100
CL
Load capacitance
VIH
Input logic high
SDI
0.8 VLDO
V
VOH
Output logic high
SDO
0.9 VLDO
V
VIL
Input logic low
SDI
0.2 VLDO
VOL
Output logic low
SDO
0.1 VLDO
V
tr
Input rise time
SDI
500
ns
tf
Input fall time
SDI
500
ns
tor
Output rise time
SDO
30
50
ns
tof
Output fall time
SDO
30
50
ns
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
6
pF
V
Typical for dual-diode (MMBD4148 or equivalent) external sensor using recommended circuit
Range of diode sensors may exceed operation limits of IC and battery cells.
Typical behavior after calibration; final result depends on specific component characteristics
All parameters tested at typical cell voltages = 3.6 V.
The frequency and duty cycle of each pump gate drive signal is set by the bq78PL114. The PUMPxN signals have a positive duty cycle
and switch on the N-Channel MOSFETs. The duty cycle of the PUMPxS signals is (100 – the duty cycle of the PUMPxN signals).
After calibration
Values specified by design
The SDI and SDO pins on the bq76PL102 are ac-coupled from the cell circuits downstream and upstream, respectively. The limits
specified here are the voltage transitions which must occur within the SDI and SDO rise- and fall-time specifications.
The value specified is over the full input voltage range and the maximum load capacitance.
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bq76PL102
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FEATURE SET
The bq76PL102 dual-cell li-ion battery monitor with PowerPump balancing implements battery voltage
measurement, temperature measurement, and balancing for one or two Li-Ion cells in series, and any number in
parallel (limited by other design considerations).
Functions include:
• Two external temperature sensors are supported
• Simultaneous, synchronous measurement of all cell voltages in a series string
• Asynchronous reporting of most-recent measurements for each cell
• Fully independent measurements on a cell-by-cell basis
• PowerPump cell balancing using charge transfer from cell to cell
• PowerLAN isolated communications to other bq76PL102 devices or bq78PL114 master-gateway
battery-management controller
• Low-power operation
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bq76PL102
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OPERATION
Cell-Voltage Measurement
Voltage measurements are made using one-per-cell precision delta-sigma analog-to-digital converters (ADC). An
internal calibrated band-gap voltage reference is provided with each part. Measurements are performed when
commanded by the bq78PL114 master-gateway battery-management controller via the one-wire PowerLAN
serial communications bus. This allows all cells to be measured at exactly the same time under the same load
conditions.
Cell-Temperature Measurement
Temperature measurements can be obtained using one internal and up to two external sensors. Each external
sensor consists of one (or two for increased accuracy) series-connected diodes and a capacitor for filtering. The
use of dual diodes in a single SMT package is recommended (MMBD4148SE or equivalent). The diode can be
located up to 6 inches (15 cm) from the circuit board. The RF filter capacitor should be co-located very close to
the diode to minimize unwanted noise coupling.
The temperature measurement subsystem uses the same dual ADCs that are used for measuring voltages.
Temperature measurements are fully independent of voltage readings, and are ordinarily interleaved at a
fractional rate of the voltage readings by commands from the bq78PL114 master-gateway battery-management
controller.
Cell Balancing
Balancing is provided among any number of supported cells. The bq76PL102 and PowerLAN family of
master-gateway battery controllers is optimized for designs using more than four cells in series.
The patented PowerPump reactive cell balancing dramatically increases the useful life of battery systems by
eliminating the cycle life fade of multicell batteries due to cell imbalance. PowerPump efficiently transfers charge
from cell to cell, rather than simply bleeding off charging energy as heat. Charge is moved from higher-capacity
cells to lower-capacity ones, and can be moved as needed between any number of series cell elements.
Balancing is performed during all battery operational modes – charge, discharge, and rest. Compared to resistive
bleed balancing, virtually no energy is lost as heat. The actual balance current is externally scalable with
component selection and can range from 10 mA to 1 A (100 mA typical) depending on application or cell
requirements. (See the reference schematic, Figure 7.)
Algorithms for cell balancing are centrally coordinated by the bq78PL114 PowerLAN master-gateway
battery-management controller and directed across the array of bq76PL102 dual-cell Li-Ion battery monitors.
Balancing is done in both directions by the bq76PL102s within the cell stack array: north or up the cell stack and
south or down the cell stack. Each bq76PL102 node provides the circuitry to transfer (pump) the charge from cell
to cell to provide balancing. The balancing algorithm is implemented in the bq78PL114 master-gateway battery
controller, and commands are communicated to the bq76PL102s via the PowerLAN communications link. By
tracking the balancing required by individual cells, overall battery safety is enhanced – often allowing early
detection of internal micro-shorts or other cell failures.
Cell balancing pumping, or charge transfer from one cell to another, is accomplished using a circuit that forms a
simple flyback converter under control of the bq76PL102, which is in turn controlled by the master gateway. The
outputs of PUMPnd (cell number, direction) control MOSFET transistors which charge an inductor from one cell
and then discharge the inductor into an adjacent cell through the intrinsic body diode of the other MOSFET.
• PUMP1S: Pumps charge from cell 1 to the next lower cell (closer to battery negative). This signal is unused
by the first or lowest cell in the string.
• PUMP1N: Pumps charge from cell 1 to cell 2.
• PUMP2S: Pumps charge from cell 2 to cell 1
• PUMP2N: Pumps charge from cell 2 to the next higher cell in a pack (closer to battery positive). This signal is
unused by the highest cell in the string.
8
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PowerLAN Communications
PowerLAN communications technology is a patented serial network and protocol designed specifically for battery
management in a multicell environment. PowerLAN is used to initiate and report measurements of cell voltage
and temperature, as well as control cell balancing. Using only a capacitor, PowerLAN isolates voltages from
adjacent bq76PL102 parts to permit high-voltage stack assemblies without compromising precision and
accuracy. PowerLAN is expandable to support up to 12 cells in series, with each bq76PL102 handling two series
cells. PowerLAN provides high ESD standoff and high immunity to noise generated by nearby digital circuitry or
switching currents. Each bq76PL102 has both a PowerLAN serial input and serial output pin. Received data is
buffered and retransmitted, permitting high numbers of nodes without loss of signal fidelity. Signals are
capacitor-coupled between nodes to provide high dc isolation.
Operation Modes
The bq76PL102 normally operates in one of two modes: active or standby. The bq76PL102 is normally in
standby mode and consumes typically less than 50 µA. The low-dropout regulator output is still functional in this
mode, as are internal system protection functions (undervoltage, communications timeout, etc.)
When a PowerLAN communications event occurs, then the bq76PL102 transitions to active mode and current
drain increases to 250 µA typically. The bq76PL102 stays in this mode to complete any measurements or
cell-balancing pumping operations. Once activity in this mode ceases, the return to standby is automatic, thus
reducing overall power consumption.
An undervoltage ultralow-current mode is also available when initiated by the bq78PL114 master-gateway battery
controller and when the cell voltages drop below a preset threshold. This mode is used to preserve battery
capacity during long periods of non-use and therefore has a current drain of approximately 1 µA.
Note that cell balancing currents are external to the bq76PL102 and may be sized according to the needs of the
application (typically 10 mA to 1 A). These currents are fixed by the cell-balancing circuitry and only enabled or
disabled by the bq76PL102 (under control of the bq78PL114) to achieve the necessary cell-balance operations.
COMPLEMENTARY PRODUCTS
PowerLAN Master Gateway Battery Controller
The bq78PL114 master-gateway battery-management controller with PowerPump cell balancing from Texas
Instruments is the central controller for a complete multicell battery system.
This advanced master-gateway battery controller works with up to 12 series cells monitored by bq76PL102 cell
monitors to provide battery voltage, temperature, current and safety monitoring; state-of-charge and
state-of-health information; system-wide internal PowerLAN communications; as well as external communications
of battery parameters via the industry-standard SMBus interface.
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bq76PL102
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PowerLAN Six-Cell Battery Monitor
RPRE
+
PACK+
–
PACK–
V1
PRE
CHG
DSG
CELL 6
V2
bq76PL102
Cell Balancing
Circuits
Level-Shift Circuits
SDI1
P-LAN
SDO0
CELL 5
VLDO1
V4
RSTN
Cell Balancing Circuits
CELL 4
CELL 3
CELL 2
V3
SPROT
VLDO2
bq78PL114
PowerLAN
Gateway Battery LED1–LED5
Management
Controller
V2
5
SMBCLK
Temperature
Sensor (typ.)
SMBDAT
SMBus
CELL 1
ESD
Protection
V1
XT1, XT2
Temperature
Sensor (typ.)
SDO2
XT3, XT4
Typical six-cell configuration shown.
Additional cells added via PowerLAN connection.
Some components omitted for clarity.
CSPACK
CCPACK
CCBAT
One of 2 external
sensors shown
CSBAT
SDI3
CRFI
Thermal Pad
One of 2 external
sensors shown
VSS
CRFI
RSENSE
S0342-03
Figure 4. bq78PL114 Simplified 6-Cell Gateway Controller Circuit With bq76PL102
10
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+
V1 n + 1
PUMP1S (Next part above)
To Node n + 1
–
V1 n + 1
To Node n + 1
PowerPump™ Circuit
1
+
V2
Typical 2 cell circuit shown,
some components omitted
for clarity.
V2 n
20k
bq76PL102
15µH
PowerLAN™
3300pF
1
2k
SDI
+
PUMP2N
0.001
SDO
1
3300pF
20k
–
V2 n
V1
+
V1 n
20k
PUMP2S
+
15µH
3300pF
1
2k
XT1, XT2
Typical
Temperature
Sensor
MMBD4148SE
0.001
VPP
VLDO
1
PUMP1N
1
3300pF
PUMP1S
20k
–
VSS
Power Pad
V1 n
To Node n – 1
PUMP1S (Next part below)
To Node n – 1
+
V2 n – 1
S0388-01
Figure 5. bq76PL102 Simplified Example Operating-Circuit Diagram
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Figure 6. Higher-Balancing-Current bq76PL102 Operating-Circuit Diagram
12
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CELL1
CELL2
CELL3
CELL4
CELL5
CELL6
CELL7
CELL8
CELL9
CELL10
-
+ CELL1
-
+ CELL2
-
+ CELL3
-
+ CELL4
-
+ CELL5
-
+ CELL6
-
+ CELL7
-
+ CELL8
-
+ CELL9
-
+ CELL10
C51
10uF
C53
10uF
C54
10uF
C94
10uF
C29
10uF
P6N
P6S
P5N
P5S
P8N
P8S
P7N
P7S
P10S
P9N
P9S
C95
10uF
8
7
6
5
15
12
8
7
6
5
15
12
8
7
6
5
15
12
P2N
P2S
P1N
P1S
V1
13
14
13
14
13
0.01uF
C48
N/C 3
N/C 10
N/C 11
16
VPP
2
VLDO
T2
T1
9
0.01uF
C10
N/C 3
N/C 10
N/C 11
16
VPP
2
VLDO
T2
T1
9
0.01uF
C49
N/C 3
N/C 10
N/C 11
BQ76PL102
V2
U3
P2N
P2S
P1N
P1S
V1
T2
14
16
VPP
2
VLDO
BQ76PL102
V2
U2
P2N
P2S
P1N
P1S
V1
T1
9
BQ76PL102
V2
U6
SDO
1
VSS
17
TAB
SDI
4
SDO
1
VSS
17
TAB
SDI
4
C9
10uF
C52
C46
10uF
C55
C92
10uF
C96
T6
0.01uF
T7
0.01uF
T11
0.01uF
C45
C57
C98
T5
0.01uF
T8
0.01uF
T12
0.01uF
12.0 VDC
ZR1
VLDO1
VSS
Q8
R40
R45
R5
100K
10K
R44
100K
Q9
R41
200K
560K
C27
1.0M
R46
0.1uF
C43
C11
0.01uF
0.01uF
10uF
C5
P4N
P4S
P3N
P3S
P2N
P2S
P1N
VSS
1.0uF
C39
1.0uF
C40
1.0uF
C41
1.0uF
C44
C61
VSS
10uF
C28
P4N
P4S
P3N
P3S
P2N
P2S
P1N
VSS
V1
V2
V3
V4
VLDO2
U4
25
8
30K
R58
1.0M
R59
ZR2
9
C3
4.7K
4.7K
Various
R3
1.0uF R27
C7
0.01uF
R28
6
12
OSCO
RSTN
38
37
28
27
26
OSCI 11
SMBDAT
SMBCLK
N/C
N/C
N/C
5
EFCID
4
EFCIC
29
31
33
32
36
35
34
40
XT4
41
XT3
45
XT2
46
XT1
LED5/SEG5
LED4/SEG4
LED3/SEG3
LED2/SEG2
LED1/SEG1
LEDEN/PSH/BP/TP
FIELD
12.0 VDC
bq78PL114S12
Q11
VLDO1
24
P-LAN
19
SDI3
18
SDO2
14
SDI1
13
SDO0
23
22
21
20
17
16
15
48
47
44
42
39
43
VSS
Q12
200K
R56
560K
R53
Q13
CSBAT
0.1uF
DSG
1
CHG
2
CCBAT
SDO
1
VSS
17
TAB
SDI
4
30
SPROT
3
PRE
CCPACK
C60
CSPACK
0.1uF
TAB
49
Product Folder Link(s) :bq76PL102
7
Copyright © 2008–2009, Texas Instruments Incorporated
10
Q10
S1
R19
1.0M
R6
R25 1.0M
VSS
1.0M
100R
R49
D24
D25
D26
D27
D23
100K
R52
PACK-
VSS
R16
1.0M
R17
R18
100R
1.0M
R43
BC846ALT1G
200K
R50
100R
R15
Q15
12.0 VDC
ZR3
Q16
R51
1.0M
T1
C16
T3
C37
Z1
0.01uF
0.01uF
100R
R54
0.01uF
T2
0.01uF
5.6VDC
100R
R55
C8
C6
T4
0.1uF
C42
0.1uF
C50
1
2
3
4
S001
SMBUS-PORT
VSS
PACK+
www.ti.com .......................................................................................................................................... SLUS887A – DECEMBER 2008 – REVISED OCTOBER 2009
bq76PL102
Figure 7. Reference Schematic (Sheet 1 of 2)
Submit Documentation Feedback
13
14
CELL8
CELL9
CELL10
C1
22uF
C13
22uF
C17
22uF
L2
2.0K
R9
4.7uH
L1
2.0K
R12
4.7uH
D5
D6
D7
D8
R10
R11
R13
R14
20K
Q1-A
Q1-B
20K
20K
Q2-A
Q2-B
20K
3300pF
C12
3300pF
C2
3300pF
C15
3300pF
C14
P8N
P9S
P9N
P10S
Submit Documentation Feedback
Product Folder Link(s) :bq76PL102
CELL1
CELL2
CELL3
CELL4
CELL5
CELL6
CELL7
22uF
C90
22uF
C91
C67
22uF
C70
22uF
C73
22uF
C76
22uF
VSS
C62
22uF
2.0K
R2
4.7uH
L8
2.0K
R8
4.7uH
L9
2.0K
R23
4.7uH
L10
2.0K
R47
4.7uH
L11
2.0K
R61
4.7uH
L12
2.0K
R64
4.7uH
L13
2.0K
R67
4.7uH
L14
D1
D2
D3
D4
D19
D20
D21
D22
D28
D29
D30
D31
D32
D33
20K
20K
20K
20K
20K
20K
20K
20K
20K
20K
Q18-A
Q18-B
R21
Q19-A
Q19-B
R22
R26
Q20-A
Q20-B
R42
R48
Q21-A
Q21-B
R57
R62
Q22-A
Q22-B
R63
20K
Q23-A
R65
R4
20K
Q23-B
R66
20K
Q24-A
R68
R7
20K
Q24-B
R69
C77
3300pF
C59
3300pF
C58
3300pF
C64
3300pF
C63
3300pF
C66
3300pF
C65
3300pF
C69
3300pF
C68
3300pF
C72
3300pF
C71
3300pF
C75
3300pF
C74
3300pF
C78
3300pF
S002
P1N
P2S
P2N
P3S
P3N
P4S
P4N
P5S
P5N
P6S
P6N
P7S
P7N
P8S
bq76PL102
SLUS887A – DECEMBER 2008 – REVISED OCTOBER 2009 .......................................................................................................................................... www.ti.com
Figure 8. Reference Schematic (Sheet 2 of 2)
Copyright © 2008–2009, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
12-Nov-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ76PL102RGTR
ACTIVE
QFN
RGT
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
BQ76PL102RGTT
ACTIVE
QFN
RGT
16
250
CU NIPDAU
Level-3-260C-168 HR
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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