CXA1704R 2-channel REC/PB Amplifier for 8mm VCR Description The CXA1704R is a bipolar IC designed as a recording/playback amplifier for Hi8-compatible VCRs. Features O Recording system • Feedback damping provided in the recording amplifier and its EVR control function facilitate circuit board design. • Y, chroma, and low-band level adjustment functions • Ramp circuit O Playback system • Feedback damping provided in the playback amplifier facilitates circuit board design. • Middle-frequency tuner on chip; EVR permits independent adjustment of f0, Q and boost • RF AGC and dropout detection circuit 48 pin LQFP (Plastic) Absolute Maximum Ratings (Ta=25°C) • Supply voltage VCC 7 V • Operating temperature Topr –10 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 1100 mW (when board is mounted) Operating Conditions Supply voltage +0.5 V VCC 4.75 –0.25 Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E93860A66-TE CXA1704R 24 23 22 21 20 19 18 17 16 15 MTG1 MTOUT MTG2 PCMOUT MTF0 RP_PB VCC T1 RFSWP T2 T3 MTQ Block Diagram and Pin Configuration 14 13 VCC1 DOP 1CH 2CH MUTE REC1CONT 26 MTGSW 25 PCMSW 12 DOCDET 11 RAMP GEN REC REC1OUT RFAGCIN V/I 27 1CH(0dB) 1CH(6dB) 2CH(0dB) 2CH(6dB) MUTE 40dB PB1IN HEAD 28 M•T –6dB 15dB 10 12dB VIDEOSW 9 DOCDET GND1 AGCDET 29 8 RFAGCTC RFAGCOUT RF AGC PBDUMP1 30 7 31 6 PBDUMP2 YLEVEL YIN GND2 HEAD 32 LOWLEVEL 15dB 5 40dB PB2IN CIN 33 1 V/I REC2OUT PCM 4 1 YGCA REC 34 CGCA 1 VIDEO VPSW1 XGAIN LOWGCA 3 1 RAMP GEN 1 REC2CONT VPSW2 VIDEO 35 AFMIN 1 2 LOWGCA PCM 2 VCC2 CCONT 36 1 —2— 48 ATFIN 47 PCMREC 46 PCMIN 45 VG2 44 IR 43 IR1 42 GND 41 VPSW1OUT 40 REC1IN 39 VREG 38 VPSW2OUT REC2IN 37 CXA1704R Pin Description Pin No. CCONT Pin voltage Equivalent circuit Description EVR adjustment of recording chroma level. Gain is small when the applied voltage is large. — 270 32.5k 1 Symbol 143 1 67.5k 25k 2 AFMIN 90µ 90µ Recording AFM input. DC is cut off by internal capacitor. Input level is 125 mVp-p (typ.). When not used, connect this pin to Vcc. — 60µ 20p 143 50k 2 3 XGAIN VIDEO SW gain switch. Low : 6 dB High : 0 dB — 35µ 143 3 CIN Recording chroma input. Input the signal with capacitor coupling. Input level is 300 mVp-p (typ.). 2.4 V 70µ 143 4 50k 4 —3— CXA1704R Pin No. LOW LEVEL Pin voltage Equivalent circuit Description — 270 33.5k 5 Symbol 143 5 66.5k 21k 6 YIN 90µ 90µ 2.4 V EVR adjustment of recording RF signal level. Gain is small when the applied voltage is large. Adjusts both the VIDEO path and the PCM path simultaneously. VIDEO path: Adjustment of C + AFM + ATF PCM path: Adjustment of ATF Recording Y signal input. Input the signal with capacitor coupling. Input level is 500 mVp-p (typ.). 40µ 143 50k 6 YLEVEL — EVR adjustment of recording Y signal level. The Y LEVEL is small when the applied voltage is large. 270 32.5k 7 143 67.5k 23k 8 RFAGCOUT 7 90µ 90µ 2.8 V Playback Y signal output. Output level is 380 mVp-p (typ.). 40µ 8 600µ —4— CXA1704R Pin No. 9 Symbol RFAGCTC Pin voltage Equivalent circuit Description — RF AGC time constant. 143 9 25µ 10 RFAGCIN 25µ 25µ — RF AGC input of playback Y level. The playback video signal output from Pin 14 (MTOUT) passes through an external ATF TRAP, AFM TRAP, and C TRAP, and is then input to Pin 10 (RFAGCIN) again. DC is cut off by internal capacitor. When not used, connect this pin to Vcc. 13p 143 50µ DOCDET 2.5 V Determines the dropout detection level. 47k 11 50k 10 143 Dropout detection signal output. Goes high when a dropout is detected. 150 64k 12 2.4k H: 3.1 V L: 0 V 100k DOP 72k 12 46.5k 50µ 79k 11 —5— CXA1704R MTG1 Pin voltage Equivalent circuit Description — 40k 13 Symbol 270 Pin No. 143 13 REVR adjustment of channel 1 middle-frequency tuner boost. Boost is small when the applied voltage is large. 58k 14k 14 MTOUT 90µ 90µ 2.4 V Playback VIDEO output. Y + C + AFM + ATF is output. 40µ 14 400µ — EVR adjustment of channel 2 middle-frequency tuner boost. Boost is small when the applied voltage is large. 270 MTG2 40k 15 143 15 58k 14k 16 PCMOUT 90µ 90µ 2V Playback PCM output. 40µ 16 400µ — EVR adjustment that determines f0 of the middle-frequency tuner. f0 is large when the applied voltage is large. 270 33k MTF0 143 17 41k 60k 17 40µ 40µ —6— CXA1704R Pin No. Symbol Pin voltage 18 RP_PB — Equivalent circuit 35µ Description REC/PB switch. High : PB Low : REC 35µ 143 18 19 VCC 4.75 V 20 T1 — Power supply for sections other than the REC amplifier and the PB amplifier. Connect to GND. 35µ 35µ 143 20 21 RFSWP — RFSWP input. 35µ 35µ 143 21 22 T2 — Connect to GND. 35µ 35µ 143 22 —7— CXA1704R Pin No. 23 Symbol T3 Pin voltage Equivalent circuit Description — Connect to GND. 35µ 35µ 143 23 — 270 MTQ 30k 24 143 24 47k 50k 40µ 4.75 V — Channel 1 power supply. EVR adjustment of recording channel 1 damping Damping is applied strongly when the applied voltage is small. 270 VCC1CH REC1CONT 34k 25 26 40µ 143 26 66k 71k 40µ — Recording channel 1 output. Open collector. 16.5k —8— 30 27 1k REC1CONT 5.7k 27 40µ EVR adjustment that determines Q of the middle-frequency tuner. Q is large when the applied voltage is large. CXA1704R Pin No. PB1IN Pin voltage Equivalent circuit Description 0.7 V Playback channel 1 input. 2.5k 28 Symbol 28 GND1CH PBDUMP1 0V 2.5 V 40µ 270 29 30 30 4k Channel 1 GND. The playback channel 1 damping is determined by the external resistance. Damping is applied strongly when the resistance is large. 4k 4k 40µ PBDUMP2 2.5 V 40µ 270 31 31 4k The playback channel 2 damping is determined by the external resistance. Damping is applied strongly when the resistance is large. 4k 4k 40µ 32 GND2CH 0V Channel 2 GND. —9— CXA1704R Symbol Pin voltage 33 PB2IN 0.7 V Equivalent circuit Description Playback channel 2 input. 2.5k Pin No. 33 REC2OUT — Recording channel 2 output. Open collector. 16.5k 34 30 — EVR adjustment of recording channel 2 damping. Damping is applied strongly when the applied voltage is small. 270 REC2CONT 34k 35 1k 5.7k 34 143 35 66k 71k 4.75 V 2.4 V 143 240µ —10— 50k 1.3k 1.3k 37 50k VCC2CH REC2IN 10p 36 37 40µ 40µ Channel 2 power supply. Channel 2 recording amplifier input. DC cut-off is applied to the Pin 38 signal by external capacitor, and then the resulting signal is input. CXA1704R Pin No. Symbol Pin voltage 38 VPSW2OUT 2.4 V Equivalent circuit Description Recording channel 2 VPSW output. Output level is 200 mVp-p (typ.). 40µ 38 400µ VREG 4.15 V 4.15 V regulator output. 10k 39 5p 39 40 REC1IN 2.4 V 143 10p 41 VPSW1OUT 50k 1.3k 1.3k 50k 40 Channel 1 recording amplifier input. DC cut-off is applied to the Pin 41 signal by external capacitor, and then the resulting signal is input. 240µ 2.4 V Recording channel 1 VPSW output. Output level is 200 mVp-p (typ.). 40µ 41 400µ —11— CXA1704R Symbol Pin voltage 42 GND 0V 43 IR1 1.9 V Equivalent circuit Description GND for sections other than the REC amplifier and the PB amplifier. Determines the REC amplifier gain. Generates the reference current when 15 k Ω resistance is inserted to GND. Insert 18 k Ω resistance to GND. 42k Pin No. 40k 1k 20k 43 40µ IR 1.9 V Generates the reference current for the middle-frequency tuner, dropout detection circuit, and the ramp. 42k 44 40k 1k 20k 2.45 V 2.45 V internal reference voltage source. 270 VG2 34.5k 45 44 40µ 20k 49k 4k 45 PCMIN 2.4 V Recording PCM input. Input the signal with capacitor coupling. Input level is 300 mVp-p (typ.). 70µ 143 46 50k 46 75µ —12— CXA1704R Pin No. Symbol Pin voltage 47 PCMREC — Equivalent circuit Description PCM recording switch. PCM recording is selected when high. 35µ 35µ 143 47 ATFIN 2.4 V Recording ATF input. Input the signal with capacitor coupling. Input level is 125 mVp-p (typ.). 70µ 143 48 50k 48 —13— 3 6 Gymax YGCA maximum gain 7 8 —14— 15 14 13 12 11 10 path) minimum gain Low-frequency GCA (PCM path) maximum gain Low-frequency GCA (VIDEO path) maximum gain Low-frequency GCA (VIDEO path) center gain Low-frequency GCA (VIDEO path) minimum gain Low-frequency GCA (VIDEO center gain YGCA secondary distortion (center gain) Glpmin Glvmax Glvmax 2 Glvcen Glvmin DY 48 48 2 2 2 6 6 6 Gycen YGCA center gain 6 ∆Y 6 Gymin YGCA minimum gain 5 YGCA frequency response — — 9 — — Vg2 pin voltage — Vreg pin voltage — Ipb — Input pin Ib1,Ib2 Irec Symbol 4 playback Current consumption for 2 recording Current consumption for Recording amplifier bias current 1 No. Item Electrical Characteristics 125mVp-p 125mVp-p 125mVp-p 125mVp-p 125mVp-p 500mVp-p 500mVp-p 200mVp-p 500mVp-p 500mVp-p — — — — — Level 100kHz 100kHz 1.7MHz 1.7MHz 1.7MHz 7MHz 300kHz 14MHz 300kHz 300kHz 300kHz — — — — — Frequency Input conditions Measurement conditions A A A A A A A A A A A A A D YLEVEL = Vylev Pin 5 LOWLEVEL = Vcc YLEVEL = Vylev Pin 5 LOWLEVEL = 1.8 V YLEVEL = Vylev Pin 5 LOWLEVEL = 1.8 V YLEVEL = Vylev is 12.5 mVp-p (Vylev). Adjust Pin 5 LOWLEVEL so that the output YLEVEL = Vylev Pin 5 LOWLEVEL = Vcc YLEVEL = Vylev YLEVEL = Vylev Level at 14 MHz/level at 300 kHz Pin 7 YLEVEL = 1.8 V 200 mVp-p (Vylev). Adjust Pin 7 YLEVEL so that the output is Pin 7 YLEVEL = Vcc Measure the pin voltage. Measure the pin voltage. channel playback. Measure the current consumption for two- Measure the DC current. channel recording (includes bias current). Measure the current consumption for two- Measurement method 63 Typ. 82 Max. -8 - 20 — — — - 32.0 - 26.0 - 14.0 - 12.4 — — 0 — — - 32.0 - 26.0 - 14.0 - 12.4 — — - 53 - 1.5 - 0.8 — 2.60 4.35 46 - 15.8 - 14.1 2.45 4.15 35 - 2.2 - 1.1 — — 2.30 3.95 24 14.55 18.8 23.05 44 Min. dB V mA Unit ∗ For details on the control logic, refer to the Control Logic Truth Table. 41, 38 41, 38 41, 38 41, 38 41, 38 41, 38 41, 38 41, 38 41, 38 41, 38 45 39 Ivcc Ib1, Ib2 Ivcc ammeter name logic A pin or Control Measurement (Vcc = 4.75 V, Ta = 25°C ; Refer to the Electrical Characteristics Measurement Circuit.) CXA1704R Item —15— Gpcm Vagc1 Vagc2 Vagc3 30 RFAGC standard output 31 Cover range high 32 Cover range low Gmt2 28 PBMTOUT gain (XGAIN = low) 29 PBPCMOUT gain Gmt1 ∆r1, ∆r2 Ir1, Ir2 27 PBMTOUT gain (XGAIN = high) response 26 Recording amplifier frequency current 25 Recording amplifier output distortion 24 PCM main path secondary DP 10 10 10 28, 33 28, 33 28, 33 40, 37 40, 37 46 46 ∆P 23 PCM main path frequency response 46 Gp 22 PCM main path gain secondary distortion 1.2Vp-p 50mVp-p 224mVp-p 200µVp-p 200µVp-p 200µVp-p 200mVp-p 200mVp-p 300mVp-p 300mVp-p 300mVp-p 300mVp-p 7MHz 7MHz 7MHz 300kHz 300kHz 300kHz 1MHz 10MHz 1MHz 7MHz 300kHz 300kHz 2MHz 4 21 Chroma GCA center gain 2MHz 300kHz 300kHz 300kHz 100kHz Frequency 300kHz 300mVp-p 300mVp-p 300mVp-p 300mVp-p 125mVp-p Level Input conditions response (center gain) DC 4 ∆C 20 Chroma GCA frequency 4 Gcmax 19 Chroma GCA maximum gain 4 Gccen 18 Chroma GCA center gain 4 48 Input pin Gcmin Glvp Symbol 17 Chroma GCA minimum gain path) maximum gain 16 Low-frequency GCA (PCM No. Measurement conditions 14 14 16 8 8 8 F, G D, E D D D 27, 34 27, 34 41, 38 41, 38 41, 38 41, 38 D, E A A B, C B, C B, C A 41, 38 41, 38 A A 41, 38 A 41, 38 A 41, 38 ammeter name logic A pin or Control Measurement ↓ Measure the output level. MTG1, MTG2 = Vcc Level at 10 MHz/level at 1 MHz Output level (V)/51 (Ω) REC1CONT, REC2CONT = 3.3 V Level at 14 MHz/level at 300 kHz YLEVEL = Vylev, LOWLEV = Vllev YLEVEL = Vylev, LOWLEV = Vllev Level at 2 MHz/level at 300 kHz YLEVEL = Vylev, LOWLEV = Vllev Pin 1 CCONT = 1.8 V YLEVEL = Vylev, LOWLEV = Vllev 50 mVp-p (Vclev) Adjust Pin 1 CCONT so that the output is YLEVEL = Vylev, LOWLEV = Vllev Pin 1 CCONT = Vcc YLEVEL = Vylev Pin 5 LOWLEVEL = 1.8 V Measurement method - 15.6 - 50 0 — +0.5 — — - 55 - 0.2 — 305 335 420 345 380 57.5 61.0 63.5 67.0 57.5 61.0 — 17.7 20.0 — - 1.5 - 0.8 dB Unit 530 — 420 64.5 70.5 64.5 — mVp-p dB 22.3 mAp-p — 0 - 4.5 - 3.5 - 2.5 — - 0.5 — - 24.0 - 21.6 - 13.3 - 11.0 — — - 14.0 - 12.4 Min. Typ. Max. CXA1704R Input pin Level Frequency Input conditions D D D Vdop-l Vdop-h Tdop-on Tdop-off Dropout pulse low level Dropout pulse high level Dropout ON detection time Dropout OFF detection time 35 36 37 38 (diagram at right). Refer to the measurement method D D Kdop-off Dropout detection OFF level (diagram at right). 12 12 12 12 12 12 ammeter name logic D pin or Measurement Control 34 Kdop-on Refer to the measurement method Symbol Dropout detection ON level Item 33 No. Measurement conditions —16— a VDOP-L VDOP-H b 224mVp-p 7MHz Pin 12 DOP 7M/224mVp-p Pin 10 RFAGCIN 5kHz 50µs a 224 Kdop-off = 20log b 224 Kdop-on = 20log Tdop-on Tdop-off Pin 12 DOP 10kHz Pin 10 RFAGCIN Measurement method Typ. Max. — — 2.9 0 2 1 3.1 0.01 - 10.2 - 7.2 — — 3.3 0.2 - 4.2 - 15.0 - 12.0 - 9.0 Min. µs V dB Unit CXA1704R CXA1704R Control Logic Truth Table Control logic input Input conditions and operation Operation of each section for the input conditions shown at left conditions Pin 14 Pin 8 Dropout detection circuit × × × × × VIDEO REC B L L H — P V P V × × × × × × PCM REC C L H H — V P V P × × × × × × ↓ D H L L H × × × × O O CH1 CH2 O O PB E H H L H × × × × O O CH2 CH1 O O ↓ F H L L L × × × × O O CH1 CH2 O O ↓ G H H L L × × × × O O CH2 CH1 O O ↓ Pin 47 Pin 21 Pin 18 Explanation of input conditions: H : Control logic input voltage is 2.3 V or more. L : Control logic input voltage is 0.6 V or less. — : Don’t care. RFAGCOUT Pin 16 × MTOUT PB2chAmp V PCMOUT PB 1chAmp V REC2OUT Pin 34 V REC1OUT Pin 27 V VPSW2OUT Pin 38 — VPSW1OUT L XGAIN — PCMREC L Control logic conditions RFSWP A RP_PB Pin 41 Playback system Pin 3 Recording system Operation Explanation of operation symbols: O : Operates. V : VIDEO signal is selected. X : Does not operate. P : PCM signal is selected. CH1 : CH1 signal is output. CH2 : CH2 signal is output. Explanation of Measurement Methods Playback system signal input method 50Ω 49Ω 5.6µH 0.01µF PB IN pin 1Ω CXA1704 head amplifier Signal source Middle-frequency tuner measurement method As shown in the diagram at right, assume f0 = 8 MHz, Q = 2.5, and the boost = 6 dB as the center conditions. Fix two of them at their respective center condition, and apply the EVR control of the adjustment item to measure the adjustment range. Boost =6dB fo = 8MHz Q = 2.5 —17— Mode REC PB VCC 4.75V A IVCC PB2IN PB1IN 5.6µ Ib1 100µ 0.1µ 10µ Ib2 VCC2 REC2CONT 51 ∗ REC2OUT 0.01µ PB2IN GND2 390 PBDUMP2 390 PBDUMP1 GND1 0.01µ PB1IN 51 ∗ REC1OUT REC1CONT 5.6µ 0.022µ 0.022µ REC2CONT 49 49 REC1CONT 1 1 36 35 34 33 32 31 30 29 28 27 26 MTQ 37 REC 38 40dB HEAD HEAD 40dB REC 0.01µ 25 51 VPSW2OUT MTQ REC2IN T3 VPSW2OUT 39 RAMP GEN V/I 15dB 15dB V/I RAMP GEN 40 21 RFSWP 0.01µ T2 VREG 10µ 10µ REC1IN RFSWP REC1IN 22 51 VPSW1OUT 41 1CH 2CH MUTE 19 0.1µ 42 PCM 43 YGCA VIDEOSW VIDEO PCM 18 PCMSW VIDEO 1CH(0dB) 1CH(6dB) 2CH(0dB) 2CH(6dB) MUTE VPSW2 VPSW1 20 T1 VPSW1OUT REC2IN 10µ GND RP PB 15k ∗ VCC 10µ RP_PB IR1 44 2 1 17 MTF0 IR MTF0 18k ∗ 23 RF AGC 1 45 M•T –6dB 1 PCMOUT 12dB 15 MTG2 46 LOWGCA LOWGCA AGCDET 16 0.1µ 24 PCMIN VCC1 1 1 0.01µ PCMOUT VG2 10µ MTGSW MTG2 PCMIN 0.1µ MTOUT 47 1 13 48 CGCA DOCDET 14 ATFIN 100µ 51 PCMREC MTOUT PCMREC MTG1 MTG1 ATFIN —18— 1 2 3 4 5 6 7 8 9 10 11 12 CCONT AFMIN XGAIN 0.01µ CIN LOWLEVEL 0.01µ YIN YLEVEL RFAGCOUT RFAGCTC 0.01µ RFAGCIN DOCDET DOP 51 51 51 51 CCONT AFMIN XGAIN CIN LOWLEVEL YIN YLEVEL Resistance accuracy: 1% Control logic pin EVR adjustment pin Signal input pin Signal output pin RFAGCOUT 4700p 470k RFAGCIN DOP ∗ 0.1µ Electrical Characteristics Measurement Circuit CXA1704R 51 0.01µ CH1 HEAD PBDUMP2 100µ VCC2 REC2CONT REC2OUT 0.01µ PB2IN GND2 390 0.022µ 0.1µ 10µ PBDUMP1 GND1 0.01µ PB1IN REC1OUT REC1CONT VCC1 390 0.022µ 10µ 0.1µ 36 35 34 33 32 31 30 29 28 27 26 25 REC1CONT 37 REC 0.01µ 40dB 40dB 38 HEAD HEAD REC 23 RFSWP 39 RAMP GEN V/I 15dB 15dB V/I RAMP GEN 22 RP PB 10µ REC2IN REC2CONT MTQ 24 40 21 0.01µ 41 1CH 2CH MUTE 19 42 PCM 43 YGCA VIDEOSW VIDEO PCM 18 PCMSW VIDEO 1CH(0dB) 1CH(6dB) 2CH(0dB) 2CH(6dB) MUTE VPSW2 VPSW1 20 10µ 44 2 1 17 1 1 RF AGC M•T –6dB 45 12dB 15 46 LOWGCA LOWGCA AGCDET 16 1 1 47 1 13 0.01µ 48 CGCA DOCDET 14 AFM TRAP 0.01µ 1 2 3 4 5 6 7 8 9 10 11 12 0.01µ 0.01µ CCONT AFMIN XGAIN CIN LOWLEVEL YIN YLEVEL RFAGCOUT RFAGCTC RFAGCIN DOCDET DOP ATF TRAP 4700p 470k C TRAP RF EQ RFGND PCMREC XGAIN PCMIN ATFIN AFMIN CIN YIN EVR LOGIC SIGNAL IN LOWLEVEL CCONT YLEVEL MTG1 MTG2 MTF0 MTQ DOP RFVCC RFAGCOUT PCM OUT SIGNAL OUT PB C RF PB RF Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same. CH2 HEAD 100µ VREG T3 VPSW2OUT T2 0.1µ RFSWP REC1IN T1 VPSW1OUT 100µ GND LOGIC 15k VCC 0.1 µ RP_PB IR1 MTF0 IR MTG1 EVR 18k PCMOUT VG2 0.1µ MTOUT PCMREC MTG2 MTGSW PCMIN 10µ —19— ATFIN Application Circuit CXA1704R CXA1704R Description of Operation <Recording level adjustment + SW> After the recording level is adjusted so that the current level of the Y, chroma, AFM, ATF, and PCM signals are suitable at the head, the VIDEO + ATF and PCM + ATF signals are created and output to the CH1 and CH2 output pins with the proper timing. The Y level adjustment is made by Pin 7 (YLEVEL), the low frequency level adjustment is made by Pin 5 (LOWLEVEL), and the chroma level adjustment is made by Pin 1 (CCONT). LOWGCA for the VIDEO path and the PCM path is also adjusted accordingly. The gain values shown in the specifications are all I/O gain values. <Recording amplifier> This performs V/I conversion on the signal for which the recording level was adjusted and drives the head. Feedback damping, which is used to suppress head resonance, is performed using EVR adjustment with Pin 26 (REC1CONT) and Pin 35 (REC2CONT). Be careful to avoid capacitance coupling between the inputs and the outputs. <Head amplifier> This amplifies the playback signal from the head with low noise and high gain. Feedback damping circuit to suppress head resonance is built in; the damping can be adjusted through external resistance connected to Pin 30 (PBDUMP1) and Pin 31 (PBDUMP2). Be careful to avoid capacitance coupling between the playback system outputs and the head amplifier inputs. <Middle-frequency tuner + SW> This compensates for the frequency response of the playback signal. EVR adjustment of the center frequency is performed with Pin 17 (MTF0); of Q with Pin 24 (MTQ), and of the CH1 and CH2 boost with Pin 13 (MTG1) and Pin 15 (MTG2), respectively. The CH1 and CH2 signals are switched according to the RFSWP timing and are output to MTOUT and PCMOUT. The gain of the MTOUT signal is switched between 0 dB and 6 dB by Pin 3 (XGAIN). <RFAGC> This outputs the playback VIDEO signal at a fixed 380 mVp-p. The input has a built-in capacitor for DC cut-off and external capacitor is not required. The detector input includes an HPF with a cut-off frequency of approximately 1 MHz, so that the gain in the bandwidth corresponding roughly to the Y signal is detected. <Dropout detection> A dropout is detected in the playback video signal, and a dropout pulse is output. The detection level is set to the optimum level based on a 224 mVp-p input as a reference. —20— CXA1704R <Control logic block> In order to save power consumption, this IC is designed to reduce power supplied to those circuit blocks that are not operating. Therefore, power saving operation is executed automatically when all of the power supplies are turned on. In addition, this IC is equipped with many I/O switching circuits that must be switched with very complex timing, so that internal logic is provided to control them. The combinations of input and output in basic operations are as shown in the Control Logic Truth Table. <Reference voltage in the IC> Vreg (4.15 V) and Vg2 (2.45 V) are generated as the reference voltages used in the IC. Do not use these as external power supplies because they could cause cross talk in the IC. <EVR adjustment> The voltage applied to the EVR adjustment pin is Vcc- variable, ranging from 1.8 V to Vcc. —21— CXA1704R Recording Level Adjustment YGCA gain control LOWGCA (Video path) gain control –10 gain (dB) –20 –25 –15 –20 2 3 4 Pin 7 (YLEVEL) voltage (V) 5 –15 Pin 41 (VPSW1OUT) Pin 38 (VPSW2OUT) –10 YLEVEL=Vylev → –5 Pin 2 (AFMIN) Pin 48 (ATFIN) Pin 6 (YIN) → Pin 41 (VPSW1OUT) Pin 38 (VPSW2OUT) gain (dB) 0 –30 –35 2 –10 Pin 41 (VPSW1OUT) gain (dB) Pin 38 (VPSW2OUT) –15 –20 Pin 4 (CIN)→ gain (dB) –10 Pin 41 (VPSW1OUT) Pin 38 (VPSW2OUT) 5 CGCA gain control LOWGCA (PCM path) gain control Pin 48 (ATFIN) → 3 4 Pin 5 (LOWLEVEL) voltage (V) –25 When YLEVEL=Vylev and LOWLEV=Vllev –15 –20 –25 –30 –30 2 –35 2 3 4 Pin 5 (LOWLEVEL) voltage (V) 5 —22— 3 4 Pin 1 (CCONT) voltage (V) 5 CXA1704R Middle-frequency tuner fo control Middle-frequency tuner Q control 15 6 5 4 Q fo (MHz) 10 3 2 5 1 0 0 2 3 4 Pin 17 (MYF0) voltage (V) 5 2 Middle-frequency tuner boost control 20 15 Boost (dB) 10 5 0 2 3 4 Pins 13 and 15 (MTG1, MTG2) voltage (V) 5 —23— 3 4 Pin 24 (MTQ) voltage (V) 5 CXA1704R Unit : mm 48PIN LQFP (PLASTIC) 9.0 ± 0.2 ∗ 7.0 ± 0.1 36 25 A 13 48 (0.22) 0.5 ± 0.2 (8.0) 24 37 12 1 + 0.05 0.127 – 0.02 0.5 ± 0.08 + 0.2 1.5 – 0.1 + 0.08 0.18 – 0.03 0.1 0.1 ± 0.1 0° to 10° 0.5 ± 0.2 Package Outline NOTE: Dimension “∗” does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY / PHENOL RESIN SOLDER PLATING SONY CODE LQFP-48P-L01 LEAD TREATMENT EIAJ CODE ∗QFP048-P-0707-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 0.2g JEDEC CODE —24—