Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/74FCT374T CY54/74FCT574T 8-Bit Registers SCCS022 - May 1994 - Revised February 2000 Features • • • • • Matched rise and fall times Fully compatible with TTL input and output logic levels ESD > 2000V Extended commercial range of −40˚C to +85˚C Sink Current 64 mA (Com’l), 32 mA (Mil) Source Current 32 mA (Com’l), 12 mA (Mil) • Edge-triggered D-type inputs • 250 MHz typical toggle rate • Function, pinout, and drive compatible with FCT and F logic • FCT-C speed at 5.2 ns max. (Com’l) FCT-A speed at 6.5 ns max. (Com’l) • Reduced VOH (typically = 3.3V) versions of equivalent FCT functions • Edge-rate control circuitry for significantly improved noise characteristics • Power-off disable feature 1CY54/74FCT574T Logic Block Diagram D0 D1 D2 D3 D4 D5 D6 D7 CP CP D CP D CP D CP D CP D CP D CP D Q Q Q Q Q Q Q O0 O1 O2 O3 O4 O5 O6 CP D Q OE O7 FCT374T–6 Pin Configurations DIP/SOIC/QSOP Top View D0 O0 OE VCC O7 VCC 19 O7 D0 3 18 D7 D1 4 17 D6 D7 O1 5 16 O6 O2 6 15 O5 D2 7 14 D5 GND CP O7 D3 8 13 D4 O6 O3 9 12 O4 GND 10 11 CP FCT374T FCT374T–1 7 6 5 4 8 9 10 11 D4 D3 D2 20 2 D5 1 O0 D6 OE 3 2 1 20 19 FCT574T 12 13 1 20 D0 2 19 O0 D1 3 18 O1 17 O2 16 O3 VCC D2 4 D3 5 D4 6 15 O4 D5 7 14 O5 O0 D6 8 13 O6 D7 9 12 O7 GND 10 11 CP 14 1516 17 18 FCT374T–2 OE D0 OE VCC D1 O3 O2 O1 D5 O5 D4 3 2 FCT374T 1 12 20 13 19 14 1516 17 18 O6 D6 D7 GND CP O4 7 6 5 4 9 10 11 DIP/SOIC/QSOP Top View LCC Top View O5 O4 8 O3 D2 O2 O1 D1 D3 LCC Top View FCT374T–3 FCT574T FCT374T–4 Logic Symbol D0 CP OE O0 D1 D2 D3 D4 D5 D6 D7 O1 O2 O3 O4 O5 O6 O7 FCT374T–5 Copyright © 2000, Texas Instruments Incorporated CY54/74FCT374T CY54/74FCT574T Functional Description Maximum Ratings[2, 3] The FCT374T and FCT574T are high-speed low-power octal D-type flip-flops featuring separate D-type inputs for each flip-flop. Both devices have three-state outputs for bus oriented applications. A buffered clock (CP) and output enable (OE) are common to all flip-flops. The FCT574T is identical to FCT374T except for flow-through pinout to simplify board design. The eight flip-flops contained in the FCT374T and FCT574T will store the state of their individual D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. When OE is LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs will be in the high-impedance state. The state of output enable does not affect the state of the flip-flops. The outputs are designed with a power-off disable feature to allow for live insertion of boards. (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................. -65°C to +150°C Ambient Temperature with Power Applied............................................. –65°C to +135°C Supply Voltage to Ground Potential ............... –0.5V to +7.0V DC Input Voltage ........................................... –0.5V to +7.0V DC Output Voltage......................................... –0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin) ...... 120 mA Power Dissipation .......................................................... 0.5W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Function Table[1] Operating Range Inputs D Outputs O Range H L H Commercial T, AT, CT –40°C to +85°C 5V ± 5% L L L Military[4] All –55°C to +125°C 5V ± 10% H Z X Range Ambient Temperature OE X CP VCC Electrical Characteristics Over the Operating Range Parameter VOH VOL Description Output HIGH Voltage Output LOW Voltage Test Conditions Min. Typ.[5] Max. Unit VCC=Min., IOH=–32 mA Com’l 2.0 VCC=Min., IOH=–15 mA Com’l 2.4 3.3 V V VCC=Min., IOH=–12 mA Mil 2.4 3.3 V VCC=Min., IOL=64 mA Com’l 0.3 0.55 V VCC=Min., IOL=32 mA Mil 0.3 0.55 V VIH Input HIGH Voltage 2.0 V VIL Input LOW Voltage VH Hysteresis[6] All inputs 0.2 VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 II Input HIGH Current IIH Input HIGH Current IIL 0.8 V V –1.2 V VCC=Max., VIN=VCC 5 µA VCC=Max., VIN=2.7V ±1 µA Input LOW Current VCC=Max., VIN=0.5V ±1 µA IOZH Off State HIGH-Level Output Current VCC = Max., VOUT = 2.7V 10 µA IOZL Off State LOW-Level Output Current VCC = Max., VOUT = 0.5V –10 µA IOS Output Short Circuit Current[7] VCC=Max., VOUT=0.0V –225 mA –60 –120 Power-Off Disable VCC=0V, VOUT=4.5V ±1 µA Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level X = Don’t Care Z = HIGH Impedance = LOW-to-HIGH clock transition 2. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. TA is the “instant on” case temperature. 5. Typical values are at VCC=5.0V, TA=+25˚C ambient. 6. This parameter is specified but not tested. 7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameters tests. In any sequence of parameter tests, IOS tests should be performed last. IOFF 2 CY54/74FCT374T CY54/74FCT574T Capacitance[2] Parameter Description Typ.[5] Max. Unit CIN Input Capacitance 5 10 pF COUT Output Capacitance 9 12 pF Power Supply Characteristics Parameter Description Test Conditions Typ.[5] Max. Unit ICC Quiescent Power Supply Current VCC=Max., VIN≤0.2V, VIN≥VCC–0.2V 0.1 0.2 mA ∆ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max., VIN=3.4V,[8] f1=0, Outputs Open 0.5 2.0 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Bit Toggling, 50% Duty Cycle, Outputs Open, OE=GND, VIN≤0.2V or VIN≥VCC–0.2V 0.06 0.12 mA/MHz IC Total Power Supply Current[10] VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, OE=GND, VIN≤0.2V or VIN≥VCC–0.2V 0.7 1.4 mA VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, OE=GND, VIN=3.4V or VIN=GND 1.2 3.4 mA VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, OE=GND, VIN≤0.2V or VIN≥VCC–0.2V 1.6 3.2[11] mA VCC=Max., f0=10 MHz, 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, OE=GND, VIN=3.4V or VIN=GND 3.9 12.2[11] mA Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 10. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 N1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 3 CY54/74FCT374T CY54/74FCT574T Switching Characteristics[12] Over the Operating Range FCT374T/FCT574T Military Parameter Description FCT374AT/FCT574AT Commercial Military Commercial Min. Max. Min. Max. Min. Max. Min. Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay Clock to Output 2.0 11.0 2.0 10.0 2.0 7.2 2.0 6.5 ns 1, 5 tPZH tPZL Output Enable Time 1.5 14.0 1.5 12.5 1.5 7.5 1.5 6.5 ns 1, 7, 8 tPHZ tPLZ Output Disable Time 1.5 8.0 1.5 8.0 1.5 6.5 1.5 5.5 ns 1, 7, 8 tS Set–Up Time HIGH or LOW D to CP 2.0 2.0 2.0 2.0 ns 4 tH Hold Time HIGH or LOW D to CP 1.5 1.5 1.5 1.5 ns 4 tW Clock Pulse Width[14] HIGH or LOW 7.0 7.0 6.0 5.0 ns 5 FCT374CT/FCT574CT Military Parameter Description Commercial Min. Max. Min. Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay Clock to Output 2.0 6.2 2.0 5.2 ns 1, 5 tPZH tPZL Output Enable Time 1.5 6.2 1.5 5.5 ns 1, 7, 8 tPHZ tPLZ Output Disable Time 1.5 5.7 1.5 5.0 ns 1, 7, 8 tS Set-Up Time, HIGH or LOW D to CP 2.0 2.0 ns 4 tH Hold Time, HIGH or LOW D to CP 1.5 1.5 ns 4 tW Clock Pulse Width[14] HIGH or LOW 6.0 5.0 ns 5 Notes: 12. Minimum limits are specified but not tested on Propagation Delays. 13. See “Parameter Measurement Information” in the General Information section. 14. With one data channel toggling, tW(L)=tW(H)=4.0 ns and tr=tf=1.0 ns. 4 CY54/74FCT374T CY54/74FCT574T Ordering Information—FCT374T Speed (ns) 5.2 6.2 6.5 7.2 10.0 11.0 Ordering Code CY74FCT374CTQCT Package Name Package Type Q5 20-Lead (150-Mil) QSOP CY74FCT374CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT374CTDMB D6 20-Lead (300-Mil) CerDIP CY54FCT374CTLMB L61 20-Pin Square Leadless Chip Carrier CY74FCT374ATPC P5 20-Lead (300-Mil) Molded DIP CY74FCT374ATQCT Q5 20-Lead (150-Mil) QSOP CY74FCT374ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT374ATLMB L61 20-Pin Square Leadless Chip Carrier CY54FCT374ATDMB D6 20-Lead (300-Mil) CerDIP CY74FCT374TQCT Q5 20-Lead (150-Mil) QSOP CY74FCT374TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT374TDMB D6 20-Lead (300-Mil) CerDIP CY54FCT374TLMB L61 20-Pin Square Leadless Chip Carrier Operating Range Commercial Military Commercial Military Commercial Military Ordering Information—FCT574T Speed (ns) 5.2 Ordering Code Package Name Package Type CY74FCT574CTQCT Q5 20-Lead (150-Mil) QSOP CY74FCT574CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Operating Range Commercial 6.2 CY54FCT574CTDMB D6 20-Lead (300-Mil) CerDIP Military 6.5 CY74FCT574ATQCT Q5 20-Lead (150-Mil) QSOP Commercial CY74FCT574ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT574ATDMB D6 20-Lead (300-Mil) CerDIP CY54FCT574ATLMB L61 20-Pin Square Leadless Chip Carrier CY74FCT574TQCT Q5 20-Lead (150-Mil) QSOP CY74FCT574TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC 7.2 10.0 Document #: 38-00278-B 5 Military Commercial CY54/74FCT374T CY54/74FCT574T Package Diagrams 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D- 8Config.A 20-Pin Square Leadless Chip Carrier L61 MIL-STD-1835 C-2A 6 CY54/74FCT374T CY54/74FCT574T Package Diagrams (continued) 20-Lead (300-Mil) Molded DIP P5 20-Lead Quarter Size Outline Q5 7 CY54/74FCT374T CY54/74FCT574T Package Diagrams (continued) 20-Lead (300-Mil) Molded SOIC S5 8 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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