ETC DG200AK/883

DG200A
Vishay Siliconix
Monolithic Dual SPST CMOS Analog Switch
Wide Dynamic Range
Simple Interfacing
Reduced External Component
Count
15 V Input Signal Range
44-V Maximum Supply Ranges
On-Resistance: 45 TTL and CMOS Compatibility
Servo Control Switching
Programmable Gain Amplifiers
Audio Switching
Programmable Filters
The DG200A is a dual, single-pole, single-throw analog switch
designed to provide general purpose switching of analog
signals. This device is ideally suited for designs requiring a
wide analog voltage range coupled with low on-resistance.
Each switch conducts equally well in both directions when on,
and blocks up to 30 V peak-to-peak when off. In the on
condition, this bi-directional switch introduces no offset voltage
of its own.
The DG200A is designed on Vishay Siliconix’ improved
PLUS-40 CMOS process. An epitaxial layer prevents latchup.
Dual-In-Line
Metal Can
IN2
1
14
IN1
V+ (Substrate and Case)
NC
2
13
NC
GND
3
12
V+ Substrate
NC
4
11
NC
S2
5
10
S1
D2
6
9
D1
V–
7
8
IN1
1
IN2
GND
9
2
8
7
3
4
NC
S1
10
S2
D1
NC
6
5
V–
D2
Top View
Top View
Logic
Switch
0
ON
1
OFF
Logic
g “0” 0.8 V
Logic “1” 2.4
24V
Document Number: 70035
S-00399—Rev. D, 13-Sep-99
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DG200A
Vishay Siliconix
ORDERING INFORMATION
Temp Range
Package
Part Number
0 to 70_C
14-Pin Plastic DIP
DG200ACJ
14-Pin CerDIP
DG200ABK
10-Pin Metal Can
DG200ABA
–25 to 85_C
DG200AAK
14 Pi CerDIP
14-Pin
C DIP
55 to 125
C
–55
125_C
DG200AAK/883, JM38510/12301BCA,
5962-9562901QCA
DG200AAA
10-Pin Metal Can
DG200AAA/883, JM38510/12301BIC
14-Pin Sidebraze
JM38510/12301BCC
ABSOLUTE MAXIMUM RATINGS
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
GND to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
Digital Inputsa, VS, VD . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V or
30 mA, whichever occurs first
Current (Any Terminal) Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Current S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Storage Temperature
(AX, BX Suffix) . . . . . . . . . . . . . . –65 to 150_C
(CJ Suffix) . . . . . . . . . . . . . . . . . . –65 to 125_C
Power Dissipation (Package)b
10-Pin Metal Canc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
14-Pin CerDIPd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
14-Pin Plastic DIPe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
d. Derate 11 mW/_C above 75_C
e. Derate 6.5 mW/_C above 25_C
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
V–
–
+
V+
GND
INX
D
V–
FIGURE 1.
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Document Number: 70035
S-00399—Rev. D, 13-Sep-99
DG200A
Vishay Siliconix
A Suffix
Test Conditions
Unless Otherwise Specified
B, C Suffix
–55 to 125_C
V+ = 15 V, V– = –15 V
VIN = 2.4 V, 0.8 Vf
Tempb
VANALOG
Full
rDS(on)
VD = 10 V, IS = –1 mA
Room
Full
45
Source Off
Leakage Current
IS(off)
VS = 14 V, VD = 14 V
Room
Full
0.01
–2
–100
2
100
–5
–100
5
100
Drain Off
Leakage Current
ID(off)
VD = 14 V, VS = 14 V
Room
Full
0.01
–2
–100
2
100
–5
–100
5
100
Channel On
Leakage Currentf
ID(on)
VS = VD = 14 V
Room
Full
0.1
–2
–200
2
200
–5
–200
5
200
VIN = 2.4 V
Room
Full
0.0009
–0.5
–1
VIN = 15 V
Room
Full
0.005
VIN = 0 V
Room
Full
–0.0015
Room
440
1000
1000
Room
340
425
425
Room
–10
VS = 0 V
Room
9
VD = 0 V
Room
9
Room
25
Room
75
Room
90
Room
0.8
Room
–0.23
Parameter
Symbol
Typc
Mind
Maxd
Mind
Maxd
Unit
–15
15
–15
15
V
80
100
W
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
70
100
nA
A
Digital Control
p Current with
Input
Input
High
I
t Voltage
V lt
Hi h
IINH
Input Current with
Input Voltage Low
IINL
–1
–10
0.5
1
–0.5
–1
1
10
mA
A
–1
–10
Dynamic Characteristics
Turn-On Time
Turn-Off Time
Charge Injection
Source-Off Capacitance
Drain-Off Capacitance
Channel-On Capacitance
tON
See Switching Time Test Circuit
tOFF
Q
CS(off)
CD(off)
CD(on) +
CS(On)
Off Isolation
OIRR
Crosstalk
(Channel-to-Channel)
XTALK
CL = 1000 pF, Vg = 0 V
Rg = 0 W
f = 140 kHz
VIN = 5 V
VD = VS = 0 V, VIN = 0 V
VIN = 5 V, RL = 75 W
VS = 2 V, f = 1 MHz
ns
pC
pF
F
dB
Power Supplies
Positive Supply Current
I+
Negative Supply Current
I–
Both Channels On or Off
VIN = 0 V and
d2
2.4
4V
2
2
mA
–1
–1
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is aminimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
VIN = input voltage to perform proper function.
Document Number: 70035
S-00399—Rev. D, 13-Sep-99
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DG200A
Vishay Siliconix
_ rDS(on) vs. VD and Power Supply Voltage
Leakage Currents vs. Analog Voltage
+6
TA = 25_C
ID(off) or IS(off)
0
A
I S, I D (pA)
100
r DS(on) ( )
5 V
10 V
12 V
15 V
20 V
A:
B:
C:
D:
E:
120
80
B
60
ID(on)
–6
–12
C
D
40
–18
E
–24
20
–15 –12
–9
–6
0
–3
3
6
9
12
15
–15 –12
VD – Drain Voltage (V)
V T (V)
1.5
1.0
0.5
0
0
5
10
15
V+, V– Positive and Negative Supplies (V)
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–3
0
3
6
9
12
15
20
Supply Currents vs. Toggle Frequency
V+ = 15 V
V– = –15 V
Both logic inputs
toggled simutaneously
6
5
I+, I– (mA)
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
2.0
–6
VANALOG – Analog Voltage (V)
Input Switching Threshold vs. V+ and V– Supply Voltages
2.5
–9
4
3
2
I+
1
I–
0
1k
10 k
100 k
1M
Toggle Frequency (Hz)
Document Number: 70035
S-00399—Rev. D, 13-Sep-99
DG200A
Vishay Siliconix
VO is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
+15 V
Logic
Input
Switch
Input
3V
V+
tr <20 ns
tf <20 ns
50%
0V
VS = +5 V
tOFF
VO
IN
VS
V–
GND
CL
35 pF
RL
1 kW
3V
90%
Switch
Output
D
S
VO
tON
–15 V
RL
VO = VS
RL + rDS(on)
FIGURE 2. Switching Time
+15 V
DVO
VO
V+
Rg
S
D
VO
CL
1000 pF
IN
Vg
3V
ON
INX
OFF
ON
V–
GND
DVO = measured voltage error due to charge injection
The charge injection in coulombs is DQ = CL x DVO
–15 V
FIGURE 3. Charge Injection
+15 V
C
+15 V
V+
C
V+
S
VS
S1
VS
VO
D
Rg = 50 W
D1
50 W
IN1
0V
Rg = 50 W
5V
RL
IN
GND
V–
C
NC
0V
S2
VO
D2
RL
IN2
GND
V–
C
–15 V
–15 V
Off Isolation = 20 log
VS
VO
XTALK = 20 log
VS
VO
C = RF bypass
FIGURE 4. Off Isolation
Document Number: 70035
S-00399—Rev. D, 13-Sep-99
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FIGURE 5. Channel-to-Channel Crosstalk
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