BUS IC DC/DC CONVERTER MOTOR DRIVER IC RIPPLE COUNTER DRIVER IC I/O IC SENSOR IC SENSOR INTERFACE IC Analog multiplexer 8:1 Contact monitor 8 * to GND, par. out Contact monitor 8 * to VBAT, par. out Contact monitor 2 * 4, adj., par. out Contact monitor 2 * 4, par. out Non volatile contact monitor ÿ Contact monitor 16 *, ser. out ÿ Contact monitor to GND or VBAT (16 channel, serial interface) FEATURES E910.52 DESCRIPTION PINNING ÿ Supply range VDD 3.8V to 6V The IC is intended to reduce the costs of products with a large ÿ Supply range VS 5.5V to 18V number of inputs and also to reduce software overhead by gen- ÿ Maximum over voltage protection up to 45V erating an interrupt on pin change. To decrease the system power ÿ Low standby current (typical < 100µA) dissipation the external driver transistors are only active for 20µs ÿ Parallel to serial interface of a 7ms frame corresponding to 140 Hz polling frequency. ÿ High noise immunity ÿ Contact status monitoring by comparison to All inputs compare with the internal reference, will be debounced internal reference and can be monitored by the SPI. Additionally the inputs IN15 and Interrupt request generated on debounced IN14 are available on their outputs D15 and D14 directly without pin change debouncing. ÿ PACKAGE Pin Name 1 DATA0 2 DATA1 3 DATA2 Logic level output of the input IN15 4-11 IN0-7 Input 0-7 12 GND Ground 13 TEST Test, connect to ground 14 VS Analog supply voltage 15 TB1 Control signal of the external PNP transistor (T1) TB2 Control signal of the external NPN transistor (T2) ÿ Filtering of all inputs 16 ÿ – 40°C to + 105°C operating temperature 17 IRQ ÿ SO28w package 18-25 IN15-8 26 CS 27 CK 28 VDD APPLICATION ÿ Automotive electronics ÿ Monitor for mechanical switches ÿ Monitor for voltage levels BLOCK DIAGRAM VBAT Description Tristate output – serial transmission of the inputs IN0-15 in normal mode Logic level output of the input IN14 Informs the µC about a change of the input state (open drain) DATA0 1 28 DATA1 2 27 DATA2 3 26 IN0 4 25 IN1 5 24 IN2 6 23 IN3 7 22 IN4 8 21 IN5 9 20 IN6 10 19 IN7 11 18 GND 12 17 TEST 13 16 VS 14 15 VDD CK CS IN8 IN9 IN10 IN11 IN12 IN13 IN14 IN15 IRQ TB2 TB1 Input 15-8 Modus signal CS=0 : “stand-by” mode, CS=1: normal mode Clock used for the parallel load and serial transmission of the inputs Logic supply voltage VS VDD VDD VS TB1 CH15 IN0 D15 VS CH0 D14 + Ref. _ µC Ctrl (debounce, wakeup, IRQ) IN15 D0 SPI TB2 76 IRQ CLK CS Note ELMOS Semiconductor AG (below ELMOS) reserves the right to make changes to the product contained in this publication without notice. ELMOS assumes no responsibility for the use of any circuits described herein, conveys no licence under any patent or other right, and makes no representation that the circuits are free of patent infringement. While the information in this publication has been checked, no responsibility, however, is assumed for inaccuracies. ELMOS does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of a life-support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications. Copyright © 2005 ELMOS Reproduction, in part or whole, without the prior written consent of ELMOS, is prohibited. www.elmos.de | [email protected] elmos product catalog june 2005 77