FDMS7620S Dual N-Channel PowerTrench® MOSFET Q1: 30 V, 10.1 A, 20.0 mΩ Q2: 30 V, 12.4 A, 11.2 mΩ Features Q1: N-Channel General Description Max rDS(on) = 20.0 mΩ at VGS = 10 V, ID = 10.1 A This device includes two specialized MOSFETs in a unique dual Max rDS(on) = 30.0 mΩ at VGS = 4.5 V, ID = 7.5 A Power 56 package. It is designed to provide an optimal synchro- Q2: N-Channel nous buck power stage in terms of efficiency and PCB utilization. Max rDS(on) = 11.2 mΩ at VGS = 10 V, ID = 12.4 A The low switching loss “High Side” MOSFET is complementory Max rDS(on) = 14.2 mΩ at VGS = 4.5 V, ID = 10.9 A by a low conduction loss “Low Side” SyncFET. Pinout optimized for simple PCB design Applications Thermally efficient dual Power 56 Package Synchronous Buck Converter for: RoHS Compliant Notebook System Power General Purpose Point of Load S2 S2 S2 5 G2 S1/D2 D1 D1 D1 D1 G1 Bottom Top Pin1 Q2 4 6 3 7 2 8 1 Q1 Power 56 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID TJ, TSTG Units V V (Note 3) ±20 ±20 TC = 25 °C 13 22 -Continuous (Silicon limited) TC = 25 °C 26 42 -Continuous TA = 25 °C 10.1 12.4 -Pulsed PD Q2 30 -Continuous (Package limited) Single Pulse Avalanche Energy EAS Q1 30 (Note 4) 27 45 9 21 mJ Power Dissipation for Single Operation TA = 25°C 2.21a 2.51b Power Dissipation for Single Operation TA = 25°C 1.01c 1.01d Operating and Storage Junction Temperature Range A -55 to +150 W °C Thermal Characteristics RθJA RθJA Thermal Resistance, Junction to Ambient 571a 501b Thermal Resistance, Junction to Ambient 1251c 1201d °C/W Package Marking and Ordering Information Device Marking FDMS7620S Device FDMS7620S ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 Package Power 56 1 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET March 2011 Symbol Parameter Test Conditions Type Min 30 30 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ID = 1 mA, VGS = 0 V Q1 Q2 ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25°C ID = 10 mA, referenced to 25°C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1 Q2 1 500 μA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V Q1 Q2 100 100 nA nA 3.0 3.0 V V 19 19 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA VGS = VDS, ID = 1 mA Q1 Q2 ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25°C ID = 10 mA, referenced to 25°C Q1 Q2 -6 -5 VGS = 10 V, ID = 10.1 A VGS = 4.5 V, ID = 7.5 A VGS = 10 V, ID = 10 A, TJ = 125°C Q1 15.2 22.7 18.7 20.0 30.0 22.5 VGS = 10 V, ID = 12.4 A VGS = 4.5 V, ID = 10.9 A VGS = 10 V, ID = 12.4 A, TJ = 125°C Q2 8.3 10.5 8.9 11.2 14.2 15.1 VDD = 5 V, ID = 10.1 A VDD = 5 V, ID = 12.4 A Q1 Q2 22 53 Q1 Q2 457 1050 608 1400 pF Q1 Q2 167 358 222 477 pF 22 35 31 49 pF 1.6 1.2 4.4 3.5 Ω Q1 Q2 5.2 6.6 10 14 ns Q1 Q2 1.2 1.8 10 10 ns Q1 Q2 11.9 17.4 22 32 ns Q1 Q2 1.4 1.5 10 10 ns Q1 Q2 7.2 15.6 11 23 nC Q1 Q2 3.8 7.9 6 12 nC Q1 Q2 1.6 3.2 nC Q1 Q2 1.1 1.6 nC rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 1.0 1.0 2.2 2.0 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Q1 Q2 Rg Gate Resistance Q1 Q2 VDS = 15 V, VGS = 0 V, f = 1 MHZ 0.2 0.2 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge VGS = 0V to 10 V Qg(TOT) Total Gate Charge VGS = 0V to 5 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 Q1 VDD = 15 V, ID = 10.1 A, RGEN = 6 Ω Q2 VDD = 15 V, ID = 12.4 A, RGEN = 6 Ω Q1 VDD = 15 V, ID = 10.1 A Q2 VDD = 15 V, ID = 12.4 A 2 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q2 0.90 0.83 1.2 1.2 V Q1 Q2 16 18 28 32 ns Q1 Q2 4 13 10 23 nC Drain-Source Diode Characteristics VSD Source-Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 10.1 A VGS = 0 V, IS = 12.4 A (Note 2) (Note 2) Q1 IF = 10.1 A, di/dt = 100 A/s Q2 IF = 12.4 A, di/dt = 300 A/s Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper a. 57 °C/W when mounted on a 1 in2 pad of 2 oz copper d. 120 °C/W when mounted on a minimum pad of 2 oz copper c. 125 °C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied. 4. Q1: EAS of 9 mJ is based on starting TJ = 25 oC, L = 0.3 mH, IAS = 8 A, VDD = 27 V, VGS = 10 V. 100% test at L = 3 mH, IAS = 2.0 A, VDD = 0 V, VGS = 15 V. Q2: EAS of 21 mJ is based on starting TJ = 25 oC, L = 0.3 mH, IAS = 12 A, VDD = 27 V, VGS = 10 V. 100% test at L = 3 mH, IAS = 3.2A, VDD = 0 V,VGS = 15 V.. ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 3 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted 27 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6 VGS = 4.5 V 24 VGS = 10 V 21 VGS = 6 V 18 VGS = 4 V 15 12 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 9 6 3 VGS = 3.5 V 0 0.0 0.5 1.0 1.5 2.0 2.5 4 VGS = 4 V 3 VGS = 4.5 V 2 1 0 3.0 0 3 6 rDS(on), DRAIN TO 1.2 1.0 0.8 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 15 18 21 24 27 60 ID = 10.1 A VGS = 10 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 50 ID = 10.1 A 40 30 TJ = 125 oC 20 TJ = 25 oC 10 0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 3 4 5 6 7 8 9 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage 30 IS, REVERSE DRAIN CURRENT (A) 27 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 24 ID, DRAIN CURRENT (A) 12 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 -50 9 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics 0.6 -75 VGS = 10 V VGS = 6 V VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 3.5 V 5 21 VDS = 5 V 18 TJ = 150 oC 15 12 TJ = 25 oC 9 TJ = -55 oC 6 3 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 5.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 VGS = 0 V 10 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 4 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 1000 ID = 10.1 A 8 Ciss CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 10 V 6 VDD = 15 V 4 VDD = 20 V Coss 100 Crss 2 f = 1 MHz VGS = 0 V 0 0 2 4 6 10 0.1 8 1 Figure 7. Gate Charge Characteristics 30 Figure 8. Capacitance vs Drain to Source Voltage 50 10 ID, DRAIN CURRENT (A) 20 IAS, AVALANCHE CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) TJ = 25 oC TJ = 100 oC TJ = 125 oC 10 100 μs 1 ms 1 THIS AREA IS LIMITED BY rDS(on) 0.1 10 ms 100 ms SINGLE PULSE TJ = MAX RATED 1s 10s o RθJA = 125 C/W DC o TA = 25 C 1 0.001 0.01 0.1 1 0.01 0.01 10 0.1 1 10 100200 VDS, DRAIN to SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (ms) Figure 9. Unclamped Inductive Switching Capability Figure 10. Forward Bias Safe Operating Area P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 125 C/W 100 10 1 0.1 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 5 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 SINGLE PULSE t2 o RθJA = 125 C/W 0.001 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA (Note 1b) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 6 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 6 VGS = 10 V VGS = 6 V 36 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 45 VGS = 4.5 V VGS = 4 V 27 VGS = 3.5 V 18 9 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 3.5 V 4 VGS = 4 V 2 VGS = 4.5 V 0 2.0 0 9 Figure 13. On-Region Characteristics 27 36 45 Figure 14. Normalized on-Resistance vs Drain Current and Gate Voltage 1.6 28 ID = 12.4 A VGS = 10 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.6 -75 -50 -25 0 25 50 75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) ID = 12.4 A 20 16 TJ = 125 oC 12 8 TJ = 25 oC 4 100 125 150 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 24 2 TJ, JUNCTION TEMPERATURE (oC) IS, REVERSE DRAIN CURRENT (A) 36 TJ = 125 oC 27 TJ = 25 oC 18 TJ = -55 oC 9 2.0 2.5 3.0 3.5 10 VGS = 0 V 10 TJ = 125 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 4.0 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 17. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 8 50 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 1.5 6 Figure 16. On-Resistance vs Gate to Source Voltage 45 VDS = 5 V 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 15. Normalized On-Resistance vs Junction Temperature ID, DRAIN CURRENT (A) 18 VGS = 6 V Figure 18. Source to Drain Diode Forward Voltage vs Source Current 7 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted 3000 ID = 12.4 A 1000 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 10 V 6 VDD = 15 V 4 VDD = 20 V Coss 100 2 Crss f = 1 MHz VGS = 0 V 0 0 5 10 15 10 0.1 20 1 30 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 20. Capacitance vs Drain to Source Voltage Figure 19. Gate Charge Characteristics 70 10 TJ ID, DRAIN CURRENT (A) 30 IAS, AVALANCHE CURRENT (A) Ciss = 25 oC TJ = 100 oC TJ = 125 oC 10 100 μs 1 ms 1 0.1 THIS AREA IS LIMITED BY rDS(on) 10 ms 100 ms SINGLE PULSE TJ = MAX RATED 1s 10s o RθJA = 120 C/W DC o TA = 25 C 1 0.001 0.01 0.1 1 10 0.01 0.01 30 0.1 1 10 100200 VDS, DRAIN to SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (ms) Figure 22. Forward Bias Safe Operating Area Figure 21. Unclamped Inductive Switching Capability P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 120 C/W 100 10 1 0.1 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 23. Single Pulse Maximum Power Dissipation ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 8 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 SINGLE PULSE 0.01 t2 o NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA RθJA = 120 C/W (Note 1b) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 24. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 9 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted SyncFET Schottky body diode Characteristics Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 26 shows the reverse recovery characteristic of the FDMS7620S. 15 IDSS, REVERSE LEAKAGE CURRENT (A) -2 CURRENT (A) 10 di/dt = 300 A/μs 5 0 -5 0 50 100 150 200 TIME (ns) TJ = 125 oC -3 10 TJ = 100 oC -4 10 -5 TJ = 25 oC 10 -6 10 0 5 10 15 20 25 30 VDS, REVERSE VOLTAGE (V) Figure 26. SyncFET body diode reverse leakage versus drain-source voltage Figure 25. FDMS7620S SyncFET body diode reverse recovery characteristic ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 10 10 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (continued) FDMS7620S Dual N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout 5.0 0 .1 0 C A 1 .2 7 B 2X 8 0.65 TYP 7 6 5 0.40 0 .6 3 0.25 0 2.67 6 .0 0.66 6.30 0.54 0 .9 2 PIN#1 QUADRANT 0.10 C 2 1 2X TOP VIEW 0 .6 5 (5X) 3 4 4 .0 0 RECOMMENDED LAND PATTERN (OPTION 1 - FUSED LEADS 5,6,7) 1.27 8 0.10 C 0.65 TYP 7 6 5 0.40 0 .6 3 0 .8 0 MAX (0.20 ) 0.08 C SIDE VIEW 0.05 0.00 SEATING PL ANE 2.67 0.66 6.30 0.54 0 .9 2 1 2 3.85 3.75 3 0.48 0.38 (5X) 4 1 PIN #1 IDENT 2 4 .0 0 3 4 RECOMMENDED LAND PATTERN (OPTION 2 - ISOLATED LEADS) 0.97 0.87 0.66 0.55 2 .7 2 2 .6 2 0.45 0.340 4 X 0.56 (5 X) 0.46 0.10 C A B 0.05 C 8 7 6 1.27 5 A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION, MO-229. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14. 5M, 1994 D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY E. DRAWING FILE NAME : MKT-MLP08Prev1 0 .2 0 3.81 BOTTOM VIEW ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 11 www.fairchildsemi.com tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I53 ©2011 Fairchild Semiconductor Corporation FDMS7620S Rev.C1 12 www.fairchildsemi.com FDMS7620S Dual N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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