FPD3000SOT89 Datasheet v3.0 LOW NOISE HIGH LINEARITY PACKAGED PHEMT PACKAGE: FEATURES (1850MHZ): • • • • • • RoHS 30 dBm Output Power (P1dB) 13 dB Small-Signal Gain (SSG) 1.3 dB Noise Figure 45 dBm Output IP3 45% Power-Added Efficiency FPD3000SOT89E: RoHS compliant (Directive 2002/95/EC) 9 GENERAL DESCRIPTION: TYPICAL APPLICATIONS: The FPD3000SOT89 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT). It utilizes a 0.25 µm x 3000 µm Schottky barrier Gate, defined by high-resolution stepperbased photolithography. The double recessed Gate structure minimizes parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a range of bias conditions and i/p power levels. • • • Drivers or output stages in PCS/Cellular base station transmitter amplifiers High intercept-point LNAs WLL and WLAN systems, and other types of wireless infrastructure systems. ELECTRICAL SPECIFICATIONS: PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Power at 1dB Gain Compression P1dB VDS = 5 V; IDS = 50% IDSS 29 30 dBm Small-Signal Gain SSG VDS = 5 V; IDS = 50% IDSS 11.5 13 dB Power-Added Efficiency PAE VDS = 5 V; IDS = 50% IDSS; 45 % VDS = 5 V; IDS = 50% IDSS 1.3 dB VDS = 5 V; IDS = 25% IDSS 0.9 POUT = P1dB Noise Figure Output Third-Order Intercept Point NF IP3 (from 15 to 5 dB below P1dB) VDS = 5V; IDS = 50% IDSS Matched for optimal power 42 Matched for best IP3 45 750 930 dBm Saturated Drain-Source Current IDSS VDS = 1.3 V; VGS = 0 V 1100 mA Maximum Drain-Source Current IMAX VDS = 1.3 V; VGS ≅ +1 V 1.5 mA Transconductance GM VDS = 1.3 V; VGS = 0 V 800 mS Gate-Source Leakage Current IGSO VGS = -5 V 2 20 µA Pinch-Off Voltage |VP| VDS = 1.3 V; IDS = 3 mA 0.7 1.0 1.3 V Gate-Source Breakdown Voltage |VBDGS| IGS = 3 mA 12 16 V Gate-Drain Breakdown Voltage |VBDGD| IGD = 3 mA 12 16 V Thermal Resistance RθJC 35 °C/W Note: TAMBIENT = 22°; RF specification measured at f = 1850 MHz using CW signal (except as noted) 1 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com FPD3000SOT89 Datasheet v3.0 1 ABSOLUTE MAXIMUM RATING : PARAMETER SYMBOL TEST CONDITIONS ABSOLUTE MAXIMUM Drain-Source Voltage VDS -3V < VGS < -0.5V 8V Gate-Source Voltage VGS 0V < VDS < +8V -3V Drain-Source Current IDS For VDS < 2V IDss Gate Current IG Forward or reverse current 30mA PIN Under any acceptable bias state 600mW Channel Operating Temperature TCH Under any acceptable bias state 175°C Storage Temperature TSTG Non-Operating Storage -40°C to 150°C Total Power Dissipation PTOT See De-Rating Note below 3.5W Comp. Under any bias conditions 5dB RF Input Power 2 Gain Compression Simultaneous Combination of Limits 3 2 or more Max. Limits Notes: 1 TAmbient = 22°C unless otherwise noted; exceeding any one of these absolute maximum ratings may cause permanent damage to the device 2 Max. RF Input Limit must be further limited if input VSWR > 2.5:1 3 Users should avoid exceeding 80% of 2 or more Limits simultaneously 4 Total Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT, where PDC: DC Bias Power, PIN: RF Input Power, POUT: RF Output Power Total Power Dissipation to be de-rated as follows above 22°C: PTOT= 3.5 - (0.028W/°C) x TPACK where TPACK= source tab lead temperature above 22°C (coefficient of de-rating formula is the Thermal Conductivity) Example: For a 65°C carrier temperature: PTOT = 3.5W – (0.028 x (65 – 22)) = 2.3W BIASING GUIDELINES: • • • Active bias circuits provide good performance stabilization over variations of operating temperature, but require a larger number of components compared to self-bias or dual-biased. Such circuits should include provisions to ensure that Gate bias is applied before Drain bias, otherwise the pHEMT may be induced to self-oscillate Dual-bias circuits are relatively simple to implement, but will require a regulated negative voltage supply for depletion-mode devices. For standard Class A operation, a 50% of IDSS bias point is recommended. A small amount of RF gain expansion prior to the onset of compression is normal for this operating point. A Class A/B Bias of 25% to 33% of IDSS to achieve better OIP3 performance is suggested. 2 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com FPD3000SOT89 Datasheet v3.0 TYPICAL TUNED RF PERFORMANCE: Drain Efficiency and PAE Power Transfer Characteristic 32.0 3.25 31.0 45% 40% 40% 35% 35% 30% 30% 25% 25% 2.75 Pout (dBm) Comp Point 30.0 28.0 1.25 27.0 0.75 17.0 19.0 21.0 Eff. 15% 10% 10% -0.25 5% 5% -0.75 23.0 0% 24.0 15.0 20% PAE 0.25 25.0 13.0 20% 15% 26.0 23.0 11.0 PAE (%) 1.75 Drain Efficiency (%) 2.25 29.0 Gain Compression, (dB) Output Power (dBm) 45% 0% 12.0 13.0 14.0 15.0 16.0 17.0 18.0 19.0 20.0 21.0 22.0 Input Power (dBm) Input Power (dBm) NOTE: Typical power and efficiency is shown above. The devices were biased nominally at VDS = 5V, IDS = 50% of IDSS, at a test frequency of 1.85 GHz. The test devices were tuned (input and output tuning) for maximum output power at 1dB gain compression. Typical Intermodulation performance VDS = 5V, IDS = 50% IDSS at f = 1.85GHz -40.00 21 -42.00 3rds (dBc) -44.00 Output Power (dBm) 19 -46.00 -48.00 17 -50.00 -52.00 15 -54.00 3rd Order IM Products (dBc) Pout (dBm) -56.00 13 -58.00 11 -60.00 0.7 1.7 2.8 3.8 4.7 5.7 6.8 7.8 8.8 9.8 Inout Power (dBm) Note: pHEMT devices have enhanced intermodulation performance. This yields OIP3 values of about P1dB + 14 dB. This IMD enhancement is affected by the quiescent bias and the matching applied to the device. 35 FPD3000SOT89 5V / 50%IDSS 30 MSG MSG 20 Mag S21 TYPICAL I-V CHARACTERISTICS: & S21 25 15 10 DC IV Curves FPD3000SOT89 5 Note: The recommended method for measuring , or any particular IDS, is to set the Drain-Source IDSS 0 voltage (VDS) 2.5 at 1.3V. This measurement 0.5 1.5 3.5 4.5 5.5 6.5 7.5point 8 equency (GHz) avoids the onset of Fr spurious self-oscillation which would normally distort the current measurement (this effect has been filtered from the I-V curves presented above). Setting the VDS > 1.3V will generally cause errors in the current measurements, even in stabilized circuits. 1.2 Drain-Source Voltage (A) 1.0 0.8 VG=-1.50V VG=-1.25V VG=-1.00V VG=-0.75V VG=-0.50V VG=-0.25V VG=0V 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Drain-Source Voltage (V) 3 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com FPD3000SOT89 Datasheet v3.0 TYPICAL OUTPUT PLANE POWER CONTOURS: (VDS = 5v, IDS = 50%IDSS) Swp Max 143 1. 0 0. 8 0. 6 Swp Max 131 1. 0 0. 8 0. 6 2. 0 2. 0 0.4 0. 3.0 3. 24dBm 25dBm 26dBm 0. 5. 0. 2 0 0. 0. 1. 8 0 0. 6 4 28dBm 0.2 10. 27dBm 2. 0 10 .0 3. 4. 5. 0 0 0 4.0 24dBm 25dBm 26dBm 27dBm 28dBm 4. 0. 29dBm0. 2 4 0 0. 8 0. 6 5.0 10.0 1. 0 10 .0 3. 4. 5. 0 0 0 2. 0 30dBm 29dBm -10.0 - 30dBm - -0.2 -5.0 - -4.0 -3.0 -0.4 - 2. 0. 0. 2. 0 0. 6 0. 8 Swp Min 1 1. 1850 MHz Contours swept with a constant input power, set so that optimum P1dB is achieved at the point of output match. Input (Source plane) Γs: 0.70 ∠ -165.5º 0.17 - j0.12 (normalized) 8.5 – j6.0 Ω Nominal IP3 performance is obtained with this input plane match, and the output plane match as shown. Swp Min 1 1. 0 900 MHz Contours swept with a constant input power, set so that optimum P1dB is achieved at the point of output match. Input (Source plane) Γs: 0.78 ∠ -147.4º 0.13 - j0.29 (normalized) 6.5 – j14.5 Ω Nominal IP3 performance is obtained with this input plane match, and the output plane match as shown. TYPICAL SCATTERING PARAMETERS (50Ω SYSTEM): FPD3000SOT89 5V / 50%IDSS 2. 0 10.0 10.0 1 GHz 5.0 10 .0 4. 5. 0 0 4.0 3. 0 0.6 2. 0 0 4. 5.0 0.4 1. 0 0.2 0. 8 0 0. 6 0 2 GHz 10.0 0. 4 3. 3 GHz 0.2 0 1.5 GHz 0.8 0. 4 5.0 2 GHz 7 GHz 4 GHz 4.0 2.50.2GHz 0. 2 6 GHz 5 GHz 3.0 3.0 4 GHz 0.4 3.5 GHz 3 GHz Swp Max 8GHz 2. 0 2.0 7 GHz 1.0 6 GHz 0.8 5 GHz 6 0. 0. 6 Swp Max 8GHz 1. 0 -10.0 -10. 0 1 GHz 2 -0. -5.0 0 -0.2 -4.0 -4 .0 0 1. 0 S22 Swp Min 0.5GHz .0 -2 -1.0 0. 8 -0.8 S11 -0 .6 .4 -0 2. 0 -3 . -3.0 -0.4 0. 6 -5. 0. 8 1.0 FPD3000SOT89 5V / 50%IDSS Swp Min 0.5GHz 4 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com FPD3000SOT89 Datasheet v3.0 S-PARAMETERS: (BIASED @ 5V, 50%IDSS) FREQ[GHz] 0.050 0.300 0.550 0.800 1.050 1.300 1.550 1.800 2.050 2.300 2.550 2.800 3.050 3.300 3.550 3.800 4.050 4.300 4.550 4.800 5.050 5.300 5.550 5.800 6.050 6.300 6.550 6.800 7.050 7.300 7.550 7.800 8.050 S11m 0.946 0.824 0.761 0.779 0.771 0.775 0.779 0.775 0.778 0.780 0.777 0.778 0.782 0.784 0.785 0.790 0.790 0.806 0.800 0.794 0.800 0.801 0.805 0.806 0.808 0.810 0.811 0.814 0.818 0.821 0.829 0.831 0.839 S11a -24.3 -97.5 -132.1 -150.7 -163.6 -173.0 178.6 171.1 164.5 158.1 152.3 146.8 142.6 137.7 133.2 129.0 124.8 120.7 115.1 111.6 107.0 102.6 98.0 93.8 89.5 85.4 81.3 77.4 73.2 69.0 64.8 60.2 55.5 S21m 36.120 19.282 12.243 8.992 7.020 5.802 4.934 4.306 3.834 3.444 3.131 2.878 2.636 2.459 2.286 2.146 2.017 1.896 1.821 1.728 1.648 1.576 1.516 1.461 1.411 1.360 1.317 1.272 1.232 1.189 1.149 1.108 1.066 S21a 159.0 120.3 103.2 91.8 84.0 76.3 70.1 63.6 57.8 52.0 46.1 40.4 34.9 29.4 24.0 18.7 13.3 9.0 3.4 -1.4 -6.7 -11.5 -16.5 -21.4 -26.2 -31.2 -36.3 -41.2 -46.3 -51.3 -56.4 -61.4 -66.3 S12m 0.006 0.027 0.037 0.043 0.048 0.054 0.059 0.064 0.069 0.074 0.080 0.085 0.088 0.093 0.097 0.101 0.105 0.106 0.113 0.117 0.121 0.123 0.128 0.132 0.136 0.139 0.143 0.146 0.151 0.153 0.157 0.159 0.160 S12a 79.8 56.8 45.6 40.5 38.3 35.9 34.7 31.7 29.8 27.5 24.3 22.1 19.1 15.6 12.7 9.6 5.7 4.5 1.5 -2.0 -5.4 -8.6 -11.8 -14.7 -18.0 -21.3 -24.6 -28.2 -31.7 -35.1 -38.8 -42.5 -46.5 S22m 0.175 0.384 0.478 0.507 0.522 0.529 0.528 0.532 0.529 0.531 0.531 0.534 0.537 0.544 0.545 0.551 0.555 0.575 0.574 0.575 0.577 0.580 0.583 0.583 0.586 0.588 0.593 0.592 0.601 0.607 0.614 0.623 0.634 S22a -145.5 -150.1 -165.4 -172.3 -179.1 176.4 171.9 167.4 163.2 158.7 154.2 149.1 143.6 138.2 132.9 127.8 123.2 118.8 113.3 109.7 105.9 102.6 98.7 95.2 91.1 86.9 82.4 77.7 73.0 68.2 63.5 59.3 55.3 5 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com FPD3000SOT89 Datasheet v3.0 PACKAGE OUTLINE: (dimensions in millimeters – mm) TAPE DIMENSIONS AND PART ORIENTATION FWYN ● Also available with horizontal part orientation ● Hub diameter = 80mm ● Devices per reel = 1000 6 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com FPD3000SOT89 Datasheet v3.0 DEVICE FOOT PRINT: APPLICATION NOTES & DESIGN DATA: Application Notes and design data including Sparameters, noise parameters and device model are available on request. RELIABILITY: A MTTF of 4.2 million hours at a channel temperature of 150°C is achieved for the process used to manufacture this device. DISCLAIMERS: This product is not designed for use in any space based or life sustaining/supporting equipment. Units in inches ORDERING INFORMATION: PREFERRED ASSEMBLY INSTRUCTIONS: This package is compatible with both lead free and leaded solder reflow processes as defined within IPC/JEDEC J-STD-020C. The maximum package temperature should not exceed 260°C. HANDLING PRECAUTIONS: To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. PART NUMBER DESCRIPTION FPD3000SOT89 Packaged pHEMT FPD3000SOT89E RoHS compliant Packaged pHEMT FPD3000SOT89(E)-BB 0.9 GHz evaluation board FPD3000SOT89(E)-BA 1.85 GHz evaluation board FPD3000SOT89(E)-BC 2.0 GHz evaluation board FPD3000SOT89(E)-BD 2.2 GHz evaluation board FPD3000SOT89(E)-BE 2.4 GHz evaluation board FPD3000SOT89(E)-BG 2.6 GHz evaluation board ESD/MSL RATING: These devices should be treated as Class 0 (0250 V) using the human body model as defined in JEDEC Standard No. 22-A114. The device has a MSL rating of Level 2. To determine this rating, preconditioning was performed to the device per, the Pb-free solder profile defined within IPC/JEDEC J-STD-020C, Moisture / Reflow sensitivity classification for non-hermatic solid state surface mount devices. 7 Tel: +44 (0) 1325 301111 Specifications subject to change without notice Filtronic Compound Semiconductors Ltd Fax: +44 (0) 1325 306177 Email: [email protected] Website: www.filtronic.com