QFET ® FQD17P06 / FQU17P06 60V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as automotive, DC/DC converters, and high efficiency switching for power management in portable and battery operated products. • • • • • • • -12A, -60V, RDS(on) = 0.135Ω @VGS = -10 V Low gate charge ( typical 21 nC) Low Crss ( typical 80 pF) Fast switching 100% avalanche tested Improved dv/dt capability RoHS Compliant S ! D ! ! G! # " ! G S I-PAK D-PAK FQD Series G D S FQU Series ! D Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQD17P06 / FQU17P06 -60 Units V -12 A - Continuous (TC = 100°C) IDM Drain Current - Pulsed (Note 1) -7.6 A -48 A VGSS Gate-Source Voltage ± 25 V EAS Single Pulsed Avalanche Energy (Note 2) 300 mJ IAR Avalanche Current (Note 1) -12 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 4.4 -7.0 2.5 mJ V/ns W 44 0.35 -55 to +150 W W/°C °C 300 °C dv/dt PD (Note 3) Power Dissipation (TC = 25°C) TJ, TSTG TL - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- Max 2.85 Units °C/W RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2009 Fairchild Semiconductor Corporation Rev. A3.January 2009 FQD17P06 / FQU17P06 January 2009 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units -60 -- -- V -- -0.06 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C IDSS IGSSF IGSSR VDS = -60 V, VGS = 0 V -- -- -1 µA VDS = -48 V, TC = 125°C -- -- -10 µA Gate-Body Leakage Current, Forward VGS = -25 V, VDS = 0 V -- -- -100 nA Gate-Body Leakage Current, Reverse VGS = 25 V, VDS = 0 V -- -- 100 nA Zero Gate Voltage Drain Current FQD17P06 / FQU17P06 Elerical Characteristics On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -2.0 -- -4.0 V RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -6.0 A -- 0.11 0.135 Ω gFS Forward Transconductance VDS = -30 V, ID = -6.0 A -- 8.7 -- S -- 690 900 pF -- 325 420 pF -- 80 105 pF ns (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = -25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -30 V, ID = -8.5 A, RG = 25 Ω (Note 4, 5) VDS = -48 V, ID = -17 A, VGS = -10 V (Note 4, 5) -- 13 35 -- 100 210 ns -- 22 55 ns -- 60 130 ns -- 21 27 nC -- 4.2 -- nC -- 10 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -12 A ISM Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -12 A Drain-Source Diode Forward Voltage -- -- -48 A -- -- -4.0 V VSD trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -17 A, dIF / dt = 100 A/µs (Note 4) -- 92 -- ns -- 0.32 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 2.4mH, IAS = -12A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ! -17A, di/dt ! 300A/µs, VDD ! BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ! 300µs, Duty cycle ! 2% 5. Essentially independent of operating temperature ©2009 Fairchild Semiconductor Corporation Rev. A3.January 2009 FQD17P06 / FQU17P06 Typical Characteristics VGS - 15.0 V - 10.0 V - 8.0 V - 7.0 V - 6.0 V - 5.5 V - 5.0 V Bottom : - 4.5 V Top : -I D, Drain Current [A] 1 10 -I D , Drain Current [A] 1 10 0 10 $ Notes : 1. 250& s Pulse Test 2. TC = 25% 150% 0 10 25% $ Notes : 1. VDS = -30V 2. 250& s Pulse Test -55% -1 -1 0 10 10 1 10 2 10 4 6 8 10 -VGS , Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.40 0.32 0.28 VGS = - 10V 0.24 0.20 VGS = - 20V 0.16 0.12 0.08 $ Note : TJ = 25% 0.04 1 10 -I DR , Reverse Drain Current [A] RDS(on) [ Ω ], Drain-Source On-Resistance 0.36 0 10 150% 25% $ Notes : 1. VGS = 0V 2. 250& s Pulse Test -1 0.00 0 10 20 30 40 50 60 10 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 -ID , Drain Current [A] -VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 2000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd 1800 Crss = Cgd 10 1600 Capacitance [pF] Coss 1200 $ Notes : Ciss 1. VGS = 0 V 2. f = 1 MHz 1000 800 600 Crss 400 200 0 -1 10 -V GS , Gate-Source Voltage [V] VDS = -30V 1400 8 VDS = -48V 6 4 2 $ Note : ID = -17 A 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2009 Fairchild Semiconductor Corporation 0 4 8 12 16 20 24 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A3. Januaary 2009 (Continued) 2.5 1.2 2.0 1.1 RDS(ON) , (Normalized) Drain-Source On-Resistance -BV DSS , (Normalized) Drain-Source Breakdown Voltage FQD17P06 / FQU17P06 Typical Characteristics 1.0 $ Notes : 1. VGS = 0 V 2. ID = -250 & A 0.9 0.8 -100 -50 0 50 100 150 1.5 1.0 $ Notes : 1. VGS = -10 V 2. ID = -6.0 A 0.5 0.0 -100 200 -50 0 o 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 12 Operation in This Area is Limited by R DS(on) 2 10 10 -I D, Drain Current [A] -I D, Drain Current [A] 100 µs 1 ms 1 10 10 ms DC 0 10 $ Notes : o 1. TC = 25 C 8 6 4 2 o 2. TJ = 150 C 3. Single Pulse -1 10 0 1 10 0 25 2 10 10 50 Figure 9. Maximum Safe Operating Area 100 125 150 Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 0 $ N o te s : 1 . Z ' J C ( t) = 2 .8 5 % / W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z ' J C ( t) 0 .2 0 .1 0 .0 5 10 0 .0 2 0 .0 1 -1 JC ( t) , T h e r m a l R e s p o n s e 75 TC, Case Temperature [%] -VDS, Drain-Source Voltage [V] PDM s i n g le p u ls e Z ' t1 10 t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2009 Fairchild Semiconductor Corporation Rev. A3. January 2009 FQD17P06 / FQU17P06 Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50K( Qg 200nF 12V -10V 300nF VDS VGS Qgs Qgd DUT -3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL t on VDD VGS RG td(on) VGS t off tr td(off) tf 10% DUT -10V VDS 90% Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS tp ID RG VDD DUT -10V tp ©2009 Fairchild Semiconductor Corporation VDD Time VDS (t) ID (t) IAS BVDSS Rev. A3. January 2009 FQD17P06 / FQU17P06 Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM di/dt IFM , Body Diode Forward Current VDS ( DUT ) VSD Body Diode Forward Voltage Drop VDD Body Diode Recovery dv/dt ©2009 Fairchild Semiconductor Corporation Rev. A3. January 2009 ©2009 Fairchild Semiconductor Corporation FQD17P06 / FQU17P06 Package Dimensions D-PAK Rev. A3.January 2009 (Continued) IPAK 2.30 ±0.20 6.60 ±0.20 5.34 ±0.20 0.76 ±0.10 2.30TYP [2.30±0.20] ©2009 Fairchild Semiconductor Corporation 0.50 ±0.10 16.10 ±0.30 6.10 ±0.20 0.70 ±0.20 (0.50) 9.30 ±0.30 MAX0.96 (4.34) 1.80 ±0.20 0.80 ±0.10 0.60 ±0.20 (0.50) 2.30TYP [2.30±0.20] 0.50 ±0.10 Rev. A3.January 2009 FQD17P06 / FQU17P06 Package Dimensions TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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