ICX285AQ Diagonal 11mm (Type 2/3) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras Description The ICX285AQ is a diagonal 11mm (Type 2/3) interline CCD solid-state image sensor with a square pixel array. High sensitivity and low smear are achieved through the adoption of EXview HAD CCD technology. Progressive scan allows all pixels' signals to be output independently within approximately 1/15 second. Also, the adoption of high frame rate readout mode supports 60 frames per second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still images without a mechanical shutter. High resolution and high color reproductively are achieved through the use of R, G, B primary color mosaic filters. This chip is suitable for image input applications such as still cameras which requires high resolution, etc. 20 pin DIP (Ceramic) Features • Progressive scan allows individual readout of the image signals from all pixels. • High horizontal and vertical resolution (both approximately 800 TV-lines) still images without a mechanical shutter • Supports high frame rate readout mode (effective 256 lines output, 60 frames/s) Pin 1 • Square pixel 2 • Aspect ratio : 4:3 • Horizontal drive frequency: 28.64MHz V • R, G, B primary color mosaic filters on chip • High sensitivity, low smear • Low dark current, excellent anti-blooming characteristics 8 • Continuous variable-speed shutter function 2 • Horizontal register: 5.0V drive 40 Pin 11 H Device Structure • Interline CCD image sensor Optical black position • Image size: Diagonal 11mm (Type 2/3) (Top View) • Total number of pixels: 1434 (H) × 1050 (V) approx. 1.50M pixels • Number of effective pixels: 1392 (H) × 1040 (V) approx. 1.45M pixels • Number of active pixels: 1360 (H) × 1024 (V) approx. 1.40M pixels • Chip size: 10.2mm (H) × 8.3mm (V) • Unit cell size: 6.45µm (H) × 6.45µm (V) • Optical black: Horizontal (H) direction: Front 2 pixels, rear 40 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels • Number of dummy bits: Horizontal 20 Vertical 3 • Substrate material: Silicon TM ∗ EXview HAD CCD is a trademark of Sony Corporation. EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of HAD (Hole-Accumulation-Diode) sensor. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E01420A27 ICX285AQ GND Vφ3 Vφ4 NC NC Vφ2B NC Vφ2A Vφ1 10 9 8 7 6 5 4 3 2 1 Vertical register GND Block Diagram and Pin Configuration (Top View) G B G B R G R G G B G B R G R G G B G B R G R G G B G B R G R G Note) Horizontal register 17 φSUB CSUB 18 19 : Photo sensor 20 Hφ2 16 Hφ1 15 VL 14 Hφ1 VDD 13 Hφ2 12 φRG 11 VOUT Note) Pin Description Pin No. Symbol Description Pin No. Symbol Description 1 Vφ1 Vertical register transfer clock 11 VOUT Signal output 2 Vφ2A Vertical register transfer clock 12 VDD Supply voltage 3 NC 13 φRG Reset gate clock 4 Vφ2B 14 Hφ2 Horizontal register transfer clock 5 NC 15 Hφ1 Horizontal register transfer clock 6 NC 16 φSUB 7 Vφ4 Vertical register transfer clock 17 CSUB Substrate clock Substrate bias∗1 8 Vφ3 Vertical register transfer clock 18 VL Protective transistor bias 9 GND GND 19 Hφ1 Horizontal register transfer clock 10 GND GND 20 Hφ2 Horizontal register transfer clock Vertical register transfer clock ∗1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of 0.1µF. –2– ICX285AQ Absolute Maximum Ratings Ratings Unit VDD, VOUT, φRG – φSUB –40 to +12 V Vφ2A, Vφ2B – φSUB –50 to +15 V Vφ1, Vφ3, Vφ4, VL – φSUB –50 to +0.3 V Hφ1, Hφ2, GND – φSUB –40 to +0.3 V CSUB – φSUB –25 to V VDD, VOUT, φRG, CSUB – GND –0.3 to +22 V Vφ1, Vφ2A, Vφ2B, Vφ3, Vφ4 – GND –10 to +18 V Hφ1, Hφ2 – GND –10 to +6.5 V Vφ2A, Vφ2B – VL –0.3 to +28 V Vφ1, Vφ3, Vφ4, Hφ1, Hφ2, GND – VL –0.3 to +15 V to +15 V Item Against φSUB Against φGND Against φVL Voltage difference between vertical clock input pins Between input clock pins Hφ1 – Hφ2 –6.5 to +6.5 V Hφ1, Hφ2 – Vφ4 –10 to +16 V Storage temperature –30 to +80 °C Guaranteed temperature of performance –10 to +60 °C Operating temperature –10 to +75 °C Remarks ∗1 ∗1 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%. +16V (Max.) is guaranteed for turning on or off power supply. Bias Conditions Item Symbol Min. Typ. Max. Unit Supply voltage VDD 14.55 15.0 15.45 V Protective transistor bias VL ∗2 Substrate clock φSUB ∗3 Reset gate clock φRG ∗3 Remarks ∗2 VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the VL power supply for the V driver should be used. ∗3 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Item Supply current Symbol Min. IDD –3– Typ. Max. Unit 9 11 mA Remarks ICX285AQ Clock Voltage Conditions Item Readout clock voltage Vertical transfer clock voltage Horizontal transfer clock voltage Reset gate clock voltage Symbol Waveform Diagram Min. Typ. Max. Unit Remarks VVT 14.55 15.0 15.45 V 1 VVH1, VVH2 –0.05 0 0.05 V 2 VVH3, VVH4 –0.2 0 0.05 V 2 VVL1, VVL2, VVL3, VVL4 –7.3 –7.0 –6.7 V 2 VVL = (VVL3 + VVL) /2 VφV 6.5 7.0 7.35 V 2 VφV = VVHn – VVLn (n = 1 to 4) VVH = (VVH1 + VVH) /2 VVH3 – VVH –0.25 0.1 V 2 VVH4 – VVH –0.25 0.1 V 2 VVHH 1.4 V 2 High-level coupling VVHL 1.3 V 2 High-level coupling VVLH 1.4 V 2 Low-level coupling VVLL 0.8 V 2 Low-level coupling VφH 4.75 5.0 5.25 V 3 VHL –0.05 0 0.05 V 3 VCR VφH/2 V 3 VφRG 3.0 5.5 V 4 VRGLH – VRGLL 0.4 V 4 Low-level coupling VRGL – VRGLm 0.5 V 4 Low-level coupling 22.75 V 5 Substrate clock voltage VφSUB 21.25 3.3 22.0 –4– Cross-point voltage ICX285AQ Clock Equivalent Circuit Constants Symbol Item Typ. Min. Max. Unit Remarks CφV1 5600 pF CφV2A 6800 pF CφV2B 22000 pF CφV3 8200 pF CφV4 22000 pF CφV12A 150 pF CφV12B 390 pF CφV2A3 270 pF CφV2B3 470 pF CφV14 2200 pF CφV34 330 pF CφV2A4 390 pF CφV2B4 560 pF Capacitance between horizontal transfer clock and GND CφH1 47 pF CφH2 39 pF Capacitance between horizontal transfer clocks CφHH 74 pF Capacitance between reset gate clock and GND CφRG 4 pF Capacitance between substrate clock and GND CφSUB 1300 pF R1, R3 30 Ω R2A, R2B 32 Ω R4 20 Ω Vertical transfer clock ground resistor RGND 60 Ω Horizontal transfer clock series resistor RφH 7.5 Ω Reset gate clock ground resistor RφRG 24 Ω Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Vertical transfer clock series resistor Vφ4 RφH RφH Hφ1 CφV4 R4 CφV41 RφH Hφ1 CφV2B4 Hφ2 CφV2B R2B R1 Vφ1 CφHH RφH CφV34 CφV12B Hφ2 CφH1 CφH2 Vφ2B CφV1 Horizontal transfer clock equivalent circuit CφV12A CφV2B3 RGND CφV2A4 CφV3 CφV2A3 R2A Vφ2A RφRG RGφ CφV2A CφRG R3 Vφ3 Vertical transfer clock equivalent circuit Reset gate clock equivalent circuit –5– ICX285AQ Drive Clock Waveform Conditions (1) Readout clock waveform 100% 90% φM VVT φM 2 10% 0% tr twh 0V tf (2) Vertical transfer clock waveform Vφ1 Vφ3 VVHH VVHH VVH VVHH VVHH VVH VVHL VVHL VVH1 VVH3 VVHL VVHL VVL3VVLH VVLH VVLL VVLL VVL1 VVL VVL Vφ2A, Vφ2B VVH2 Vφ4 VVHH VVH VVHH VVHL VVHL VVHL VVL2 VVHH VVHH VVH4 VVHL VVL4 VVLH VVLH VVLL VVLL VVL VVH = (VVH1 + VVH2) /2 VVL = (VVL3 + VVL4) /2 VφV = VVHn – VVLn (n = 1 to 4) VVH VVL –6– ICX285AQ (3) Horizontal transfer clock waveform tr tf twh Hφ2 90% VCR VφH twl VφH 2 10% Hφ1 VHL two Cross-point voltage for the Hφ1 rising side of the horizontal transfer clocks Hφ1 and Hφ2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two. (4) Reset gate clock waveform tr twh tf VRGH RG waveform twl VφRG Point A VRGLH VRGL VRGLL VRGLm VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL) /2 Assuming VRGH is the minimum value during the interval with twh, then: VφRG = VRGH – VRGL Negative overshoot level during the falling edge of RG is VRGLm. (5) Substrate clock waveform 100% 90% φM VφSUB 10% VSUB 0% (A bias generated within the CCD) tr twh –7– φM 2 tf ICX285AQ Clock Switching Characteristics (Horizontal drive frequency: 28.64MHz) twh Symbol twl tr tf Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Readout clock VT Vertical transfer clock Vφ1, Vφ2, Vφ3, Vφ4 Horizontal transfer clock Item During imaging Hφ1 10 12.5 10 12.5 5 7.5 5 7.5 Hφ2 10 12.5 10 12.5 5 7.5 5 7.5 During parallel-serial conversion Hφ1 0.01 0.01 Hφ2 0.01 0.01 2 2 Reset gate clock φRG Substrate clock φSUB 2.8 3.0 0.5 0.5 15 4 8 24 3.5 3.9 Item Symbol Horizontal transfer clock Hφ1, Hφ2 0.5 two Min. Typ. Max. 8 10 Unit 250 Unit Remarks µs During readout ns When using CXD3400N ns tf ≥ tr – 2ns µs ns 0.5 µs During drain charge Remarks ns Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics) 1.0 R 0.9 G 0.8 Relative Response 0.7 B 0.6 0.5 0.4 0.3 0.2 0.1 0 400 450 500 550 Wave Length [nm] –8– 600 650 700 ICX285AQ Image Sensor Characteristics Item (Ta = 25°C) Symbol G Sensitivity Min. Sg Typ. Max. 1240 R Rr 0.40 0.60 0.70 B Rb 0.30 0.53 0.60 Saturation signal Vsat 850 Smear Sm Sensitivity comparison –110 –100 –98 –88 20 Video signal shading SHg 25 Unit Measurement method mV 1 Remarks 1/30s accumulation 1 mV 2 dB 3 % 4 Ta = 60°C Progressive scan mode High frame rate readout mode Zone 0 and I Zone 0 to II' Dark signal Vdt 10 mV 5 Ta = 60°C, 15 frames/s Dark signal shading ∆Vdt 4 mV 6 Ta = 60°C, 15 frames/s, ∗1 Line crawl G Lcr 3.8 % 7 Line crawl R Lcg 3.8 % 7 Line crawl B Lcb 3.8 % 7 Lag Lag 0.5 % 8 ∗1 Excludes vertical dark signal shading caused by vertical register high-speed transfer. Zone Definition of Video Signal Shading 1392 (H) 11 11 3 H 8 V 10 H 8 Zone 0, I Zone II, II' V 10 1040 (V) 3 Ignored region Effective pixel region Measurement System CCD signal output [∗A] CCD C.D.S AMP –9– S/H Gr/Gb channel signal output [∗B] S/H R/B channel signal output [∗C] ICX285AQ Image Sensor Characteristics Measurement Method Color coding of this image sensor & Readout Gb B Gb B R Gr R Gr Gb B Gb B R Gr R Gr The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively. Horizontal register Color Coding Diagram All pixels' signals are output successively in a 1/15s period. The R signal and Gr signal lines and the Gb signal and B signal lines are output successively. – 10 – ICX285AQ Readout modes The output methods for the following two readout modes are shown below. Progressive scan mode VOUT High frame rate readout mode 16 G B 16 G B 15 R G 15 R G 14 G B 14 G B 13 R G 13 R G 12 G B 12 G B 11 R G 11 R G 10 G B 10 G B 9 R G 9 R G 8 G B 8 G B 7 R G 7 R G 6 G B 6 G B 5 R G 5 R G 4 G B 4 G B 3 R G 3 R G B G 2 G B 2 G 1 R G 1 R VOUT Note) Blacked out portions in the diagram indicate pixels which are not read out. Output starts from line 1 in high frame readout modes. 1. Progressive scan mode In this mode, all pixels' signals are output in non-interlace format in 1/15s. All pixels' signals within the same exposure period are read out simultaneously, making this mode suitable for high resolution image capturing. 2. High frame rate readout mode All effective areas are scanned in approximately 1/60s by reading out two out of eight lines (1st and 4th lines, 9th and 12th lines, and so on). The vertical resolution is approximately 256 TV-lines. This readout mode emphasizes processing speed over vertical resolution. – 11 – ICX285AQ Image Sensor Characteristics Measurement Method Measurement conditions (1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the progressive scan mode is used. (2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb signal output or the R/B signal output of the measurement system. Definition of standard imaging conditions (1) Standard imaging condition I: Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity, sensitivity comparison Set to the standard imaging condition I. After setting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VGR, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screen, and substitute the values into the following formulas. VG = (VGr + VGb) /2 Sg = VG × 100 [mV] 30 Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to the standard imaging condition II. After adjusting the luminous intensity to 20 times the intensity with the average value of the Gr signal output, 200mV, measure the minimum values of the Gr, Gb, R and B signal outputs. 3. Smear Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 200mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times the intensity with the average value of the Gr signal output, 200mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (Vsm [mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = 20 × log (Vsm ÷ Gra + Gba + Ra + Ba × 1 × 1 ) [dB] (1/10V method conversion value) 4 500 10 – 12 – ICX285AQ 4. Video signal shading Set to the standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjusting the luminous intensity so that the average value of the Gr signal output is 200mV. Then measure the maximum value (Grmax [mV]) and minimum value (Grmin [mV]) of the Gr signal output and substitute the values into the following formula. SHg = (Grmax – Grmin) /200 × 100 [%] 5. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature of 60°C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. Dark signal shading After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. ∆Vdt = Vdmax – Vdmin [mV] 7. Line crawl Set to the standard imaging condition II. Adjusting the luminous intensity so that the average value of the Gr signal output is 200mV, and then insert R, G and B filters and measure the difference between G signal lines (∆Glr, ∆Glg, ∆Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula. Lci = ∆Gli × 100 [%] (i = r, g, b) Gai 8. Lag Adjust the Gr signal output value generated by the strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal amount (Vlag). Substitute the value into the following formula. Lag = (Vlag/20) × 100 [%] VD Light Strobe light timing Signal output 200mV Output – 13 – Vlag (lag) 8 9 10 XSG2A XV3 XV1 φRG Hφ1 Hφ2 XSUB 14 7 XSG2B 11 12 13 CXD3400N 16 (TOP VIEW) 15 6 17 4 5 18 3 XV2 19 2 XV4 0.1 0.1 0.1 ICX285 (BOTTOM VIEW) 10 9 8 7 6 5 4 3 2 1 Vφ1 Hφ2 1/35V Vφ2A Hφ1 3.3/ 0.1 1MΩ 16V 1/20V 4.7k 20 19 18 17 16 15 14 13 12 11 VL 20 NC CSUB 1 NC Vφ2B φSUB 0.1 NC Hφ1 XSUB 0.1 100k Vφ4 Hφ2 −7V Vφ3 15V GND φRG 5.0V GND VDD – 14 – VOUT Drive Circuit 2SC4250 3.3/20V 0.01 CCD OUT ICX285AQ – 15 – CCD OUT V4 V3 V2B V2A V1 HD VD "a" 1068 1 2 3 4 5 6 7 8 9 10 11 12 13 Drive Timing Chart (Vertical Sync) Progressive Scan Mode 1040 1 2 1063 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 9 10 21 1031 1032 1044 1052 1040 1 2 1063 1068 1 1 2 ICX285AQ – 16 – V4 V3 V2B V2A V1 HD H1 1 98 1 1 140 182 1 126 126 210 126 27.9µs (800 bits) 392 56 1790 1 Drive Timing Chart (Vertical Sync "a" Enlarged) Progressive Scan Mode 3.5µs (100 bits) 70ns (2 bits) ICX285AQ 392 56 1790 1 – 17 – SUB Vφ4 Vφ3 Vφ2B Vφ2A Vφ1 SHD SHP RGφ Hφ2 Hφ1 CLK 56 1790 1 1 1 1 1 1 42 42 1 1 84 1 105 1 Drive Timing Chart (Horizontal Sync) Progressive Scan Mode 126 1 126 1 1 210 126 1 126 1 210 1 392 105 126 84 168 168 42 ICX285AQ 430 412 CCD OUT V4 V3 V2B V2A V1 HD VD 1020 1025 1028 1033 1036 "a" 1 4 1 4 9 12 17 20 25 1020 1025 1028 1033 1036 "a" 1 4 1 4 9 12 17 20 25 1020 1025 1028 1033 1036 260 261 262 263 264 265 266 267 1 2 3 4 5 6 7 8 9 10 11 12 13 260 261 262 263 264 265 266 267 1 2 3 4 5 6 7 8 9 10 11 12 13 Drive Timing Chart (Vertical Sync) High Frame Rate Readout Mode – 18 – 260 261 262 263 264 265 266 267 1 2 3 4 5 6 7 8 1 4 1 4 9 12 17 ICX285AQ – 19 – V4 V3 V2B V2A V1 HD H1 27.9µs (800 bits) 392 1790 1 56 84 1010101010101010 3.5µs (100 bits) 70ns (2 bits) Drive Timing Chart (Vertical Sync "a" Enlarged) High Frame Rate Readout Mode ICX285AQ 392 1790 1 56 – 20 – SUB Vφ4 Vφ3 Vφ2B Vφ2A Vφ1 SHD SHP RGφ Hφ2 Hφ1 CLK 56 1790 1 1 1 1 1 1 1 10 1 10 20 30 1 1 30 30 50 1 1 1 30 1 50 30 1 1 50 50 1 1 105 30 1 1 50 1 30 30 50 1 1 1 30 Drive Timing Chart (Horizontal Sync) High Frame Rate Readout Mode 1 50 30 1 1 50 50 1 1 30 1 50 1 30 30 50 1 1 126 1 30 1 1 50 30 1 1 50 50 1 1 30 50 1 1 30 30 50 30 50 ICX285AQ 430 412 392 ICX285AQ Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering toll, use a thermal controller of the zero-cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operations as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply and load or impact to limited portions. (This may cause cracks in the package.) Upper ceramic Lower ceramic 39N 29N 29N 0.9Nm Low melting point glass Compressive strength Shearing strength Tensile strength Torsional strength b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use an elastic load, such as a spring plate, or an adhesive. – 21 – ICX285AQ c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) The upper and lower ceramic are joined by low melting point glass. Therefore, care should be taken not to perform the following actions as this may cause cracks. • Applying repeated bending stress to the outer leads. • Heating the outer leads for an extended period with a soldering iron. • Rapidly cooling or heating the package. • Applying any load or impact to a limited portion of the low melting point glass using tweezers or other sharp tools. • Prying at the upper or lower ceramic using the low melting point glass as a fulcrum. Note that the same cautions also apply when removing soldered products from boards. e) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) This CCD image sensor has a device structure that is sensitive to near infrared light, so white spots during the subsequent dark signal occur at a higher probability compared to CCD image sensors with normal structures. Therefore, note that the white spot at dark signal specification cannot be guaranteed when used after storage for long periods. – 22 – – 23 – + 0.25 0.35 1 20 31.0 ± 0.4 27.0 ± 0.3 Ceramic GOLD PLATING 42 ALLOY 5.90g AS-A11(E) LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER 11 10 0.5 1.27 0.46 A PACKAGE MATERIAL 0.3 M 26.0 ± 0.25 13.15 PACKAGE STRUCTURE 2.54 1Pin Index B + 0.15 φ2.00 – 0 (Reference Hole) 2-φ2.50 – 0 5.0 C + 0.15 20 pin DIP (800mil) ~ D 2- 26.0 ~ R 3. 0 9. The thickness of the cover glass is 0.75mm and the refractive index is 1.5. 8. The tilt of the effective image area relative to the bottom “D” is less than 60µm. 7. The height from the bottom “D” to the effective image area is 1.46 ± 0.15mm. 6. The angle of rotation relative to the reference line “B” is less than ± 1˚ 5. The center of the effective image area specified relative to the reference hole is (H, V) = (13.15, 5.0) ± 0.15mm. 4. The bottom “D” is the height reference.(Two points are specified.) 3. The straight line “C” which passes through the center of the reference hole at right angle to vertical reference line “B” is the reference axis of horizontal direction (H). 2. The straight line “B” which passes through the center of the reference hole and the elongated hole is the reference axis of vertical direction (V). 1. "A" is the center of the effective image area. ×2.5 2.00 – 0 (Elongated Hole) 20.2 ± 0.3 1.0 0˚ to 9˚ 0.25 Unit: mm 3.2 ± 0.3 5.5 ± 0.2 20.32 (AT STAND OFF) Package Outline ICX285AQ Sony Corporation