IRF IRL3215PBF

PD - 95405
IRL3215PbF
HEXFET® Power MOSFET
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Advanced Process Technology
Ultra Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Lead-Free
D
VDSS = 150V
RDS(on) = 0.166 Ω
G
ID = 12A…
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and ruggedized device
design that HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for use in a wide variety
of applications.
The TO-220 package is universally preferred for all commercial-industrial
applications at power dissipation levels to approximately 50 watts. The low
thermal resistance and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
12 …
8.5
48
80
0.53
±16
130
7.2
8.0
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
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Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
Units
–––
0.50
–––
1.9
–––
62
°C/W
1
6/17/04
IRL3215PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min. Typ. Max. Units
Conditions
150 ––– –––
V
VGS = 0V, ID = 250µA
––– 0.20 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.166
VGS = 10V, ID = 7.2A „
––– ––– 0.184
Ω
VGS = 5.0V, ID = 7.2A „
––– ––– 0.208
VGS = 4.0V, ID = 6A „
1.0
––– 2.0
V
VDS = VGS, ID = 250µA
8.3
––– –––
S
VDS = 25V, ID = 7.2A‡
––– –––
25
VDS = 150V, VGS = 0V
µA
––– ––– 250
VDS = 120V, VGS = 0V, TJ = 150°C
––– ––– 100
VGS = 16V
nA
––– ––– -100
VGS = -16V
––– –––
35
ID = 7.2A
––– ––– 4.1
nC
VDS = 120V
––– –––
21
VGS = 5.0V, See Fig. 6 and 13 „‡
–––
7.4 –––
VDD = 75V
–––
45
–––
ID = 7.2A
ns
–––
38
–––
RG = 12Ω, VGS = 5.0V
–––
36
–––
RD = 10.2Ω, See Fig. 10 „‡
Between lead,
–––
4.5
–––
nH
6mm (0.25in.)
G
from package
––– 7.5 –––
and center of die contact†
––– 775 –––
VGS = 0V
––– 140 –––
pF
VDS = 25V
–––
70
–––
ƒ = 1.0MHz, See Fig. 5‡
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 12…
showing the
A
G
integral reverse
––– –––
48
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 7.2A, VGS = 0V „
––– 160 240
ns
TJ = 25°C, IF = 7.2A
––– 810 1210 nC
di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
‚ Starting TJ = 25°C, L = 4.9mH
… Caculated continuous current based on maximum allowable
max. junction temperature. ( See fig. 11 )
RG = 25Ω, IAS = 7.2A. (See Figure 12)
ƒ ISD ≤ 7.2A, di/dt ≤ 100A/µs, VDD ≤ V(BR)DSS,
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
TJ ≤ 175°C
2
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IRL3215PbF
10
10
VGS
VGS
15V
15V
10V
10V
8.0V
5V
7.0V
4.5V
6.0V
3.5V
5.5V
3V
5.0V
2.75V
BOTTOM
4.5V
BOTTOM 2.50V
1
2.5V
0.1
20µs PULSE WIDTH
TJ = 25 °C
0.01
0.1
1
10
100
1
2.5V
0.1
3.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
TJ = 25 ° C
TJ = 175 ° C
1
V DS = 50V
20µs PULSE WIDTH
4.0
5.0
6.0
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
10
3.0
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
VGS , Gate-to-Source Voltage (V)
20µs PULSE WIDTH
TJ = 175 °C
0.01
0.1
VDS , Drain-to-Source Voltage (V)
0.1
2.0
VGS
VGS
15V
15V
10V
10V
8.0V
5V
7.0V
4.5V
6.0V
3.5V
5.5V
3V
5.0V
2.75V
BOTTOM 2.50V
4.5V
BOTTOM
TOP
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
TOP
7.0
ID = 12A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRL3215PbF
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance (pF)
2000
Ciss
1500
Coss
1000
Crss
500
0
1
10
15
ID = 7.2 A
VDS = 120V
VDS = 75V
VDS = 30V
VGS , Gate-to-Source Voltage (V)
2500
10
5
0
100
FOR TEST CIRCUIT
SEE FIGURE 13
0
20
30
40
50
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
100
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
10
QG , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
10
TJ = 175 ° C
1
10us
10
100us
1ms
1
10ms
TC = 25 ° C
TJ = 175 ° C
Single Pulse
TJ = 25 ° C
0.1
0.2
V GS = 0 V
0.4
0.6
0.8
1.0
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
1.2
0.1
1
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRL3215PbF
12
RD
V DS
ID , Drain Current (A)
VGS
D.U.T.
9
RG
6
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
+
-VDD
10V
Fig 10a. Switching Time Test Circuit
3
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( °C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
10%
VGS
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
1 D = 0.50
0.20
0.10
PDM
0.05
0.1
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
L
VDS
D.U.T
RG
IAS
20V
DRIVER
+
V
- DD
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
EAS , Single Pulse Avalanche Energy (mJ)
IRL3215PbF
300
TOP
250
BOTTOM
ID
2.9A
5.1A
7.2A
200
150
100
50
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
V(BR)DSS
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I AS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
10 V
QGS
.3µF
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
12V
.2µF
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRL3215PbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

RG
•
•
•
•
Driver Gate Drive
P.W.
+
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Period
D=
-
VDD
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRL3215PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
1
2
3
4- DRAIN
14.09 (.555)
13.47 (.530)
4- COLLECTOR
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
IGBTs, CoPACK
1 - GATE
2 - DRAIN
1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
3- EMITTER
4 - DRAIN
HEXFET
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
LOT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB LY L INE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
LOT CODE
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.06/04
8
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