INTERSIL ISL32483E

Fault Protected, Extended CMR, RS-485/RS-422
Transceivers with Cable Invert and ±16.5kV ESD
ISL32483E, ISL32485E
The ISL3248xE are fault protected, 5V powered differential
transceivers that exceed the RS-485 and RS-422 standards for
balanced communication. The RS-485 transceiver pins (driver
outputs and receiver inputs) are fault protected up to ±60V and
are protected against ±16.5kV ESD strikes without latch-up.
Additionally, the extended common mode range allows these
transceivers to operate in environments with common mode
voltages up to ±25V (>2X the RS-485 requirement), making this
fault-protected RS-485 family one of the most robust on the
market.
Transmitters (Tx) deliver an exceptional 2.5V (typical) differential
output voltage into the RS-485 specified 54Ω load. This yields
better noise immunity than standard RS-485 ICs or allows up to
six 120Ω terminations in star network topologies.
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating, shorted,
or on a terminated but undriven (idle) bus.
The ISL32483E and ISL32485E include cable invert functions
that reverse the polarity of the Rx and/or Tx bus pins in case the
cable is misconnected. Unlike competing devices, Rx full fail-safe
operation is maintained even when the Rx input polarity is
switched.
For fault protected RS-485 transceivers without the cable invert
function, please see the ISL32470E and ISL32490E data sheets.
30
VOLTAGE (V)
Applications
• Utility Meters/Automated Meter Reading Systems
• High Node Count RS-485 Systems
• PROFIBUS® and RS-485 Based Field Bus Networks, and
Factory Automation
• Security Camera Networks
• Building Lighting and Environmental Control Systems
• Industrial/Process Control Networks
25
COMMON MODE RANGE
A
20
15
10
5
RO
0
12
0
-7
-12
-20
-25
-5
STANDARD RS-485
TRANSCEIVER
TIME (400ns/DIV)
FIGURE 1. EXCEPTIONAL Rx OPERATES AT 1Mbps EVEN WITH
±25V COMMON MODE VOLTAGE
January 18, 2011
FN7785.0
• Fault Protected RS-485 Bus Pins . . . . . . . . . . . . . . Up to ±60V
• Extended Common Mode Range . . . . . . . . . . . . . . . . . . . ±25V
More Than Twice the Range Required for RS-485
• ±16.5kV HBM ESD Protection on RS-485 Bus Pins
• Cable Invert Pins
Corrects for Reversed Cable Connections While Maintaining Rx
Full Fail-Safe Functionality
• Full Fail-Safe (Open, Short, Terminated) RS-485 Receivers
• 1/4 Unit Load (UL) for Up to 128 Devices on the Bus
• High Rx IOL for Opto-Couplers in Isolated Designs
• Hot Plug Circuitry: Tx and Rx Outputs Remain Three-State
During Power-up/Power-down
• Slew Rate Limited RS-485 Data Rate . . . . . . . . . . . . . 1Mbps
• Low Quiescent Supply Current . . . . . . . . . . . . . . . . . . . 2.3mA
• Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . . 10µA
VID = ±1V
B
25
Features
1
CLOSEST
COMPETITOR
ISL3248XE
FIGURE 2. TRANSCEIVERS DELIVER SUPERIOR COMMON MODE
RANGE vs STANDARD RS-485 DEVICES
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL32483E, ISL32485E
TABLE 1. SUMMARY OF FEATURES
HALF/FULL
DUPLEX
PART NUMBER
DATA RATE
(Mbps)
SLEW-RATE
LIMITED?
EN PINS?
HOT
PLUG
POLARITY
REVERSAL
PINS?
QUIESCENT ICC
(mA)
LOW
POWER
SHDN?
PIN COUNT
ISL32483E
Full
1
Yes
Yes
Yes
Yes
2.3
Yes
14
ISL32485E
Half
1
Yes
Tx Only
Yes
Yes
2.3
No
8
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL32483EIBZ
ISL32483 EIBZ
-40 to +85
14 Ld SOIC
M14.15
ISL32485EIBZ
32485 EIBZ
-40 to +85
8 Ld SOIC
M8.15
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL32483E and ISL32485E. For more information on MSL please see
techbrief TB363.
Pin Configurations
ISL32485E
(8 LD SOIC)
TOP VIEW
ISL32483E
(14 LD SOIC)
TOP VIEW
RINV 1
14 VCC
RO 1
R
8
VCC
13 VCC
INV 2
7
B/Z
RE 3
12 A
DE 3
6
A/Y
DE 4
11 B
DI 4
5
GND
RO 2
DI 5
R
D
10 Z
GND 6
9 Y
GND 7
8 DINV
2
D
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Pin Descriptions
PIN
NAME
ISL32483E
PIN #
ISL32485E
PIN #
RO
2
1
RE
3
N/A
DE
4
3
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and they are high
impedance when DE is low. Internally pulled high to VCC.
DI
5
4
Driver input. If INV or DINV is low, a low on DI forces output Y low and output Z high, while a high on DI forces
output Y high and output Z low. The output states relative to DI invert if INV or DINV is high.
GND
6, 7
5
Ground connection.
A/Y
N/A
6
±60V Fault and ±16.5kV HBM ESD Protected RS-485/RS-422 level I/O pin. If INV is low, A/Y is the
non-inverting receiver input and non-inverting driver output. If INV is high, A/Y is the inverting receiver input
and the inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z
N/A
7
±60V Fault and ±16.5kV HBM ESD Protected RS-485/RS-422 level I/O pin. If INV is low, B/Z is the inverting
receiver input and inverting driver output. If INV is high, B/Z is the non-inverting receiver input and the
non-inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
A
12
N/A
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level input. If RINV is low, then A is the
non-inverting receiver input. If RINV is high, then A is the inverting receiver input.
B
11
N/A
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level input. If RINV is low, then B is the inverting
receiver input. If RINV is high, then B is the non-inverting receiver input.
Y
9
N/A
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level output. If DINV is low, then Y is the
non-inverting driver output. If DINV is high, then Y is the inverting driver output
Z
10
N/A
±60V Fault and ±15kV HBM ESD Protected RS-485/RS-422 level. If DINV is low, then Z is the inverting driver
output. If DINV is high, then Z is the non-inverting driver output
VCC
13, 14
8
System power supply input (4.5V to 5.5V).
INV
N/A
2
Receiver and driver polarity selection input. When driven high, this pin swaps the polarity of the driver output
and receiver input pins. If unconnected (floating) or connected low, normal RS-485 polarity conventions
apply. Internally pulled low.
RINV
1
N/A
Receiver polarity selection input. When driven high, this pin swaps the polarity of the receiver input pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low.
DINV
8
N/A
Driver polarity selection input. When driven high, this pin swaps the polarity of the driver output pins. If
unconnected (floating) or connected low, normal RS-485 polarity conventions apply. Internally pulled low.
3
FUNCTION
Receiver output. If INV or RINV is low, then: If A - B ≥ -10mV, RO is high; if A - B ≤ -200mV, RO is low. If INV or
RINV is high, then: If B - A ≥ -10mV, RO is high; if B - A ≤ -200mV, RO is low. In all cases, RO = High if A and B
are unconnected (floating), or shorted together, or connected to an undriven, terminated bus (i.e., Rx is always
failsafe open, shorted, and idle, even if polarity is inverted).
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. Internally
pulled low.
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Truth Tables
RECEIVING
INPUTS
TRANSMITTING
OUTPUT
RE
DE (Half
Duplex)
DE (Full
Duplex)
A-B
INV or
RINV
RO
0
0
X
≥ -0.01V
0
1
0
0
X
≤ -0.2V
0
0
0
0
X
≤ 0.01V
1
1
0
0
X
≥ 0.2V
1
0
0
0
X
X
1
High-Z
High-Z
(see Note) (see Note)
Inputs
Open or
Shorted
1
0
0
X
X
NOTE: Low Power Shutdown Mode (see Note 11 on page 7), except
for ISL32485E.
High-Z
(see Note)
1
1
1
X
X
High-Z
INPUTS
OUTPUTS
RE
DE
DI
INV or DINV
Y
Z
X
1
1
0
1
0
X
1
0
0
0
1
X
1
1
1
0
1
X
1
0
1
1
0
0
0
X
X
High-Z
High-Z
1
0
X
X
NOTE: Low Power Shutdown Mode (see Note 11 on page 7), except for
ISL32485E.
Typical Operating Circuits
+5V
+5V
+
13, 14
1
RINV
2 RO
VCC
R
B 11
0.1µF
0.1µF
RT
+
13, 14
VCC
9 Y
A 12
D
10 Z
DI 5
3 RE
DE 4
4 DE
RE 3
5 DI
8
RT
Y 9
Z 10
D
DINV
11 B
12 A
GND
GND
R
RO 2
RINV
DINV
1
8
6, 7
6, 7
THE IC ON THE LEFT HAS THE CABLE CONNECTIONS
SWAPPED, SO THE INV PINS (1, 8) ARE STRAPPED
HIGH TO INVERT ITS RX AND TX POLARITY
ISL34183E FULL DUPLEX EXAMPLE
4
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Absolute Maximum Ratings
Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, INV, RINV, DINV, DE, RE. . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z
(Transient Pulse Through 100Ω, see Note 15). . . . . . . . . . . . . . . . . ±80V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . see “ESD PERFORMANCE” on page 6
Latch-up (Tested per JESD78, Level 2, Class A). . . . . . . . . . . . . . . . +125°C
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . .
116
47
14 Ld SOIC Package (Notes 4, 5) . . . . . . . .
88
39
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common Mode Voltage Range . . . . . . . . . . . . . . . . . -25V to +25V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θJC, the “case temp” location is taken at the package top center.
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
Full
-
-
VCC
V
DC CHARACTERISTICS
Driver Differential VOUT
(No load)
VOD1
Driver Differential VOUT
(Loaded, Figure 3A)
VOD2
RL = 100Ω (RS-422)
Full
2.4
3.2
-
V
RL = 54Ω (RS-485)
Full
1.5
2.5
VCC
V
RL = 54Ω (PROFIBUS, VCC ≥ 5V)
Full
2.0
2.5
-
V
RL = 21Ω (Six 120Ω terminations for Star
Configurations, VCC ≥ 4.75V)
Full
0.8
1.3
-
V
Change in Magnitude of Driver
Differential VOUT for
Complementary Output
States
ΔVOD
RL = 54Ω or 100Ω (Figure 3A)
Full
-
-
0.2
V
Driver Differential VOUT with
Common Mode Load
(Figure 3B)
VOD3
RL = 60Ω, -7V ≤ VCM ≤ 12V
Full
1.5
2.1
VCC
V
RL = 60Ω, -25V ≤ VCM ≤ 25V (VCC ≥ 4.75V)
Full
1.7
2.3
RL = 21Ω, -15V ≤ VCM ≤ 15V (VCC ≥ 4.75V)
Full
0.8
1.1
-
V
Driver Common-Mode VOUT
(Figure 3)
VOC
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output
States
Driver Short-Circuit Current
V
RL = 54Ω or 100Ω
Full
-1
-
3
V
RL = 60Ω or 100Ω, -20V ≤ VCM ≤ 20V
Full
-2.5
-
5
V
DVOC
RL = 54Ω or 100Ω (Figure 3A)
Full
-
-
0.2
V
-
250
mA
83
mA
IOSD
DE = VCC, -25V ≤ VO ≤ 25V (Note 8)
Full
-250
IOSD1
At First Fold-back, 22V ≤ VO ≤ -22V
Full
-83
IOSD2
At Second Fold-back, 35V ≤ VO ≤ -35V
Full
-13
VIH
DE, DI, RE, INV, RINV, DINV
Full
2.5
Logic Input Low Voltage
VIL
DE, DI, RE, INV, RINV, DINV
Full
Logic Input Current
IIN1
DI
Full
DE, RE, INV, RINV, DINV
Full
-15
Logic Input High Voltage
5
13
mA
-
-
V
-
-
0.8
V
-1
-
1
µA
6
15
µA
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
Input/Output Current (A/Y,
B/Z)
IIN2
Input Current (A, B)
(Full Duplex Versions Only)
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
IIN3
IOZD
Receiver Differential
Threshold Voltage
V TH
TEST CONDITIONS
DE = 0V,
VCC = 0V or 5.5V
VCC = 0V or 5.5V
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
VIN = 12V
Full
-
110
250
µA
VIN = -7V
Full
-200
-75
-
µA
VIN = ±25V
Full
-800
±240
800
µA
VIN = ±60V
(Note 17)
Full
-6
±0.7
6
mA
VIN = 12V
Full
-
90
125
µA
VIN = -7V
Full
-100
-70
-
µA
VIN = ±25V
Full
-500
±200
500
µA
VIN = ±60V
(Note 17)
Full
-3
±0.5
3
mA
VIN = 12V
Full
-
20
200
µA
VIN = -7V
Full
-100
-5
-
µA
VIN = ±25V
Full
-500
±40
500
µA
VIN = ±60V
(Note 17)
Full
-3
±0.15
3
mA
A-B if INV or RINV = 0; B-A if INV or RINV = 1,
-25V ≤ VCM ≤ 25V
Full
-200
-100
-10
mV
25
-
25
-
mV
IO = -2mA
Full
VCC - 0.5
4.75
-
V
IO = -8mA
Full
2.8
4.2
-
V
RE = 0V, DE = 0V,
VCC = 0V or 5.5V
Receiver Input Hysteresis
DV TH
-25V ≤ VCM ≤ 25V
Receiver Output High Voltage
VOH
VID = -10mV
Receiver Output Low Voltage
VOL
IO = 6mA, VID = -200mV
Full
-
0.27
0.4
V
Receiver Output Low Current
IOL
VO = 1V, VID = -200mV
Full
15
22
-
mA
Three-State (High Impedance)
Receiver Output Current
IOZR
0V ≤ VO ≤ VCC (Note 16)
Full
-1
0.01
1
µA
Receiver Short-Circuit Current
IOSR
0V ≤ VO ≤ VCC
Full
±12
-
±110
mA
DE = VCC, RE = 0V or VCC, DI = 0V or VCC
Full
-
2.3
4.5
mA
DE = 0V, RE = VCC, DI = 0V or VCC (Note 16)
Full
-
10
50
µA
1/2 Duplex
25
-
±16.5
-
kV
Full Duplex
25
-
±15
-
kV
SUPPLY CURRENT
No-Load Supply Current
(Note 7)
Shutdown Supply Current
ICC
ISHDN
ESD PERFORMANCE
RS-485 Pins (A, Y, B, Z, A/Y,
B/Z)
Human Body Model,
From Bus Pins to
GND
All Pins
Human Body Model, per JEDEC
25
-
±8
-
kV
Machine Model
25
-
±700
-
V
-
70
125
ns
DRIVER SWITCHING CHARACTERISTICS
Driver Differential Output
Delay
tPLH, tPHL
RD = 54Ω, CD = 50pF No CM Load
(Figure 4)
-25V ≤ VCM ≤ 25V
Full
Full
-
-
350
ns
Driver Differential Output
Skew
tSKEW
RD = 54Ω, CD = 50pF No CM Load
(Figure 4)
-25V ≤ VCM ≤ 25V
Full
-
4.5
15
ns
Full
-
-
25
ns
Driver Differential Rise or Fall
Time
tR, tF
RD = 54Ω, CD = 50pF No CM Load
(Figure 4)
-25V ≤ VCM ≤ 25V
Full
70
170
300
ns
Full
70
-
400
ns
Maximum Data Rate
fMAX
CD = 820pF (Figure 6)
Full
1
4
-
Mbps
Driver Enable to Output High
tZH
SW = GND (Figure 5), (Note 9)
Full
-
-
350
ns
Driver Enable to Output Low
tZL
SW = VCC (Figure 5), (Note 9)
Full
-
-
300
ns
Driver Disable from Output
Low
tLZ
SW = VCC (Figure 5)
Full
-
-
120
ns
6
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 6).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
Driver Disable from Output
High
Time to Shutdown
TEMP
(°C)
MIN
(Note 14)
TYP
MAX
(Note 14)
UNITS
SW = GND (Figure 5)
Full
-
-
120
ns
SYMBOL
tHZ
tSHDN
TEST CONDITIONS
(Notes 11, 16)
Full
60
160
600
ns
Driver Enable from Shutdown
to Output High
tZH(SHDN)
SW = GND (Figure 5),
(Notes 11, 12, 16)
Full
-
-
2000
ns
Driver Enable from Shutdown
to Output Low
tZL(SHDN)
SW = VCC (Figure 5),
(Notes 11, 12, 16)
Full
-
-
2000
ns
RECEIVER SWITCHING CHARACTERISTICS
fMAX
-25V ≤ VCM ≤ 25V (Figure 7)
Full
1
15
-
Mbps
Receiver Input to Output Delay
Maximum Data Rate
tPLH, tPHL
-25V ≤ VCM ≤ 25V (Figure 7)
Full
-
90
150
ns
Receiver Skew | tPLH - tPHL |
tSKD
(Figure 7)
Full
-
4
10
ns
Receiver Enable to Output
Low
tZL
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 10, 16)
Full
-
-
50
ns
Receiver Enable to Output
High
tZH
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 10, 16)
Full
-
-
50
ns
Receiver Disable from Output
Low
tLZ
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)
(Note 16)
Full
-
-
50
ns
Receiver Disable from Output
High
tHZ
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)
(Note 16)
Full
-
-
50
ns
(Notes 11, 16)
Full
60
160
600
ns
Time to Shutdown
tSHDN
Receiver Enable from
Shutdown to Output High
tZH(SHDN)
RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 11, 13, 16)
Full
-
-
2000
ns
Receiver Enable from
Shutdown to Output Low
tZL(SHDN)
RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 11, 13, 16)
Full
-
-
2000
ns
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” beginning on page 18 for more information
9. Keep RE = 0 to prevent the device from entering SHDN.
10. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
11. Transceivers (except on the ISL32485E) are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the
parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See
“Low Power Shutdown Mode” on page 12.
12. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
13. Set the RE signal high time >600ns to ensure that the device enters SHDN.
14. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
15. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15ms at a 1% duty cycle).
16. Does not apply to the ISL32485E. The ISL32485E has no Rx enable function, and thus no SHDN function.
17. See “Caution” statement in the “Recommended Operating Conditions” section on page 5.
7
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Test Circuits and Waveforms
RL/2
DE
VCC
VCC
Z
DI
Z
DI
VOD
D
VCM
VOD
D
Y
Y
VOC
VOC
RL/2
375Ω
RL/2
DE
RL/2
FIGURE 3A. VOD AND VOC
375Ω
FIGURE 3B. VOD AND VOC WITH COMMON MODE LOAD
FIGURE 3. DC DRIVER TEST CIRCUITS
3V
DI
50%
50%
0V
VCC
375Ω*
DE
tPLH
Z
DI
CD
D
VOH
OUT (Y)
VOL
RD
Y
SIGNAL
GENERATOR
tPHL
OUT (Z)
VCM
375Ω*
*ONLY USED FOR COMMON
MODE LOAD TESTS
90%
DIFF OUT (Y - Z)
+VOD
90%
10%
10%
tR
-VOD
tF
SKEW = |tPLH - tPHL|
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
DI
110Ω
VCC
D
SIGNAL
GENERATOR
SW
Y
GND
CL
3V
DE
(Note 11)
tZH, tZH(SHDN)
(Note 11)
PARAMETER
OUTPUT
RE
DI
SW
CL (pF)
tHZ
Y/Z
X
1/0
GND
50
tLZ
Y/Z
X
0/1
VCC
50
tZH
Y/Z
0 (Note 9)
1/0
GND
100
tZL
Y/Z
0 (Note 9)
0/1
VCC
100
tZH(SHDN)
Y/Z
1 (Note 12)
1/0
GND
100
tZL(SHDN)
Y/Z
1 (Note 12)
0/1
VCC
100
FIGURE 5A. TEST CIRCUIT
50%
50%
0V
tHZ
OUTPUT HIGH
VOH - 0.5V
2.3V
OUT (Y, Z)
VOH
0V
tZL, tZL(SHDN)
tLZ
(Note 11)
VCC
OUT (Y, Z)
2.3V
VOL + 0.5V
OUTPUT LOW
VOL
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
8
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Test Circuits and Waveforms (Continued)
DE
VCC
3V
+
Z
DI
CD
54Ω
D
DI
VOD
Y
0V
-
SIGNAL
GENERATOR
+VOD
DIFF OUT (Y - Z)
0V
-VOD
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER DATA RATE
RE
R
A
SIGNAL
GENERATOR
B
15pF
B
VCM + 750mV
VCM
RO
VCM
A
VCM - 750mV
tPLH
SIGNAL
GENERATOR
tPHL
VCC
50%
RO
VCM
50%
0V
FIGURE 7A. TEST CIRCUIT
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
B
A
1kΩ
RO
R
SIGNAL
GENERATOR
15pF
PARAMETER
DE
A
SW
RE
(Note 11)
3V
50%
50%
0V
SW
tHZ
0
+1.5V
GND
tLZ
0
-1.5V
VCC
tZH (Note 10)
0
+1.5V
GND
tZL (Note 10)
0
-1.5V
VCC
tZH(SHDN) (Note 13)
0
+1.5V
GND
tZL(SHDN) (Note 13)
0
-1.5V
VCC
FIGURE 8A. TEST CIRCUIT
VCC
GND
tZH, tZH(SHDN)
(Note 11)
tHZ
OUTPUT HIGH
1.5V
RO
VOH - 0.5V
VOH
0V
tZL, tZL(SHDN)
tLZ
(Note 11)
VCC
RO
1.5V
VOL + 0.5V
OUTPUT LOW
VOL
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
9
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Application Information
Driver (Tx) Features
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard, which allows only one driver and up to 10 (assuming
one-unit load devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one-unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
drivers must handle bus contention without sustaining any
damage.
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485) and at least
2.4V across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width and to minimize
EMI, and all drivers are three-statable via the active high DE
input.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000 feet, so the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
The ISL3248xE is a family of ruggedized RS-485 transceivers
that improves on the RS-485 basic requirements and therefore
increases system reliability. The CMR increases to ±25V, while
the RS-485 bus pins (receiver inputs and driver outputs) include
fault protection against voltages and transients up to ±60V.
Additionally, larger-than-required differential output voltages
(VOD) increase noise immunity, while the ±16.5kV built-in ESD
protection complements the fault protection.
Receiver (Rx) Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications.
Receiver input (load) current surpasses the RS-422 specification
of 3mA and is four times lower than the RS-485 “Unit Load (UL)”
requirement of 1mA maximum. Thus, these products are known
as “one-quarter UL” transceivers, and there can be up to 128 of
these devices on a network while still complying with the RS-485
loading specification.
The Rx functions with common mode voltages as great as ±25V,
making them ideal for industrial or long networks where induced
voltages are a realistic concern.
All the receivers include a “full fail-safe” function that guarantees
a high-level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (i.e., an idle bus).
Rx outputs feature high drive levels (typically 22mA @ VOL = 1V) to
ease the design of optically coupled isolated interfaces. Except for
the ISL32485E, Rx outputs are three-statable via the active low RE
input.
The Rx includes noise filtering circuitry to reject high-frequency
signals, and typically rejects pulses narrower than 50ns
(equivalent to 20Mbps).
10
The driver outputs are slew rate limited to minimize EMI and to
minimize reflections in unterminated or improperly terminated
networks.
High Overvoltage (Fault) Protection
Increases Ruggedness
The ±60V (referenced to the IC GND) fault protection on the
RS-485 pins makes these transceivers some of the most rugged
on the market. This level of protection makes the ISL3248xE
perfect for applications where power (e.g., 24V and 48V supplies)
must be routed in the conduit with the data lines, or for outdoor
applications where large transients are likely to occur. When
power is routed with the data lines, even a momentary short
between the supply and data lines will destroy an unprotected
device. The ±60V fault levels of this family are at least five times
higher than the levels specified for standard RS-485 ICs. The
ISL3248xE protection is active whether the Tx is enabled or
disabled, and even if the IC is powered down.
If transients or voltages (including overshoots and ringing)
greater then ±60V are possible, then additional external
protection is required.
Widest Common Mode Voltage (CMV)
Tolerance Improves Operating Range
RS-485 networks operating in industrial complexes or over long
distances are susceptible to large CMV variations. Either of these
operating environments may suffer from large node-to-node
ground potential differences or CMV pickup from external
electromagnetic sources, and devices with only the minimum
required +12V to -7V CMR may malfunction. The ISL3248xE’s
extended ±25V CMR is the widest available, allowing operation in
environments that would overwhelm lesser transceivers.
Additionally, the Rx will not phase invert (erroneously change
state), even with CMVs of ±40V or differential voltages as large
as 40V.
Cable Invert (Polarity Reversal) Function
With large node count RS-485 networks, it is common for some
cable data lines to be wired backwards during installation. When
this happens, the node is unable to communicate over the
network. Once a technician finds the miswired node, he must
then rewire the connector, which is time consuming.
The ISL32483E and ISL32485E simplify this task by including
cable invert pins (INV, DINV, RINV) that allow the technician to
invert the polarity of the Rx input and/or the Tx output pins
simply by moving a jumper to change the state of the invert pins.
When the invert pin is low, the IC operates like any standard
RS-485 transceiver, and the bus pins have their normal polarity
definition of A and Y being noninverting and B and Z being
inverting. With the invert pin high, the corresponding bus pins
reverse their polarity, so B and Z are now noninverting, and A and
Y become inverting.
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
High VOD Improves Noise Immunity and
Flexibility
The ISL3248xE driver design delivers larger differential output
voltages (VOD) than the RS-485 standard requires or than most
RS-485 transmitters can deliver. The typical ±2.5V VOD provides
more noise immunity than networks built using many other
transceivers.
Another advantage of the large VOD is the ability to drive more
than two bus terminations, which allows for utilizing the
ISL3248xE in “star” and other multi-terminated, nonstandard
network topologies.
Figure 10 details the transmitter’s VOD versus IOUT characteristic,
and includes load lines for four (30Ω) and six (20Ω) 120Ω
terminations. The figure shows that the driver typically delivers
±1.3V into six terminations, and the “Electrical Specifications” on
page 5 guarantee a VOD of ±0.8V at 21Ω over the full
temperature range. The RS-485 standard requires a minimum
1.5V VOD into two terminations, but the ISL3248xE delivers
RS-485 voltage levels with 2x to 3x the number of terminations.
Hot Plug Function
When a piece of equipment powers up, there is a period of time
in which the processor or ASIC driving the RS-485 control lines
(DE, RE) is unable to ensure that the RS-485 Tx and Rx outputs
are kept disabled. If the equipment is connected to a bus, a
driver activating prematurely during power-up may crash the bus.
To avoid this scenario, the ISL3248xE devices incorporate a “Hot
Plug” function. Circuitry monitoring VCC ensures that, during
power-up and power-down, the Tx and Rx outputs remain disabled,
regardless of the state of DE and RE, if VCC is less than ≈3.5V. This
gives the processor or ASIC a chance to stabilize and drive the
RS-485 control lines to the proper states. Figure 9 illustrates the
power-up and power-down performance of the ISL3248xE
compared to an RS-485 IC without the Hot Plug feature.
11
2.8V
5.0
2.5
VCC
VCC (V)
RE = GND
3.5V
0
5.0
RL = 1kΩ
2.5
0
A/Y
ISL3248XE
ISL83088E
RL = 1kΩ
RO
ISL3248XE
5.0
2.5
0
RECEIVER OUTPUT (V)
The full duplex ISL32483E includes two invert pins that allow for
separate control of the Rx and Tx polarities. If only the Rx cable is
miswired, then only the RINV pin need be driven to a logic 1. If
the Tx cable is miswired, then DINV must be connected to a logic
high. The half-duplex version has only one logic pin (INV) that,
when high, switches the polarity of both the Tx and the Rx blocks.
DE, DI = VCC
DRIVER Y OUTPUT (V)
Intersil’s unique cable invert function is superior to that found on
competing devices, because the Rx full fail-safe function is
maintained, even when the Rx polarity is reversed. Competitor
devices implement the Rx invert function simply by inverting the
Rx output. This means that with the Rx inputs floating or shorted
together, the Rx appropriately delivers a logic 1 in normal
polarity, but outputs a logic low when the IC is operated in the
inverted mode. Intersil’s innovative Rx design guarantees that,
with the Rx inputs floating or shorted together (VID=0V), the Rx
output remains high, regardless of the state of the invert pins.
TIME (40µs/DIV)
FIGURE 9. HOT PLUG PERFORMANCE (ISL3248XE) vs ISL83088E
WITHOUT HOT PLUG CIRCUITRY
ESD Protection
All pins on the ISL3248xE devices include Class 3 (>8kV)
Human Body Model (HBM) ESD protection structures that are
good enough to survive ESD events commonly seen during
manufacturing. Even so, the RS-485 pins (driver outputs and
receiver inputs) incorporate more advanced structures that
allow them to survive ESD events in excess of ±16.5kV HBM
(±15kV for full-duplex version). The RS-485 pins are particularly
vulnerable to ESD strikes, because they typically connect to an
exposed port on the exterior of the finished product. Simply
touching the port pins or connecting a cable can cause an ESD
event that might destroy unprotected ICs. The new ESD
structures protect the device whether or not it is powered up,
and without interfering with the exceptional ±25V CMR. This
built-in ESD protection minimizes the need for board-level
protection structures (e.g., transient suppression diodes) and
the associated, undesirable capacitive load they present.
Data Rate, Cables, and Terminations
RS-485/RS-422 are intended for network lengths up to 4000 feet,
but the maximum system data rate decreases as the transmission
length increases. These 1Mbps versions can operate at full data
rates with lengths up to 800 feet (244m). Jitter is the limiting
parameter at this data rate, so employing encoded data streams
(e.g., Manchester coded or Return-to-Zero) may allow increased
transmission distances.
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode signals,
which are effectively rejected by the differential receivers in these
ICs.
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Proper termination is imperative to minimize reflections, and
terminations are recommended unless power dissipation is an
overriding concern. In point-to-point, or point-to-multipoint (single
driver on bus like RS-422) networks, the main cable should be
terminated in its characteristic impedance (typically 120Ω) at the
end farthest from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as short as
possible. Multipoint (multi-driver) systems require that the main
cable be terminated in its characteristic impedance at both ends.
Stubs connecting a transceiver to the main cable should be kept as
short as possible.
As stated previously, the RS-485 specification requires that
drivers survive worst-case bus contentions undamaged. These
transceivers meet this requirement via driver output short circuit
current limits and on-chip thermal shutdown circuitry.
The driver output stages incorporate a double foldback, short
circuit current limiting scheme, which ensures that the output
current never exceeds the RS-485 specification, even at the
common mode and fault condition voltage range extremes. The
first foldback current level (≈70mA) is set to ensure that the
driver never folds back when driving loads with common mode
voltages up to ±25V. The very low second foldback current
Typical Performance Curves
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
+25°C
RD = 54Ω
+85°C
50
40
RD = 100Ω
30
20
10
0
0
1
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 9, 10, 11, 12
and 13, at the end of “Electrical Specifications” on page 5, for
more information.
VCC = 5V, TA = +25°C; Unless Otherwise Specified.
RD = 30Ω
70
60
These BiCMOS transceivers all use a fraction of the power
required by competitive devices, but they also include a
shutdown feature (except the ISL32485E) that reduces the
already low quiescent ICC to a 10µA trickle. These devices enter
shutdown whenever the receiver and driver are simultaneously
disabled (RE = VCC and DE = GND) for a period of at least 600ns.
Disabling both the driver and the receiver for less than 60ns
guarantees that the transceiver will not enter shutdown.
3.6
RD = 20Ω
80
In the event of a major short circuit condition, devices also include
a thermal shutdown feature that disables the drivers whenever the
die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about 15°C. If the
contention persists, the thermal shutdown/re-enable cycle repeats
until the fault is cleared. Receivers stay operational during thermal
shutdown.
Low Power Shutdown Mode
Built-In Driver Overload Protection
90
setting (≈9mA) minimizes power dissipation if the Tx is enabled
when a fault occurs.
2
3
4
5
DIFFERENTIAL OUTPUT VOLTAGE (V)
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
12
3.4
RD = 100Ω
3.2
3.0
2.8
2.6
RD = 54Ω
2.4
2.2
-40
-25
0
25
50
TEMPERATURE (°C)
75
85
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Typical Performance Curves
VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
70
2.40
RECEIVER OUTPUT CURRENT (mA)
2.45
DE = VCC, RE = X
2.35
ICC (mA)
2.30
2.25
DE = GND, RE = GND
2.20
2.15
2.10
2.05
2.00
-40
-25
0
25
50
TEMPERATURE (°C)
75
150
VOL, +85°C
40
30
20
10
0
-10
VOH, +85°C
-20
VOH, +25°C
0
1
2
3
4
RECEIVER OUTPUT VOLTAGE (V)
5
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
800
+85°C
600
100
Y OR Z = LOW
BUS PIN CURRENT (µA)
OUTPUT CURRENT (mA)
VOL, +25°C
50
-30
85
FIGURE 12. SUPPLY CURRENT vs TEMPERATURE
60
50
+25°C
0
-50
Y OR Z = HIGH
+25°C
-100
400
200
0
Y or Z
-200
-400
A/Y or B/Z
+85°C
-150
-60 -50 -40 -30 -20 -10
-600
0
10
20
30
40
50
60
-70
-50
-30
-10 0 10
30
50
70
BUS PIN VOLTAGE (V)
OUTPUT VOLTAGE (V)
FIGURE 14. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
FIGURE 15. BUS PIN CURRENT vs BUS PIN VOLTAGE
4.0
85
RD = 54Ω, CD = 50pF
RD = 54Ω, CD = 50pF
3.5
75
SKEW (ns)
PROPAGATION DELAY (ns)
80
70
tPLH
65
3.0
tPHL
60
2.5
55
50
-40
-25
0
25
50
75
TEMPERATURE (°C)
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE
13
85
2.0
-40
|tPLH - tPHL|
-25
0
25
50
TEMPERATURE (°C)
75
85
FIGURE 17. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
10
5
0
5
0
-5
-10
-15
-20
-25
VID = ±1V
RO
RO
A
B
TIME (400ns/DIV)
FIGURE 18. RECEIVER PERFORMANCE WITH ±25V CMV
RD = 54Ω, CD = 50pF
DI
5
0
5
RO
0
DRIVER INPUT (V)
A
B
RECEIVER OUTPUT (V)
VOLTAGE (V)
25
20
15
VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
DRIVER OUTPUT (V)
Typical Performance Curves
3
2
1
0
-1
-2
-3
A/Y - B/Z
TIME (400ns/DIV)
FIGURE 19. DRIVER AND RECEIVER WAVEFORMS
Die Characteristics
SUBSTRATE POTENTIAL (Powered Up):
GND
PROCESS:
Si Gate BiCMOS
14
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE
REVISION
CHANGE
January 18, 2011
FN7785.0
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page
on intersil.com: ISL32483E, ISL32485E
To report errors or suggestions for this data sheet, please go to www.intersil.com/ask our staff
FITs are available from our web site at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
15
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
8.65
A 3
4
0.10 C A-B 2X
6
14
DETAIL"A"
8
0.22±0.03
D
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
5
0.31-0.51
B 3
(0.35) x 45°
4° ± 4°
6
0.25 M C A-B D
TOP VIEW
0.10 C
1.75 MAX
H
1.25 MIN
0.25
GAUGE PLANE C
SEATING PLANE
0.10 C
0.10-0.25
1.27
SIDE VIEW
(1.27)
DETAIL "A"
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
(1.50)
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
16
FN7785.0
January 18, 2011
ISL32483E, ISL32485E
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 2, 11/10
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
6.20 (0.244)
5.80 (0.228)
AREA
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
1
2
8°
0°
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.41 (0.095)
SEATING PLANE
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
1
8
2
7
0.76 (0.030)
1.27 (0.050)
3
6
4
5
-C-
1.27 (0.050)
0.51(0.020)
0.33(0.013)
SIDE VIEW “A
0.25(0.010)
0.10(0.004)
0.200
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
17
FN7785.0
January 18, 2011