KS8803B 10/15 CH PLL INTRODUCTION 16-DIP-300A The KS8803B/4B are designed to select 10/15 channels of cordlss phone of which frequency band is 46/49MHz. It has reference frequency generator, programmable divider for transmit and receive section and phase detector. 16-SOP-225 FEATURES • 10 Channels selectable : KS8803B (both transmit/receive) • 15 Channels selectable : KS8804B (both transmit/receive) • Include oscillation circuit with external x-tal (10.24MHz) • 5KHz output for guard tone • Unlock detector (phase difference more than 6.25us) • Stand-by function for power saving ORDERING INFORMATION Device Package Operating Temperature KS8803B 16-DIP-300A - 30°C ~ + 75°C KS8803BD 16-SOP-225 BLOCK DIAGRAM VDD VS S 15 12 +V DD OSC IN OSC OUT 4 16 F1 REFERENCE DIVIDER 1 PDT 11 TIF 9 PHASE DETECTOR (Tx) PHASE DETECTOR (Rx) PROGRAMMABLE DIVIDER (Tx) PR OGRAMMABLE DIVIDER (Rx) 13 PDR 14 RIF 10 LDT + UNLOCK DETECTOR DECODER 3 5 6 7 8 2 SB D0 D1 D2 D3 MODE KS8803B 10/15 CH PLL PIN CONFIGURATION OSC OUT 1 16 OSC IN MODE 2 15 V DD SB 3 14 RIF F1 4 13 PDR KS8803B D0 5 12 VS S D1 6 11 PDT D2 7 10 LDT D3 8 9 TIF PIN DESCRIPTION Pin No Symbol 1 OSC OUT Description •This output generates reference frequency when it is connected to Pin 16 with external OSC of which frequency is 10.24MHz • Base/Remote Unit Selection Pin 2 MODE “High” : Base Unit “Low” : Remote Unit • Stand-by pin • This input controls Tx PLL for reducing 3 SB the power dissipation “High” : Normal operation “Low” : Stand-by 4 F1 • 5KHz output 5 D0 • Channel selection pins 6 D1 • The Combinations of these inputs select 7 D2 one channel among the 10/15 channels 8 D3 • Input to programmable divider of Tx 9 TIF • AC coupling with VCO • In case of lager signal, It needs DC-coupling • Min. input voltage is 0.1Vrms 10 LDT • Unlocked signal out pin (see output charateristics) KS8803B 10/15 CH PLL PIN DESCRIPTION Pin No Symbol Description • Phase detector output for Tx 11 PDT • PDT detects the phase error from Tx PLL and its output is connected to external low pass filter 12 VSS • This pin is negative supply of the IC. • It usually grounded • Phase detector output for Rx 13 PDR • PDR detects the phase error from Rx PLL and its output is connected to external low pass filter • Input of programmable divider for Rx. • AC coupling with VCO 14 RIF • In case of lager signal (standard CMOS logic), it needs DC coupling • Min. input voltage is 0.1Vrms • This pin is positive supply of the IC 15 VDD • Its reference is VSS, and normally + 3.0V ~ + 5.5V more positive than VSS • X-TAL osc connection pin 16 OSC IN • This input generates the reference frequency when it is connected to pin 1 with external osc KS8803B 10/15 CH PLL ABSOLUTE MAXIMUM RATING ES Characteristic (Ta = 25°C) Symbol Value Unit V VDD - 0.5 ~ 6.0 Input Voltage VI - 0.3 ~ VDD + 0.5 V Power Dissipation PD 350 mW Supply voltage Operating Temperature T OPR - 30 ~ + 75 °C Storage Temperature T STG - 40 ~ + 125 °C ELECTRICAL CHARACTERISTICS Characterostoc Supply Voltage Input Voltage Input Frequency Input Amplitude Symbol (Ta = 25°C, VDD = 5V, unless otherwise specitied) Test Conditions VDD - VIH1 D0 - D3, SB Min Typ Max Unit 3 - 5.5 V 0.7VDD - VDD V VIL1 D0 - D3, SB - - 0.3VDD V VIH2 MODE 0.9VDD - VDD V VIL2 MODE - - 0.1VDD V MHz fI1 VTIF = 0.15Vrms 10 - 52 fl2 VRIF = 0.15Vrms 30 - 42 MHz fI3 OSCIN = 0.3Vrms 5 10.24 11 MHz Vrms VI(AMP)1 fTIF = 52MHz 0.1 - 0.3VDD VI(AMP)2 fRIF = 42MHz 0.1 - 0.3VDD Vrms VI(AMP)3 OSCIN = 11MHz 0.3 - 0.3VDD Vrms IIH VIN = VDD - - 40 µA IIL VIN = VSS - - 40 µA Input Current KS8803B 10/15 CH PLL ELECTRICAL CHARACTERISTICS Characteristic Output Voltage Symbol (Ta = 25°C, VDD = 5V, unless otherwise specified) Test Conditions Min Typ Max Unit VOH1 PDT, RDR : IO = 0.5mA VDD-1.0 - - V VOL1 PDT, RDR : IO = 0.5mA - - 1.0 V VOH2 LDT : IO = 1mA VDD-1.0 - - V VOL2 F1 : IO = 1mA - - 1.0 V Output OFF Leakage ILKG1 PDT, PDR : VO = VDD/VSS - 0.01 1.0 µA Current ILKG2 LDT : VO = VSS - - 5.0 µA ISB1 VDD = 3V (Note 2) - 1.0 2.0 mA ISB2 VDD = 3V (Note 2) 3.5 4.0 - mA IDD1 VDD = 3V (Note 1) - 2.0 3.0 mA IDD2 VDD = 5V (Note 1) - 6.0 7.0 mA Stand-by Current Operating Current • NOTE 1) OSCIN TIF RlF MODE : 10.24MHz X-tal Connection : 27MHz 150mVrms : 42MHz 150mVrrns : VDD, SB = VDD, others are opened • NOTE 2) OSCIN TlF RIF MODE : 10.24MHz X-tal Connection : 27MHz 150rnVrms : 42MHz 150mVrms : VDD, SB = VSS, others are opened • Capacitor more than 2000pF should be connected between VDD & VSS KS8803B 10/15 CH PLL OUTPUT CHARACTERISTICS 1) LOCK tPD tPD tPD : Phase Difference ( 6.25µs ) Reference Divider VDD VSS Programmable Divider VDD VSS LDT Floating 2) UNLOCK VDD Reference Divider VSS Programmable Divider VDD VSS LDT 6.4ms VDD Floating KS8803B 10/15 CH PLL TABLE 1. Channel & Frequency table to Base/Remote input data tor KS8803B (10CH) BASE (MODE = 1) INPUT Rx (fREF = 5KHz) Tx (fREF = 5KHz) D0 D1 D2 D3 CH fRX(MHz) fVCO(MHz) N fTX(MHz) fVCO(MHz) N 1 0 0 0 1 49.670 38.975 7795 46.610 46.610 9322 0 1 0 0 2 49.845 39.150 7830 46.630 46.630 9326 1 1 0 0 3 49.860 39.165 7833 46.670 46.670 9334 0 0 1 0 4 49.770 39.075 7815 46.710 46.710 9342 1 0 1 0 5 49.875 39.180 7836 46.730 46.730 9346 0 1 1 0 6 49.830 39.135 7827 46.770 46.770 9354 1 1 1 0 7 49.890 39.195 7839 46.830 46.830 9366 0 0 0 1 8 49.930 39.235 7847 46.870 46.870 9374 1 0 0 1 9 49.990 39.295 7859 46.930 46.930 9386 0 1 0 1 10 49.970 39.275 7855 46.970 46.970 9394 1 1 0 1 10 49.970 39.275 7855 46.970 46.970 9394 0 0 1 1 10 49.970 39.275 7855 46.970 46.970 9394 1 0 1 1 10 49.970 39.275 7855 46.970 46.970 9394 0 1 1 1 10 49.970 39.275 7855 46.970 46.970 9394 1 1 1 1 10 49.970 39.275 7855 46.970 46.970 9394 0 0 0 0 10 49.970 39.275 7855 46.970 46.970 9394 REMOTE (MODE = 0) INPUT Rx (fREF = 5KHz) Tx (fREF = 5KHz) D0 D1 D2 D3 CH fRX(MHz) fVCO(MHz) N fRX(MHz) fVCO(MHz) N 1 0 0 0 1 46.610 35.915 7183 49.670 49.670 9934 0 1 0 0 2 46.630 35.935 7187 49.845 49.845 9969 1 1 0 0 3 46.670 35.975 7195 49.860 49.860 9972 0 0 1 0 4 46.710 36.015 7203 49.770 49.770 9954 1 0 1 0 5 46.730 36.035 7207 49.875 49.875 9975 0 1 1 0 6 46.770 36.075 7215 49.830 49.830 9966 1 1 1 0 7 46.830 36.135 7227 49.890 49.890 9978 0 0 0 1 8 46.870 36.175 7235 49.930 49.930 9986 1 0 0 1 9 46.930 36.235 7247 49.990 49.990 9998 0 1 0 1 10 46.970 36.275 7255 49.970 49.970 9994 1 1 0 1 10 46.970 36.275 7555 49.970 49.970 9994 0 0 1 1 10 46.970 36.275 7255 49.970 49.970 9994 1 0 1 1 10 46.970 36.275 7255 49.970 49.970 9994 0 1 1 1 10 46.970 36.275 7255 49.970 49.970 9994 1 1 1 1 10 46.970 36.275 7255 49.970 49.970 9994 0 0 0 0 10 46.970 36.275 7255 49.970 49.970 9994 KS8803B 10/15 CH PLL TABLE 2. Channel & Frequency table to Base/Remote input data tor KS8804B (15CH) BASE (MODE = 1) INPUT Rx (fREF = 5KHz) Tx (fREF = 5KHz) D0 D1 D2 D3 CH fRX(MHz) fVCO(MHz) N fTX(MHz) fVCO(MHz) N 1 0 0 0 1 49.695 39.000 7800 46.510 46.510 9302 0 1 0 0 2 49.710 39.015 7803 46.530 46.530 9306 1 1 0 0 3 49.725 39.030 7806 46.550 46.550 9310 0 0 1 0 4 49.740 39.045 7809 46.570 46.570 9314 1 0 1 0 5 49.755 39.060 7812 46.590 46.590 9318 0 1 1 0 6 49.670 38.975 7795 46.610 46.610 9322 1 1 1 0 7 49.845 39.150 7830 46.630 46.630 9326 0 0 0 1 8 49.860 39.165 7833 46.670 46.670 9334 1 0 0 1 9 49.770 39.075 7815 46.710 46.710 9342 0 1 0 1 10 49.875 39.180 7836 46.730 46.730 9346 1 1 0 1 11 49.830 39.135 7827 76.770 46.770 9354 0 0 1 1 12 49.890 39.195 7839 46.830 46.830 9366 1 0 1 1 13 49.930 39.235 7847 46.870 46.870 9374 0 1 1 1 14 49.990 39.295 7859 46.930 46.930 9386 1 1 1 1 15 49.970 39.275 7855 46.970 46.970 9394 0 0 0 0 15 49.970 39.275 7855 46.970 46.970 9394 REMOTE (MODE = 0) INPUT Rx (fREF = 5KHz) Tx (fREF = 5KHz) D0 D1 D2 D3 CH fRX(MHz) fVCO(MHz) N fRX(MHz) fVCO(MHz) N 1 0 0 0 1 46.510 35.815 7163 49.695 49.695 9939 0 1 0 0 2 46.530 35.835 7167 49.710 49.710 9942 1 1 0 0 3 46.550 35.855 7171 49.725 49.725 9945 0 0 1 0 4 46.570 35.875 7175 49.740 49.740 9948 1 0 1 0 5 46.590 35.895 7179 49.755 49.755 9951 0 1 1 0 6 46.610 35.915 7183 49.670 49.670 9934 1 1 1 0 7 46.630 35.935 7187 49.845 49.845 9969 0 0 0 1 8 46.670 35.975 7195 49.860 49.860 9972 1 0 0 1 9 46.710 36.015 7203 49.770 49.770 9954 0 1 0 1 10 46.730 36.035 7207 49.875 49.875 9975 1 1 0 1 11 76.770 36.075 7215 49.830 49.830 9966 0 0 1 1 12 46.830 36.135 7227 49.890 49.890 9978 1 0 1 1 13 46.870 36.175 7235 49.930 49.930 9986 0 1 1 1 14 46.930 36235 7247 49.990 49.990 9998 1 1 1 1 15 46.970 36.275 7255 49.970 49.970 9994 0 0 0 0 15 46.970 36.275 7255 49.970 49.970 9994 KS8803B 10/15 CH PLL APPLICATION CIRCUIT ANT BPF 46.610MHz ( R ) 10.695MHz 49.670MHz ( B ) BPF 1’st MIX 2’nd MIX 49.670MHz ( R ) 39.915MHz 46.610MHz ( B ) 38.975MHz ( B ) 455KHz 10.24MHz TX VCO ( R ) : REMOTE UNIT + RX VCO + ( B ) : BASE UNIT VDD to MICOM ( Unlock Detect ) 16 15 14 13 12 10 9 Phase Detector ( TX ) Phase Detector ( RX ) Programmable Divider ( RX ) 11 Programmable Divider ( TX ) REF. DIVIDER DECODER 1 2 3 4 5 X - TAL 10.24MHz VDD 7 8 to MICOM ( D0, D1, D2, D3 ) BASE REMOTE 6 5.0KHz VDD : TX PLL ENABLE VSS : TX PLL DISABLE