LMH6618 130 MHz, 1.25 mA Rail-to-Rail Input and Output Operational Amplifier with Shutdown General Description Features The LMH6618 is a 130 MHz rail-to-rail input and output amplifier designed for ease of use in a wide range of applications requiring high speed, low supply current, low noise, and the ability to drive complex ADC and video loads. The operating voltage range extends from 2.7V to 11V and the supply current is typically 1.25 mA at 5V. The amplifier’s voltage feedback design topology provides balanced inputs and high open loop gain for ease of use and accuracy in applications such as active filter design. Offset voltage is typically 0.1 mV and settling time to 0.01% is 120 ns which combined with an 80 dBc SFDR at 1 MHz makes the part suitable for use as an input buffer for popular 10-bit and 12-bit mega-sample ADCs. The input common mode range extends 200 mV beyond the supply rails. The output swings to within 270 mV of the supply rails for a 150Ω load and 83 mV of the supply rail for a 1 kΩ load providing true single supply operation and maximum signal dynamic range on low power rails. The amplifier output will source and sink 35 mA and drive up to 15 pF loads without the need for external compensation. The LMH6618 has an active low disable pin which reduces the supply current to 72 µA and is offered in the space saving 6-Pin TSOT23 package. The LMH6618 is available with a −40°C to +125°C extended industrial temperature grade. VS = 5V, RL = 1 kΩ, TA = 25°C and AV = +1, unless otherwise specified. 2.7V to 11V ■ Operating voltage range 1.25 mA ■ Supply current 130 MHz ■ Small signal bandwidth 55 V/µs ■ Slew rate 90 ns ■ Settling time to 0.1% 120 ns ■ Settling time to 0.01% 80 dBc ■ SFDR (f = 1 MHz, AV = +1, VOUT = 2 VPP) 15 MHz ■ 0.1 dB bandwidth (AV = +2) 10 nV/√Hz ■ Low voltage noise −40°C to +125°C ■ Industrial temperature grade ■ Rail-to-Rail input and output Applications ■ ■ ■ ■ ■ ■ ■ ADC driver DAC buffer Active filters High speed sensor amplifier Current sense amplifier Portable video STB, TV video amplifier Typical Application 20195829 WEBENCH® is a registered trademark of National Semiconductor Corporation. © 2007 National Semiconductor Corporation 201958 www.national.com LMH6618 130 MHz, 1.25 mA Rail-to-Rail Input and Output Operational Amplifier with Shutdown August 2007 LMH6618 Supply Voltage (VS = V+ – V−) Junction Temperature (Note 3) Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Operating Ratings V+ 12V 150°C max (Note 1) Supply Voltage (VS = – Ambient Temperature Range (Note 3) ESD Tolerance (Note 2) Human Body Model For input pins only For all other pins Machine Model 2000V 2000V 200V V−) 2.7V to 11V −40°C to +125°C Package Thermal Resistance (θJA) 6-Pin TSOT23 231°C/W +3V Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = +25°C, V+ = 3V, V− = 0V, DISABLE = 3V, VCM = VO = V+/2, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF. Boldface Limits apply at temperature extremes. (Note 4) Symbol Parameter Condition Min (Note 8) Typ (Note 7) Max (Note 8) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal AV = 1, RL = 1 kΩ, VOUT = 0.2 VPP 120 AV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP 56 GBW Gain Bandwidth AV = 10, RF = 2 kΩ, RG = 221Ω, RL = 1 kΩ, VOUT = 0.2 VPP LSBW −3 dB Bandwidth Large Signal AV = 1, RL = 1 kΩ, VOUT = 2 VPP 13 AV = 2, RL = 150Ω, VOUT = 2 VPP 13 55 MHz 71 MHz MHz Peak Peaking AV = 1, CL = 5 pF 1.5 dB 0.1 dBBW 0.1 dB Bandwidth AV = 2, VOUT = 0.5 VPP , 15 MHz DG Differential Gain 0.1 % 0.1 deg 36 ns 46 V/μs RF = RG = 825Ω AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to DP Differential Phase V+/2 AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2 Time Domain Response tr/tf Rise & Fall Time 2V Step, AV = 1 SR Slew Rate 2V Step, AV = 1 ts_0.1 0.1% Settling Time 2V Step, AV = −1 90 ts_0.01 0.01% Settling Time 2V Step, AV = −1 120 fC = 100 kHz, VOUT= 2 VPP, RL = 1 kΩ 100 fC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩ 80 fC = 5 MHz, VOUT = 2 VPP, RL = 1 kΩ 58 36 ns Noise and Distortion Performance SFDR Spurious Free Dynamic Range dBc en Input Voltage Noise f = 100 kHz 10 nV/ in Input Current Noise f = 100 kHz 1 pA/ Input, DC Performance VOS Input Offset Voltage VCM = 0.5V (pnp active) VCM = 2.5V (npn active) 0.1 ±0.6 ±1.0 TCVOS Input Offset Voltage Average Drift (Note 5) 0.8 IB Input Bias Current VCM = 0.5V (pnp active) −1.4 −2.6 VCM = 2.5V (npn active) +1.0 +1.8 ±0.27 mV μV/°C μA μA IO Input Offset Current 0.01 CIN Input Capacitance 1.5 pF RIN Input Resistance 8 MΩ www.national.com 2 Parameter Condition DC, CMRR ≥ 65 dB CMVR Input Voltage Range CMRR Common Mode Rejection Ratio VCM Stepped from −0.1V to 1.4V Open Loop Gain Typ (Note 7) −0.2 VCM Stepped from 2.0V to 3.1V AOL Min (Note 8) 78 96 81 107 RL = 1 kΩ to V+/2 98 RL = 150Ω to V+/2 82 Max (Note 8) Units 3.2 V dB dB Output DC Characteristics VO Output Swing High (Voltage from V+ Supply Rail) Output Swing Low (Voltage from V− Supply Rail) RL = 1 kΩ to V+/2 56 62 50 RL =150Ω to V+/2 172 198 160 RL = 1 kΩ to V+/2 60 66 74 RL =150Ω to V+/2 170 184 217 RL = 150Ω to V− 29 39 43 IOUT Linear Output Current VOUT = V+/2 (Note 6) RO Output Resistance f = 1 MHz ±25 mV ±35 mA 0.17 Ω Enable Pin Operation Enable High Voltage Threshold Enabled Enable Pin High Current VDISABLE = 3V Enable Low Voltage Threshold Disabled Enable Pin Low Current VDISABLE = 0V 2.0 V 0.04 µA 1.0 V 1 µA Ton Turn-On Time 25 ns Toff Turn-Off Time 90 ns 104 dB Power Supply Performance PSRR Power Supply Rejection Ratio DC, VCM = 0.5V, VS = 2.7V to 11V 84 IS Supply Current RL = ∞ 1.2 1.5 1.7 mA ISD Disable Shutdown Current DISABLE = 0V 59 85 μA +5V Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = +25°C, V+ = 5V, V− = 0V, DISABLE = 5V, VCM = VO = V+/2, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF. Boldface Limits apply at temperature extremes. Symbol Parameter Condition Min (Note 8) Typ (Note 7) Max (Note 8) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal AV = 1, RL = 1 kΩ, VOUT = 0.2 VPP 130 AV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP 53 GBW Gain Bandwidth AV = 10, RF = 2 kΩ, RG = 221Ω, RL = 1 kΩ, VOUT = 0.2 VPP LSBW −3 dB Bandwidth Large Signal AV = 1, RL = 1 kΩ, VOUT = 2 VPP 15 AV = 2, RL = 150Ω, VOUT = 2 VPP 15 54 64 MHz MHz MHz Peak Peaking AV = 1, CL = 5 pF 0.5 dB 0.1 dBBW 0.1 dB Bandwidth AV = 2, VOUT = 0.5 VPP, 15 MHz DG Differential Gain 0.1 % RF = RG = 1 kΩ AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2 3 www.national.com LMH6618 Symbol LMH6618 Symbol DP Parameter Differential Phase Condition Min (Note 8) AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, Typ (Note 7) Max (Note 8) 0.1 Units deg RL = 150Ω to V+/2 Time Domain Response tr/tf Rise & Fall Time 2V Step, AV = 1 SR Slew Rate 2V Step, AV = 1 ts_0.1 0.1% Settling Time 2V Step, AV = −1 90 ts_0.01 0.01% Settling Time 2V Step, AV = −1 120 fC = 100 kHz, VOUT = 2 VPP, RL = 1 kΩ 100 fC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩ 80 44 30 ns 55 V/μs ns Distortion and Noise Performance SFDR Spurious Free Dynamic Range dBc fC = 5 MHz, VO = 2 VPP, RL = 1 kΩ 58 en Input Voltage Noise f = 100 kHz 10 nV/ in Input Current Noise f = 100 kHz 1 pA/ Input, DC Performance VOS Input Offset Voltage VCM = 0.5V (pnp active) VCM = 4.5V (npn active) 0.1 ±0.6 ±1.0 TCVOS Input Offset Voltage Average Drift (Note 5) 0.8 IB Input Bias Current VCM = 0.5V (pnp active) −1.5 −2.4 VCM = 4.5V (npn active) +1.0 +1.9 ±0.26 mV µV/°C μA μA IO Input Offset Current 0.01 CIN Input Capacitance 1.5 pF RIN Input Resistance 8 MΩ CMVR Input Voltage Range DC, CMRR ≥ 65 dB CMRR Common Mode Rejection Ratio VCM Stepped from −0.1V to 3.4V 81 98 VCM Stepped from 4.0V to 5.1V 84 108 AOL Open Loop Gain −0.2 5.2 RL = 1 kΩ to V+/2 100 RL = 150Ω to V+/2 83 V dB dB Output DC Characteristics VO Output Swing High (Voltage from V+ Supply Rail) Output Swing Low (Voltage from V− Supply Rail) RL = 1 kΩ to V+/2 73 82 60 RL =150Ω to V+/2 255 295 230 RL = 1 kΩ to V+/2 75 83 96 RL =150Ω to V+/2 250 270 321 RL = 150Ω to V− 32 43 45 IOUT Linear Output Current VOUT = V+/2 (Note 6) RO Output Resistance f = 1 MHz ±25 mV ±35 mA 0.17 Ω Enable Pin Operation Enable High Voltage Threshold Enabled Enable Pin High Current VDISABLE = 5V Enable Low Voltage Threshold Disabled Enable Pin Low Current VDISABLE = 0V 3.0 V 1.2 µA 2.0 V 2.5 µA Ton Turn-On Time 25 ns Toff Turn-Off Time 90 ns www.national.com 4 Parameter Condition Min (Note 8) Typ (Note 7) Max (Note 8) Units Power Supply Performance PSRR Power Supply Rejection Ratio DC, VCM = 0.5V, VS = 2.7V to 11V IS Supply Current RL = ∞ ISD Disable Shutdown Current DISABLE = 0V 84 104 dB 1.25 1.5 1.7 mA 72 105 μA ±5V Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TJ = +25°C, V+ = 5V, V− = −5V, DISABLE = 5V, VCM = VO = 0V, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, RL = 1 kΩ || 5 pF. Boldface Limits apply at temperature extremes. Symbol Parameter Condition Min (Note 8) Typ (Note 7) Max (Note 8) Units Frequency Domain Response SSBW –3 dB Bandwidth Small Signal AV = 1, RL = 1 kΩ, VOUT = 0.2 VPP 140 AV = 2, −1, RL = 1 kΩ, VOUT = 0.2 VPP 53 GBW Gain Bandwidth AV = 10, RF = 2 kΩ, RG = 221Ω, RL = 1 kΩ, VOUT = 0.2 VPP LSBW −3 dB Bandwidth Large Signal AV = 1, RL = 1 kΩ, VOUT = 2 VPP 16 AV = 2, RL = 150Ω, VOUT = 2 VPP 15 Peak Peaking AV = 1, CL = 5 pF 0.1 dBBW 0.1 dB Bandwidth AV = 2, VOUT = 0.5 VPP, DG Differential Gain 54 MHz 65 MHz MHz 0.05 dB 15 MHz 0.1 % 0.1 deg 30 ns 57 V/μs RF = RG = 1.21 kΩ AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2 DP Differential Phase AV = +2, 4.43 MHz, 0.6V < VOUT < 2V, RL = 150Ω to V+/2 Time Domain Response tr/tf Rise & Fall Time 2V Step, AV = 1 SR Slew Rate 2V Step, AV = 1 ts_0.1 0.1% Settling Time 2V Step, AV = −1 90 ts_0.01 0.01% Settling Time 2V Step, AV = −1 120 fC = 100 kHz, VOUT = 2 VPP, RL = 1 kΩ 100 fC = 1 MHz, VOUT = 2 VPP, RL = 1 kΩ 80 45 ns Noise and Distortion Performance SFDR Spurious Free Dynamic Range dBc fC = 5 MHz, VOUT = 2 VPP, RL = 1 kΩ 58 en Input Voltage Noise f = 100 kHz 10 nV/ in Input Current Noise f = 100 kHz 1 pA/ Input DC Performance VOS Input Offset Voltage VCM = −4.5V (pnp active) VCM = 4.5V (npn active) 0.1 TCVOS Input Offset Voltage Average Drift (Note 5) 0.9 IB Input Bias Current VCM = −4.5V (pnp active) −1.5 −2.4 VCM = 4.5V (npn active) +1.0 +1.9 ±0.26 IO Input Offset Current 0.01 CIN Input Capacitance 1.5 RIN Input Resistance CMVR Input Voltage Range ±0.6 ±1.0 µV/°C −5.2 5 μA μA pF 8 DC, CMRR ≥ 65 dB mV MΩ 5.2 V www.national.com LMH6618 Symbol LMH6618 Symbol CMRR AOL Parameter Common Mode Rejection Ratio Open Loop Gain Condition Min (Note 8) Typ (Note 7) VCM Stepped from −5.1V to 3.4V 84 100 VCM Stepped from 4.0V to 5.1V 83 108 RL = 1 kΩ to V+/2 95 RL = 150Ω to 84 V+/2 Max (Note 8) Units dB dB Output DC Characteristics VO Output Swing High (Voltage from V+ Supply Rail) Output Swing Low (Voltage from V− Supply Rail) RL = 1 kΩ to GND 111 126 100 RL =150Ω to GND 457 526 430 RL = 1 kΩ to GND 110 121 136 RL =150Ω to GND 440 474 559 RL = 150Ω to V− 35 51 52 IOUT Linear Output Current VOUT = V+/2 (Note 6) RO Output Resistance f = 1 MHz ±25 mV ±35 mA 0.17 Ω 16 µA Enable Pin Operation Enable High Voltage Threshold Enabled Enable Pin High Current VDISABLE = +5V Enable Low Voltage Threshold Disabled Enable Pin Low Current VDISABLE = −5V 5.5 V 4.5 V 17 µA Ton Turn-On Time 25 ns Toff Turn-Off Time 90 ns 104 dB Power Supply Performance PSRR Power Supply Rejection Ratio DC, VCM = −4.5V, VS = 2.7V to 11V 84 IS Supply Current RL = ∞ 1.35 1.6 1.9 mA ISD Disable Shutdown Current DISABLE = −5V 103 140 μA Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). Note 3: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board. Note 4: Boldface limits apply to temperature range of −40°C to 125°C Note 5: Voltage average drift is determined by dividing the change in VOS by temperature change. Note 6: Do not short circuit the output. Continuous source or sink currents larger than the IOUT typical are not recommended as it may damage the part. Note 7: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Note 8: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using the Statistical Quality Control (SQC) method. www.national.com 6 LMH6618 Connection Diagram 6-Pin TSOT23 20195801 Top View Ordering Information Package 6-Pin TSOT23 Part Number LMH6618MK LMH6618MKX Package Marking Transport Media 1k Units Tape and Reel AE4A 3k Units Tape and Reel 7 NSC Drawing MK06A www.national.com LMH6618 Typical Performance Characteristics At TJ = 25°C, AV = +1 (RF = 0Ω), otherwise RF = 2 kΩ for AV ≠ +1, unless otherwise specified. Closed Loop Frequency Response for Various Supplies Closed Loop Frequency Response for Various Supplies 20195831 20195816 Closed Loop Frequency Response for Various Supplies Closed Loop Frequency Response for Various Supplies 20195815 20195817 Closed Loop Frequency Response for Various Temperatures Closed Loop Frequency Response for Various Temperatures 20195819 www.national.com 20195820 8 LMH6618 Closed Loop Gain vs. Frequency for Various Gains Large Signal Frequency Response 20195818 20195830 ±0.1 dB Gain Flatness for Various Supplies Small Signal Frequency Response with Various Capacitive Load 20195832 20195826 Small Signal Frequency Response with Capacitive Load and Various RISO HD2 vs. Frequency and Supply Voltage 20195835 20195827 9 www.national.com LMH6618 HD3 vs. Frequency and Supply Voltage HD2 and HD3 vs. Frequency and Load 20195871 20195836 HD2 and HD3 vs. Common Mode Voltage HD2 and HD3 vs. Common Mode Voltage 20195873 20195872 HD2 vs. Frequency and Gain HD3 vs. Frequency and Gain 20195875 20195874 www.national.com 10 LMH6618 Open Loop Gain/Phase HD2 vs. Output Swing 20195833 20195843 HD3 vs. Output Swing HD2 vs. Output Swing 20195844 20195845 HD2 vs. Output Swing HD3 vs. Output Swing 20195869 20195846 11 www.national.com LMH6618 HD3 vs. Output Swing THD vs. Output Swing 20195847 20195870 Settling Time vs. Input Step Amplitude (Output Slew and Settle Time) Input Noise vs. Frequency 20195876 20195821 VOS vs. VOUT VOS vs. VOUT 20195849 www.national.com 20195850 12 LMH6618 VOS vs. VCM VOS vs. VS (pnp) 20195852 20195851 VOS vs. VS (npn) VOS vs. IOUT 20195853 20195854 VOS Distribution (pnp and npn) IB vs. VS (pnp) 20195855 20195877 13 www.national.com LMH6618 IB vs. VS (npn) IS vs. VS 20195857 20195856 VOUT vs. VS VOUT vs. VS 20195858 20195859 VOUT vs. VS Closed Loop Output Impedance vs. Frequency AV = +1 20195860 www.national.com 20195822 14 LMH6618 PSRR vs. Frequency PSRR vs. Frequency 20195838 20195837 CMRR vs. Frequency Small Signal Step Response 20195805 20195823 Small Signal Step Response Small Signal Step Response 20195806 20195804 15 www.national.com LMH6618 Small Signal Step Response Small Signal Step Response 20195808 20195809 Small Signal Step Response Small Signal Step Response 20195807 20195811 Small Signal Step Response Small Signal Step Response 20195812 www.national.com 20195810 16 LMH6618 Large Signal Step Response Large Signal Step Response 20195813 20195814 Overload Recovery Waveform IS vs. VDISABLE 20195824 20195861 17 www.national.com LMH6618 which will reduce the supply current to typically less than 100 µA. The DISABLE pin is “active low” and should be connected through a resistor to V+ for normal operation. Shutdown is guaranteed when the DISABLE pin is 0.5V below the supply midpoint at any operating supply voltage and temperature. In the shutdown mode, essentially all internal device biasing is turned off in order to minimize supply current flow and the output goes into high impedance mode. During shutdown, the input stage has an equivalent circuit as shown in Figure 2. Application Information The LMH6618 is based on National Semiconductor’s proprietary VIP10 dielectrically isolated bipolar process. This device family architecture features the following: • Complimentary bipolar devices with exceptionally high ft (∼8GHz) even under low supply voltage (2.7V) and low bias current. • Common emitter push-push output stage. This architecture allows the output to reach within millivolts of either supply rail. • Consistent performance from any supply voltage (2.7V 11V) with little variation with supply voltage for the most important specifications (e.g. BW, SR, IOUT.) • Significant power saving compared to competitive devices on the market with similar performance. With 3V supplies and a common mode input voltage range that extends beyond either supply rail, the LMH6618 is well suited to many low voltage/low power applications. Even with 3V supplies, the −3 dB BW (at AV = +1) is typically 120 MHz. The LMH6618 is designed to avoid output phase reversal. With input over-drive, the output is kept near the supply rail (or as close to it as mandated by the closed loop gain setting and the input voltage). Figure 1 shows the input and output voltage when the input voltage significantly exceeds the supply voltages. 20195839 FIGURE 2. Input Equivalent Circuit During Shutdown When the LMH6618 is shutdown, there may be current flow through the internal diodes shown, caused by input potential, if present. This current may flow through the external feedback resistor and result in an apparent output signal. In most shutdown applications the presence of this output is inconsequential. However, if the output is “forced” by another device, the other device will need to conduct the current described in order to maintain the output potential. To keep the output at or near ground during shutdown when there is no other device to hold the output low, a switch using a transistor can be used to shunt the output to ground. SINGLE CHANNEL ADC DRIVER The low noise and wide bandwidth make the LMH6618 an excellent choice for driving a 12-bit ADC. Figure 3 shows the schematic of the LMH6618 driving an ADC121S101. The ADC121S101 is a single channel 12-bit ADC. The LMH6618 is set up in a 2nd order multiple-feedback configuration with a gain of −1. The −3 db point is at 500 kHz and the −0.01 dB point is at 100 kHz. Table 1 shows the performance data of the LMH6618 and the ADC121S101. 20195825 FIGURE 1. Input and Output Shown with CMVR Exceeded If the input voltage range is exceeded by more than a diode drop beyond either rail, the internal ESD protection diodes will start to conduct. The current flow in these ESD diodes should be externally limited. The LMH6618 can be shutdown by connecting the DISABLE pin to a voltage 0.5V below the supply midpoint www.national.com 18 LMH6618 20195829 FIGURE 3. LMH6618 Driving an ADC121S101 TABLE 1. Performance Data for the LMH6618 Driving an ADC121S101 Parameter Measured Value Signal Frequency 100 kHz Signal Amplitude 4.5V SINAD 71.5 dB SNR 71.87 dB THD −82.4 dB SFDR 90.97 dB ENOB 11.6 bits When the op amp and the ADC are using the same supply, it is important that both devices are well bypassed. A 0.1 µF ceramic capacitor and a 10 µF tantalum capacitor should be located as close as possible to each supply pin. A sample layout is shown in Figure 4. The 0.1 µF capacitors (C13 and C6) and the 10 µF capacitors (C11 and C5) are located very close to the supply pins of the LMH6618 and the ADC121S101. 19 www.national.com LMH6618 20195840 FIGURE 4. LMH6618 and ADC121S101 Layout C121S705. The ADC121S705 is a fully differential 12-bit ADC. Performance with this circuit is similar to the circuit in Figure 3. DIFFERENTIAL ADC DRIVER The circuit in Figure 3 can be used to drive both inputs of a differential ADC. Figure 5 shows the LMH6618 driving an AD- 20195842 FIGURE 5. LMH6618 Driving an ADC121S705 www.national.com 20 For the example the supply voltage will be +5V. Noise gain = 2 + 2/5V = 2.4. RF = 2 kΩ R1 = 2 kΩ/2 = 1 kΩ R2 = 2 kΩ/(2.4-2) = 5 kΩ. RG = 2 kΩ/(2.4 – 1) = 1.43 kΩ. 20195848 FIGURE 6. DC Level Shifting 4th ORDER MULTIPLE FEEDBACK LOW-PASS FILTER Figure 7 shows the LMH6618 used as the amplifier in a multiple feedback low-pass filter. This filter is set up to have a gain of +1 and a −3 dB point of 1 MHz. Values can be determined by using the WEBENCH® Active Filter Designer found at amplifiers.national.com. 20195828 FIGURE 7. 4th Order Multiple Feedback Low-Pass Filter 21 www.national.com LMH6618 7. 8. 9. 10. 11. 12. DC LEVEL SHIFTING Often a signal must be both amplified and level shifted while using a single supply for the op amp. The circuit in Figure 6 can do both of these tasks. The procedure for specifying the resistor values is as follows. 1. Determine the input voltage. 2. Calculate the input voltage midpoint, VINMID = VINMIN + (VINMAX – VINMIN)/2. 3. Determine the output voltage needed. 4. Calculate the output voltage midpoint, VOUTMID = VOUTMIN + (VOUTMAX – VOUTMIN)/2. 5. Calculate the gain needed, gain = (VOUTMAX – VOUTMIN)/ (VINMAX – VINMIN) 6. Calculate the amount the voltage needs to be shifted from input to output, ΔVOUT = VOUTMID – gain x VINMID. 7. Set the supply voltage to be used. 8. Calculate the noise gain, noise gain = gain + ΔVOUT/VS. 9. Set RF. 10. Calculate R1, R1 = RF/gain. 11. Calculate R2, R2 = RF/(noise gain-gain). 12. Calculate RG, RG= RF/(noise gain – 1). Check that both the VIN and VOUT are within the voltage ranges of the LMH6618. The following example is for a VIN of 0V to 1V with a VOUT of 2V to 4V. 1. VIN = 0V to 1V. 2. VINMID = 0V + (1V – 0V)/2 = 0.5V. 3. VOUT = 2V to 4V. 4. VOUTMID = 2V + (4V – 2V)/2 = 3V. 5. Gain = (4V – 2V)/(1V – 0V) = 2 6. ΔVOUT = 3V – 2 x 0.5V = 2. LMH6618 CURRENT SENSE AMPLIFIER With it’s rail-to-rail input and output capability, low VOS, and low IB the LMH6618 is an ideal choice for a current sense amplifier application. Figure 8 shows the schematic of the LMH6618 set up in a low-side sense configuration which provides a conversion gain of 2V/A. Voltage error due to VOS can be calculated to be VOS x (1 + RF/RG) or 0.6 mV x 21 = 12.6 mV. Voltage error due to IO is IO x RF or 0.26 µA x 1 kΩ = 0.26 mV. Hence total voltage error is 12.6 mV + 0.26 mV or 12.86 mV which translates into a current error of 12.86 mV/(2 V/A) = 6.43 mA. (1) (2) 20195841 FIGURE 8. Current Sense Amplifier 20195865 TRANSIMPEDANCE AMPLIFIER By definition, a photodiode produces either a current or voltage output from exposure to a light source. A Transimpedance Amplifier (TIA) is utilized to convert this low-level current to a usable voltage signal. The TIA often will need to be compensated to insure proper operation. FIGURE 10. Bode Plot of Noise Gain Intersecting with Op Amp Open-Loop Gain Figure 10 shows the bode plot of the noise gain intersecting the op amp open loop gain. With larger values of gain, CT and RF create a zero in the transfer function. At higher frequencies the circuit can become unstable due to excess phase shift around the loop. A pole at fP in the noise gain function is created by placing a feedback capacitor (CF) across RF. The noise gain slope is flattened by choosing an appropriate value of CF for optimum performance. Theoretical expressions for calculating the optimum value of CF and the expected −3 dB bandwidth are: (3) 20195862 (4) FIGURE 9. Photodiode Modeled with Capacitance Elements Equation 4 indicates that the −3 dB bandwidth of the TIA is inversely proportional to the feedback resistor. Therefore, if the bandwidth is important then the best approach would be to have a moderate transimpedance gain stage followed by a broadband voltage gain stage. Table 2 shows the measurement results of the LMH6618 with different photodiodes having various capacitances (CPD) and a feedback resistance (RF) of 1 kΩ. Figure 9 shows the LMH6618 modeled with photodiode and the internal op amp capacitances. The LMH6618 allows circuit operation of a low intensity light due to its low input bias current by using larger values of gain (RF). The total capacitance (CT) on the inverting terminal of the op amp includes the photodiode capacitance (C PD) and the input capacitance of the op amp (CIN). This total capacitance (CT) plays an important role in the stability of the circuit. The noise gain of this circuit determines the stability and is defined by: www.national.com 22 CPD CT CF CAL CF USED f −3 dB CAL f −3 dB MEAS Peaking (pF) (pF) (pF) (pF) (MHz) (MHz) (dB) 22 24 7.7 5.6 23.7 20 0.9 47 49 10.9 10 16.6 15.2 0.8 100 102 15.8 15 11.5 10.8 0.9 222 224 23.4 18 7.81 8 2.9 Note: GBWP = 65 MHz CT = CPD + CIN CIN = 2 pF VS = ±2.5V Figure 11 shows the frequency response for the various photodiodes in Table 2. When analyzing the noise at the output of the TIA, it is important to note that the various noise sources (i.e. op amp noise voltage, feedback resistor thermal noise, input noise current, photodiode noise current) do not all operate over the same frequency band. Therefore, when the noise at the output is calculated, this should be taken into account. The op amp noise voltage will be gained up in the region between the noise gain’s zero and pole (fZ and fP in Figure 10). The higher the values of RF and CT, the sooner the noise gain peaking starts and therefore its contribution to the total output noise will be larger. It is obvious to note that it is advantageous to minimize CIN by proper choice of op amp or by applying a reverse bias across the diode at the expense of excess dark current and noise. 20195868 FIGURE 11. Frequency Response for Various Photodiode and Feedback Capacitors 23 www.national.com LMH6618 TABLE 2. TIA (Figure 1) Compensation and Performance Results LMH6618 Physical Dimensions inches (millimeters) unless otherwise noted 6-Pin TSOT23 NS Package Number MK06A www.national.com 24 LMH6618 Notes 25 www.national.com LMH6618 130 MHz, 1.25 mA Rail-to-Rail Input and Output Operational Amplifier with Shutdown Notes THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL’S PRODUCT WARRANTY. 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