LTC1427-50 Micropower, 10-Bit Current Output DAC with SMBus Serial Interface U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision 50µA, ± 1.5% Initial Full-Scale Output Current, ±2.5% Over Temperature Wide Output Voltage DC Compliance: – 15V to (VCC – 1.3V) Wide Supply Range: 2.7V ≤ VCC ≤ 5.5V Supply Current in Shutdown: 10µA Typ Low Supply Current: 115µA Typ Available in 8-Pin SO SMBus Serial Interface Four Selectable SMBus Addresses DAC Powers Up at Zero or Midscale DAC Contents Are Retained in Shutdown The LTC®1427-50 is a micropower, 10-Bit current output DAC with an output range of 0µA to 50µA. The DAC output is guaranteed monotonic and DNL is less than 0.9LSB under all operating conditions. Full-scale accuracy is ±2.5% over the commercial temperature range. The LTC1427-50 operates with power supply voltages from 2.7V to 5.5V and the DAC current source output can be biased from (VCC – 1.3V) to – 15V. The LTC1427-50 communicates with external circuitry by using the SMBus serial interface. It acts as an SMBus slave device using one of four selectable SMBus addresses set by the two address pins AD0 and AD1 . On power-up, the DAC output assumes midrange or zero scale, depending on the logic state of the two address pins. The LTC1427-50 can be shut down through the SHDN pin or by setting the SHDN bit = 1 in the SMBus command byte. Digital data for the DAC output is retained internally and the supply current drops to 10µA typically when in shutdown. The LTC1427-50 is available in an 8-pin SO package. U APPLICATIONS ■ ■ ■ ■ ■ LCD Contrast and Backlight Brightness Control Power Supply Voltage Adjustment Battery Charger Voltage/Current Adjustment GaAs FET Bias Adjustment Trimmer Pot Elimination , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATION Digitally Controlled LCD Bias Generator D1 L1 VOUT* 2 TO 4 CELLS SHDN 1µF 3 6 5 VIN SW LT1317 SHDN GND 4 FB R1 226k 1% VCC 3.3V 2 R2 12.1k 1% VC 1 4700pF 100k C1 1µF LTC1427-50 1 2 3 4 SHDN VCC AD1 IOUT AD0 SCL GND SDA 8 7 6 5 µPU (e.g., 8051) P1.2 P1.1 P1.0 L1 = 10 µH SUMIDA CD43 MURATA-ERIE LQH3C OR COILCRAFT DO1608 D1 =MBR0530 1427 TA02 *VOUT = 12.7V TO 24V IN 11mV STEPS 15mA (2 CELLS) 35mA ( 3 CELLS) 1 LTC1427-50 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) ORDER PART NUMBER TOP VIEW Total Supply Voltage (VCC) ........................................ 7V Input Voltage (All Inputs)............. – 0.3V to (VCC + 0.3V) DAC Output Voltage ...................... – 15V to (VCC + 0.3V) DAC Output Short-Circuit Duration .................. Indefinite Operating Ambient Temperature Range ....... 0°C to 70°C Junction Temperature .......................................... 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec.)................. 300°C SHDN 1 8 VCC AD1 2 7 IOUT AD0 3 6 SCL GND 4 5 SDA LTC1427CS8-50 S8 PART MARKING S8 PACKAGE 8-LEAD PLASTIC SO 14275 TJMAX = 125°C, θJA = 190°C/ W Consult factory for Industrial and Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VCC Supply Voltage ICC Supply Current TA = operating temperature range unless otherwise specified. CONDITIONS VSHDN = VSCL = VSDA = VCC = 3.3V VSHDN = 0V DAC Resolution IFS DAC Full-Scale Current MIN ● 115 10 ● ● ● MAX 49.25 48.75 UNITS 5.5 V 225 25 µA µA 10 ● VCC = 3.3V, V(IOUT) = 0V TYP 2.7 Bits 50 50 50.75 51.25 µA µA IZS DAC Zero-Scale Current VCC = 3.3V, V(IOUT) = 0V ● ±0.1 ±200 nA DNL DAC Differential Nonlinearity VCC = 3.3V, Monotonicity Guaranteed, V(IOUT) = 0V ● ±0.15 ±0.9 LSB Supply Voltage Rejection VCC = 2.7V to 5.5V, V(IOUT) = 0V ● ±8 LSB Output Voltage Rejection VCC = 3.3V, Full-Scale Current, – 15V ≤ V(IOUT) ≤ 2V ● ±5 LSB IIN Logic Input Current 0V ≤ VIN ≤ VCC ● ±1 µA VIH High Level Input Voltage AD0, AD1 SHDN SCL, SDA ● ● ● VIL Low Level Input Voltage SHDN, AD0, AD1 SCL, SDA ● ● 0.8 0.6 V V VOL Low Level Output Voltage IOUT = 3mA, SDA Only ● 0.4 V 2 VCC – 0.3 2.4 1.4 V V V LTC1427-50 U U U U WW RECO E DED OPERATI G CO DITIO S VCC = 3.3V, TA = operating temperature range unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 100 kHz SMBus Timing (Notes 2, 3) fSMB SMB Operating Frequency ● 10 tBUF Bus Free Time Between Stop and Start Condition ● 4.7 µs tHD:STA Hold Time After (Repeated) Start Condition ● 4.0 µs tSU:STA Repeated Start Condition Setup Time ● 4.7 µs tSU:STO Stop Condition Setup Time ● 4.0 µs tHD:DAT Data Hold Time ● 300 ns tSU:DAT Data Setup Time ● 250 ns tLOW Clock Low Period ● 4.7 µs tHIGH Clock High Period ● 4.0 tf Clock/Data Fall Time ● 300 ns tr Clock/Data Rise Time ● 1000 ns The ● denotes specifications that apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those beyond which the life of the device may be impaired. µs 50 Note 2: All values are referenced to VIH and VIL levels. Note 3: These parameters are guaranteed by design and are not tested. Refer to the Timing Diagrams for additional information. U W TYPICAL PERFORMANCE CHARACTERISTICS DNL vs Code INL vs Code 6 1.0 4 2 INL (LSB) DNL (LSB) 0.5 0 0 –2 –4 –6 –0.5 –8 –1.0 –10 0 512 CODE 1024 1247 G01 0 512 CODE 1024 1247 G02 3 LTC1427-50 U W TYPICAL PERFORMANCE CHARACTERISTICS Full-Scale Current vs Temperature Zero-Scale Current vs Temperature 52 0.02 V(IOUT) = 0V 0 51 OUTPUT CURRENT (µA) OUTPUT CURRENT (µA) –0.02 –0.04 –0.06 –0.08 –0.10 –0.12 50 49 –0.14 –0.16 V (IOUT) = 0V –0.18 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 48 –50 –25 150 0 25 50 75 100 125 1427 G04 1427 G03 Bias Voltage Rejection (Zero-Scale Current) Bias Voltage Rejection (Full-Scale Current) 1.0 TA = 25°C VCC = 3.3V FULL-SCALE OUTPUT ERROR (LSB) ZERO-SCALE OUTPUT CURRENT (nA) 4 2 0 –2 –4 –15 –12 –9 –6 –3 0 IOUT BIAS VOLTAGE (V) 3 TA = 25°C VCC = 3.3V 0.5 0 –0.5 –1.0 –15 –12 6 –9 –6 –3 0 IOUT BIAS VOLTAGE (V) 6 Shutdown Current vs Temperature Supply Current vs Temperature Supply Voltage Rejection 200 2 3 1427 G06 1427 G05 20 TA = 25°C V(IOUT) = 0V 0 –1 –2 0 1 2 3 4 5 SUPPLY VOLTAGE (V) 6 7 1427 G07 4 VCC = 3.3V 150 SHUTDOWN CURRENT (µA) 1 SUPPLY CURRENT (µA) FULL-SCALE OUTPUT ERROR (LSB) 150 TEMPERATURE (°C) VCC = 5.5V VCC = 2.7V 100 50 0 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 150 1527 G08 VCC = 3.3V 15 VCC = 5.5V 10 VCC = 2.7V 5 0 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) 150 1527 G09 LTC1427-50 U U U PIN FUNCTIONS SHDN (Pin 1): Shutdown. A logic low puts the chip into shutdown mode. In shutdown, the digital settings for the DAC are retained. On release from shutdown, the previously programmed value for IOUT is reinstated. AD1, AD0 (Pins 2, 3): Address Selection Pins. Tie these two pins to either VCC or GND to select one of four SMBus addresses to which the LTC1427-50 will respond. GND (Pin 4): Ground. Ground should be tied directly to a ground plane. up resistor or current source to VCC. Data is shifted into the SDA pin and acknowledged by the SDA pin. SCL (Pin 6): SMBus Clock Input. Data is shifted into the SDA pin at the rising edges of the SCL clock during data transfer. IOUT (Pin 7): DAC Current Output. VCC (Pin 8): Voltage Supply. This supply must be kept free from noise and ripple by bypassing directly to the ground plane. SDA (Pin 5): SMBus Bidirectional Data Input/Digital Output. This pin is an open-drain output and requires a pull- U U AD1 AD0 L L FU CTIO TABLES SMBus Address Location DAC Power-Up Value 0101101 Application Zero-Scale CCFL Backlight Control L H 0101111 Zero-Scale General Purpose H L 0101110 Zero-Scale General Purpose H H 0101100 Midscale LCD Contrast Control W BLOCK DIAGRAM SHDN SD POWER-ON RESET 3 SCL SDA SMBUS INTERFACE REGISTER A 3-BIT LATCH EN1 AD0 AD1 1 REGISTER B 1-BIT LATCH EN2 VOLTAGE REFERENCE SD SHDN 2 REGISTER C 8 10-BIT LATCH SD 10 EN2 RADJ 10-BIT CURRENT DAC IOUT 1427 BD 5 LTC1427-50 WU W TI I G DIAGRA S Timing for SMBus Interface t BUF SDA t HD:STA t HD:STA tf tr SCL t LOW STOP t HIGH START t SU:STO t SU:STA t HD:DAT t SU:DAT 1427 TD01 START STOP Operating Sequence SMBus Write Byte Protocol, with SMBus Address = 0101111B, Command Byte = 0XXXXX11B and Data Byte = 11111111B VCC AD1 GND VCC AD0 GND SCL S 1 2 3 1 1 4 5 1 6 1 7 X X X X 1 1 1 1 1 1 1 1 1 1 * P 9 8 X ACK 0 DATA BYTE ACK 1 ACK 0 WR SDA COMMAND BYTE SHDN SMBUS ADDRESS 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 IOUT 1427 TD02 S = START P = STOP * = OPTIONAL FULL-SCALE CURRENT ZERO-SCALE CURRENT U U W U APPLICATIONS INFORMATION Digital Interface The LTC1427-50 communicates with an SMBus host using the standard 2-wire SMBus interface. The Timing Diagram shows the signals on the SMBus. The SCL and SDA bus lines must be high when the bus is not in use. External pull-up resistors or current sources are required at these lines. The LTC1427-50 is a receive-only (slave) device. The master must apply the following Write Byte protocol to communicate with the LTC1427-50: 1 7 1 S Slave Address WR 1 8 A Command Byte 1 8 A Data Byte 1 1 A P S = Start Condition, WR = Write Bit, A = Acknowledge Bit, P = Stop Condition 6 The master initiates communication with the LTC1427-50 with a START condition (see SMBus Operating Sequence) and a 7-bit address followed by the write bit = 0. The LTC1427-50 acknowledges and the master delivers the command byte. The LTC1427-50 acknowledges and latches the active bits of the command byte into register A (see Block Diagram) at the falling edge of the acknowledge pulse. The master sends the data byte and the LTC142750 acknowledges the data byte. The data byte and last two output bits from register A are latched into register C at the falling edge of the final acknowledge pulse and the DAC current output assumes the new 10-bit data value (see Block Diagram). A STOP condition is optional. The com- LTC1427-50 U U W U APPLICATIONS INFORMATION mand code and data byte are defined with the following format: Command Byte 7 Data Byte 6 5 4 3 2 1 0 SHDN X X X X X D9 D8 7 6 5 4 3 2 1 0 D7 D6 D5 D4 D3 D2 D1 D0 SHDN: 0 for Normal Operation, 1 for Shutdown D9 to D0: DAC Data Bits, D9 is the Most Significant Bit The Slave Address The LTC1427-50 can respond to one of four 7-bit addresses. The first five bits have been factory programmed to 01011. The two address bits, AD1 and AD0, are programmed by the user (see Function Table). 10-Bit Current Output DAC START and STOP Conditions At the beginning of any SMBus communication, the master must transmit a START condition by switching the SDA from high to low while SCL is high. When a master has finished communicating with a slave device, a STOP condition is issued by switching the SDA from low to high while SCL is high. The SMBus is then free for communication with another SMBus slave device. Early STOP Conditions The LTC1427-50 recognizes a STOP condition at any point in the SMBus communication sequence. If the STOP occurs prematurely before the data byte is acknowledged in the Write Byte protocol, the DAC output current value is not updated; otherwise internal register C is updated with the new data and the DAC output current changes correspondingly. The 10-Bit current output DAC is guaranteed monotonic and is digitally adjustable in 1023 equal steps. On powerup, if AD1 and AD0 are both connected to VCC, the 10-bit internal register C (see Block Diagram) resets to 1000000000B and the DAC output is set to midrange. If either AD1 or AD0 is connected to ground, register C resets to 0000000000B on power-up and the DAC output is set to zero. For the LTC1427-50, the source current output (IOUT) can be biased from – 15V to (VCC – 1.3V). Full-scale current is trimmed to ±1.5% at room temperature and ±2.5% over the commercial temperature range. Shutdown There are two ways to shut down the LTC1427-50 (see Block Diagram). The LTC1427-50 will enter shutdown mode whenever it sees a logic low at the SHDN pin or whenever it receives a logic high at bit 7 of the command byte through the SMBus interface. In shutdown mode, the digital data is retained internally and the supply current drops to only 10µA typically. U TYPICAL APPLICATIONS LTC1427-50 Used to Null Op Amp’s Offset Voltage RF VIN – RIN + VOUT LT1006 R2 100Ω R1 600k VCC SHDN 1 V– V – (0.5)(IFULL SCALE) TRIM RANGE = ±(0.5)(IFULL SCALE)(R2) R1 = 2 3 4 SHDN VCC AD1 IOUT AD0 SCL GND SDA 8 7 6 5 TO SMBUS HOST LTC1427-50 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1427 TA03 7 LTC1427-50 U TYPICAL APPLICATIONS SMBus-Controlled Floating CCFL Power Supply UP TO 6mA LAMP ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1184F HIGH-SIDE SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON. 10 L1 C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20 Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001 L1 = COILTRONICS CTX210605 L2 = COILTRONICS CTX100-4 *DO NOT SUBSTITUTE COMPONENTS COILTRONICS (407) 241-7876 3 C5 1000pF VCC 3.3V C6 0.1µF R2 220k Q2* D5 BAT85 SHDN 2 3 4 SHDN VCC AD1 IOUT AD0 GND 4 1 SCL 8 1 7 2 6 3 5 SDA TO SMBUS HOST C7, 1µF 4 5 6 7 8 U PACKAGE DESCRIPTION CCFL PGND ICCFL DIO CCFL VSW BULB LT1184F CCFL VC BAT ROYER AGND VIN SHDN REF NC NC NC NC 5 + C3B 2.2µF 35V C1* 0.1µF R1 750Ω C3A 2.2µF 35V BAT 8V TO 28V Q1* L2 100µH LTC1427-50 1 2 + R3 100k 0µA TO 50µA ICCFL CURRENT GIVES 0mA TO 6mA LAMP CURRENT FOR A TYPICAL DISPLAY. C2 27pF 3kV 6 D1 1N5818 16 15 14 13 12 + 11 10 VIN 3.3V C4 2.2µF 1427 TA01 9 Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) 0.189 – 0.197* (4.801 – 5.004) 7 8 6 5 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 3 2 4 SO8 0996 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1329-10/LTC1329-50 Micropower 8-Bit Current Source DAC 1-Wire, 2-Wire or Standard 3-Wire SPI Control LTC1380/LTC1393 SMBus Single-Ended 8-Channel/Differential 4-Channel Multiplexers Single 2.7V to ±5V Supply, Low Power LTC1426 Micropower Dual 6-Bit PWM DAC Pulse Mode and Push-Button Mode Interface LTC1428 Micropower 8-Bit Current Sink DAC 1-Wire, 2-Wire or Standard 3-Wire SPI Control LTC1623 SMBus Dual High Side Switch Controller Regulated Onboard Charge Pump Drives External N-Channel MOSFETs 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 ● (408) 432-1900 FAX: (408) 434-0507● TELEX: 499-3977 ● www.linear-tech.com 142750f LT/TP 0398 4K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 1998