MAXIM MAX9321AESA

19-2152; Rev 2; 11/02
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
Features
♦ Improved Second Source of the MC10LVEP16
(MAX9321)
Both devices are offered in space-saving 8-pin SOT23,
SO, and µMAX packages.
♦ Available in Thermally Enhanced Exposed-Pad
SO Package
♦ +2.25V to +3.8V Differential HSTL/LVPECL
Operation
♦ -2.25V to -3.8V Differential LVECL Operation
♦ Low 17mA Supply Current
♦ 20ps Part-to-Part Skew
♦ 172ps Propagation Delay
♦ Minimum 300mV Output at 3GHz
♦ Output Low for Open Input
♦ ESD Protection >2kV (Human Body Model)
♦ On-Chip Reference for Single-Ended Input
Ordering Information
Applications
Precision Clock Buffers
Low-Jitter Data Repeaters
TEMP
RANGE
PART
PINPACKAGE
TOP
MARK
AALK
MAX9321EKA-T
-40°C to +85°C
8 SOT23-8
MAX9321EUA*
-40°C to +85°C
8 µMAX
—
MAX9321ESA
-40°C to +85°C
8 SO
—
MAX9321AEKA-T -40°C to +85°C
8 SOT23-8
MAX9321AEUA*
-40°C to +85°C
8 µMAX
AAIX
—
MAX9321AESA
-40°C to +85°C
8 SO-EP**
—
*Future product—contact factory for availability.
**EP = Exposed pad.
Pin Configurations
VCC 1
MAX9321
8 Q
60kΩ
8 VCC
VCC
VCC
VEE 2
MAX9321
N.C. 1
7 Q
D 2
6 N.C.
D 3
60kΩ
7 Q
100kΩ
D 3
100kΩ
6 Q
100kΩ
100kΩ
5 VBB
D 4
5 VEE
VBB 4
VEE
SOT23
µMAX/SO
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX9321/MAX9321A
General Description
The MAX9321/MAX9321A are low-skew differential
receiver/drivers designed for clock and data distribution. The differential input can be adapted to accept a
single-ended input by connecting the on-chip VBB supply to an input as a reference voltage.
The MAX9321/MAX9321A feature ultra-low propagation
delay (172ps) and part-to-part skew (20ps) with 24mA
maximum supply current, making these devices ideal
for clock buffering or repeating. For interfacing to differential HSTL and LVPECL signals, these devices operate over a +2.25V to +3.8V supply range, allowing
high-performance clock and data distribution in systems with a nominal +2.5V or +3.3V supply. For differential LVECL operation, these devices operate from a
-2.25V to -3.8V supply. Multiple pinouts are provided to
simplify routing across a backplane to either side of a
double-sided board.
MAX9321/MAX9321A
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
ABSOLUTE MAXIMUM RATINGS
VCC to VEE ..........................................................................+4.1V
D or D .................................................. VEE - 0.3V to VCC + 0.3V
D to D .................................................................................±3.0V
Continuous Output Current .................................................50mA
Surge Output Current........................................................100mA
VBB Sink/Source Current .................................................±0.6mA
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin SOT23.............................................................+112°C/W
8-Pin µMAX ..............................................................+221°C/W
8-Pin SO-EP ...............................................................+53°C/W
Junction-to-Ambient Thermal Resistance with
500 LFPM Airflow
8-Pin SOT23...............................................................+78°C/W
8-Pin µMAX ..............................................................+155°C/W
8-Pin SO.....................................................................+99°C/W
Junction-to-Case Thermal Resistance
8-Pin SOT23...............................................................+80°C/W
8-Pin µMAX ................................................................+39°C/W
8-Pin SO.....................................................................+40°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection
Human Body Model (D, D, Q, Q, VBB).............................>2kV
Soldering Temperature (10s) ...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC - VEE = +2.25V to +3.8V, outputs loaded with 50Ω ±1% to VCC - 2.0V. Typical values are at VCC - VEE = +3.3V, VIHD = VCC - 1V,
VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1–5)
PARAMETER
SYMBOL
-40°C
CONDITIONS
MIN
TYP
+25°C
MAX
MIN
VCC
VCC 1.145
TYP
+85°C
MAX
MIN
VCC
VCC 1.085
TYP
MAX
UNITS
DIFFERENTIAL INPUT (D, D)
Single-Ended
Input High
Voltage
VIH
VBB connected to D
(VIL for VBB
connected to D),
Figure 1
VCC 1.210
Single-Ended
Input Low
Voltage
VIL
VBB connected to D
(VIH for VBB
connected to D),
Figure 1
VEE
High Voltage of
Differential
Input
Low Voltage of
Differential
Input
Differential
Input Voltage
VEE
VEE
V
VCC
V
V
VILD
VEE
VCC 0.1
VEE
VCC 0.1
VEE
VCC 0.1
For VCC - VEE < 3.0V
0.1
VCC VEE
0.1
VCC VEE
0.1
VCC VEE
For VCC - VEE ≥ 3.0V
0.1
3.0
0.1
3.0
0.1
3.0
VIHD VILD
IIH
D Input Low
Current
IILD
-10
D Input Low
Current
IILD
-150
150
100
+150
VCC
VEE +
1.2
VCC 1.485
VEE +
1.2
VCC
VEE +
1.2
VCC 1.545
V
VIHD
Input High
Current
2
VCC 1.65
VCC
150
-10
-150
100
+150
V
150
µA
-10
100
µA
-150
+150
µA
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
(VCC - VEE = +2.25V to +3.8V, outputs loaded with 50Ω ±1% to VCC - 2.0V. Typical values are at VCC - VEE = +3.3V, VIHD = VCC - 1V,
VILD = VCC - 1.5V, unless otherwise noted.) (Notes 1–5)
PARAMETER
SYMBOL
-40°C
CONDITIONS
MIN
TYP
+25°C
MAX
MIN
TYP
+85°C
MAX
MIN
TYP
MAX
UNITS
DIFFERENTIAL OUTPUT (Q, Q)
Single-Ended
Output High
Voltage
VOH
Figure 1
VCC 1.135
VCC 0.885
VCC 1.07
VCC 0.82
VCC 1.01
VCC 0.76
V
Single-Ended
Output Low
Voltage
VOL
Figure 1
VCC 1.935
VCC 1.685
VCC 1.87
VCC 1.62
VCC 1.81
VCC 1.56
V
VOH VOL
Figure 1
550
IBB = ±0.5mA
VCC 1.55
Differential
Output Voltage
550
550
mV
REFERENCE (VBB)
Reference
Voltage Output
(Note 6)
VBB
VCC 1.31
VCC 1.445
VCC 1.245
VCC 1.385
VCC 1.185
V
24
mA
POWER SUPPLY
Supply Current
(Note 7)
IEE
16
24
17
24
18
AC ELECTRICAL CHARACTERISTICS
(VCC - VEE = +2.25V to +3.8V, outputs loaded with 50Ω ±1% to VCC - 2V, input frequency = 1.5GHz, input transition time = 125ps
(20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to the smaller of 3V or VCC - VEE. Typical
values are at VCC - VEE = 3.3V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 8, 11)
PARAMETER
SYMBOL
Differential
Input-toOutput Delay
tPLHD,
tPHLD
Part-to-Part
Skew (Note 9)
tSKPP
Added
Random Jitter
(Note 10)
-40°C
CONDITIONS
+25°C
+85°C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
145
184
235
145
172
245
130
167
230
ps
25
90
20
100
20
100
ps
fIN = 1.5GHz, Clock
pattern
1.7
2.8
1.7
2.8
1.7
2.8
fIN = 3.0GHz, Clock
pattern
0.6
Figure 2
ps
(RMS)
tRJ
1.5
0.6
1.5
0.6
1.5
_______________________________________________________________________________________
3
MAX9321/MAX9321A
DC ELECTRICAL CHARACTERISTICS (continued)
MAX9321/MAX9321A
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC - VEE = +2.25V to +3.8V, outputs loaded with 50Ω ±1% to VCC - 2V, input frequency = 1.5GHz, input transition time = 125ps
(20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to the smaller of 3V or VCC - VEE. Typical
values are at VCC - VEE = 3.3V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Notes 8, 11)
PARAMETER
SYMBOL
-40°C
CONDITIONS
MIN
Added
Deterministic
Jitter (Note 10)
Switching
Frequency
Output Rise/
Fall Time
(20% to 80%)
tDJ
3.0Gbps
223 -1 PRBS pattern
VOH - VOL ≥ 300mV,
Clock pattern,
Figure 2
+25°C
TYP
MAX
57
80
3.0
MIN
+85°C
TYP
MAX
57
80
3.0
MIN
UNITS
TYP
MAX
57
80
3.0
fMAX
tR , tF
ps
(p-p)
GHz
VOH - VOL ≥ 550mV,
Clock pattern,
Figure 2
2.0
Figure 2
50
2.0
88
120
50
2.0
89
120
50
90
120
ps
Note 1: Guaranteed by design and characterization.
Note 2: Measurements are made with the device in thermal equilibrium.
Note 3: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 4: DC parameters production tested at TA = +25°C. Guaranteed by design and characterization over the full operating temperature range.
Note 5: Single-ended input operation is limited to VCC - VEE ≥ 3.0V.
Note 6: Use VBB as a reference for inputs on the same device only.
Note 7: All pins open except VCC and VEE.
Note 8: Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 9: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 10: Device jitter added to the input signal.
4
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
OUTPUT AMPLITUDE, VOH - VOL
vs. FREQUENCY
0.8
17
16
90
0.7
TRANSITION TIME (ps)
18
TRANSITION TIME vs. TEMPERATURE
MAX9321 toc02
0.9
OUTPUT AMPLITUDE (V)
19
0.6
0.5
0.4
0.3
89
tF
tR
88
0.2
15
87
0.1
0
14
35
60
0
85
500
1000 1500 2000 2500 3000 3500
-40
-15
FREQUENCY (MHz)
TEMPERATURE (°C)
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT, VIHD
200
VIHD - VILD = 0.5V
195
190
185
tPLHD
180
175
170
tPHLD
165
160
10
35
60
85
TEMPERATURE (°C)
PROPAGATION DELAY vs. TEMPERATURE
200
MAX9321 toc05
10
190
PROPAGATION DELAY (ps)
-15
MAX9321 toc04
-40
PROPAGATION DELAY (ps)
SUPPLY CURRENT (mA)
1.0
MAX9321 toc01
20
MAX9321 toc03
SUPPLY CURRENT, IEE vs. TEMPERATURE
180
tPLHD
170
160
tPHLD
150
140
130
155
150
120
1.0
1.4
1.8
2.2
2.6
VIHD (V)
3.0
3.4
3.8
-40
-15
10
35
60
85
TEMPERATURE (°C)
_______________________________________________________________________________________
5
MAX9321/MAX9321A
Typical Operating Characteristics
(SO packages) (VCC = +3.3V, VEE = 0, input transition time = 125ps (20% to 80%), VIHD = VCC - 1V, VILD = VCC - 1.5V, fIN =
1.5GHz, outputs loaded with 50Ω to VCC - 2V, TA = +25°C, unless otherwise noted.)
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
MAX9321/MAX9321A
Pin Description (MAX9321)
PIN
NAME
FUNCTION
µMAX/SO
SOT23
1
6
N.C.
2
3
D
Noninverting Differential Input. 100kΩ pulldown to VEE.
3
4
D
Inverting Differential Input. 60kΩ pullup to VCC and 100kΩ pulldown to VEE.
4
5
VBB
5
2
VEE
6
7
Q
Inverting Output. Typically terminate with 50Ω resistor to VCC - 2V.
7
8
Q
Noninverting Output. Typically terminate with 50Ω resistor to VCC - 2V.
8
1
VCC
No Connection
Reference Output Voltage. Connect to the inverting or noninverting input to provide a
reference for single-ended operation. When used, bypass with a 0.01µF ceramic
capacitor to VCC; otherwise leave open.
Negative Supply Voltage
Positive Supply Voltage. Bypass from VCC to VEE with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
Pin Description (MAX9321A)
PIN
6
NAME
FUNCTION
µMAX/SO
SOT23
1
6
N.C.
2
3
D
Inverting Differential Input. 60kΩ pullup to VCC and 100kΩ pulldown to VEE.
3
4
D
Noninverting Differential Input. 100kΩ pulldown to VEE.
4
5
VBB
Reference Output Voltage. Connect to the inverting or noninverting input to provide a
reference for single-ended operation. When used, bypass with a 0.01µF ceramic
capacitor to VCC; otherwise leave open.
5
2
VEE
Negative Supply Voltage
6
8
Q
Noninverting Output. Typically terminate with 50Ω resistor to VCC - 2V.
7
7
Q
Inverting Output. Typically terminate with 50Ω resistor to VCC - 2V.
8
1
VCC
No Connection
Positive Supply Voltage. Bypass from VCC to VEE with 0.1µF and 0.01µF ceramic
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
MAX9321/MAX9321A
D
VIH
VBB
D
VIL
(CONNECTED TO D)
VOH
Q
VOH - VOL
VOL
Q
Figure 1. Switching with Single-Ended Input
D
VIHD
VIHD - VILD
VILD
D
tPLHD
tPHLD
Q
VOH
VOH - VOL
VOL
Q
80%
80%
0 (DIFFERENTIAL)
(Q) - (Q)
0 (DIFFERENTIAL)
20%
20%
tR
tF
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
Detailed Description
The MAX9321/MAX9321A are low-skew differential
receiver/drivers designed for clock and data distribution. For interfacing to differential HSTL and LVPECL
signals, these devices operate over a +2.25V to +3.8V
supply range, allowing high-performance clock and
data distribution in systems with a nominal +2.5V or
+3.3V supply. For differential LVECL operation, these
devices operate from a -2.25V to -3.8V supply.
Inputs
The differential input can be configured to accept a single-ended input when operating at approximately VCC VEE = 3.0V to 3.8V. This is accomplished by connecting the on-chip reference voltage, VBB, to an input as a
reference. For example, the differential D, D input is
converted to a noninverting, single-ended input by connecting V BB to D and connecting the single-ended
input to D. An inverting input is obtained by connecting
VBB to D and connecting the single-ended input to D.
With the differential input configured as single ended
(using VBB), the single-ended input can be driven to
VCC and VEE or with a single-ended LVPECL/LVECL
signal.
When the differential input is configured as a singleended input (using VBB), the approximate supply range
is VCC - VEE = 3.0V to 3.8V. This is because one of the
inputs must be VEE + 1.2V or higher for proper operation of the input stage. VBB must be at least VEE + 1.2V
because it becomes the high-level input when the other
(single-ended) input swings below it. Therefore, minimum VBB = VEE + 1.2V.
The minimum VBB output is VCC - 1.510V. Substituting
the minimum VBB into VBB = VEE + 1.2V results in a
minimum supply of 2.71V. Rounding up to a standard
supply gives the single-ended operating supply range
of VCC - VEE = 3.0V to 3.8V.
_______________________________________________________________________________________
7
MAX9321/MAX9321A
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
When using the VBB reference output, bypass it with a
0.01µF ceramic capacitor to VCC. If the VBB reference
is not used, it can be left open. The VBB reference can
source or sink 0.5mA. Use VBB only for an input on the
same device as the VBB reference.
The maximum magnitude of the differential input from D
to D is 3.0V or VCC - VEE, whichever is less. This limit
also applies to the difference between any reference
voltage input and a single-ended input.
The differential input has bias resistors that drive the
output to a differential low when the inputs are open.
The inverting input is biased with a 60kΩ pullup to VCC
and a 100kΩ pulldown to VEE. The noninverting input is
biased with a 100kΩ pulldown to VEE.
Specifications for the high and low voltage of the differential input (VIHD and VILD) and the differential input
voltage (VIHD - VILD) apply simultaneously (VILD cannot
be higher than VIHD).
Outputs
Output levels are referenced to VCC and are considered LVPECL or LVECL, depending on the level of the
VCC supply. With VCC connected to a positive supply
and VEE connected to GND, the output is LVPECL. The
output is LVECL when VCC is connected to GND and
VEE is connected to a negative supply.
A single-ended input of at least VBB ±100mV or a differential input of at least ±100mV switches the outputs to
the VOH and VOL levels specified in the DC Electrical
Characteristics table.
capacitor closest to the device. Use multiple parallel
vias for low inductance. When using the VBB reference
output, bypass it with a 0.01µF ceramic capacitor to
VCC (if the VBB reference is not used, it can be left
open).
Traces
Input and output trace characteristics affect the performance of the MAX9321/MAX9321A. Connect each signal of a differential input or output to a 50Ω
characteristic impedance trace. Minimize the number of
vias to prevent impedance discontinuities. Reduce
reflections by maintaining the 50Ω characteristic
impedance through connectors and across cables.
Reduce skew within a differential pair by matching the
electrical length of the traces.
The exposed-pad (EP) SO package can be soldered to
the PC board for enhanced thermal performance. If the
EP is not soldered to the PC board, the thermal resistance is the same as the regular SO package. The EP is
connected to the chip VEE supply. Be sure that the pad
does not touch signal lines or other supplies.
Contact Maxim's Packaging department for guidelines
on the use of EP packages.
Output Termination
Terminate outputs through 50Ω to VCC - 2V or use an
equivalent Thevenin termination. When a single-ended
signal is taken from the differential output, terminate
both outputs. For example, when Q is used as a singleended output, terminate both Q and Q.
Applications Information
Chip Information
Supply Bypassing
Bypass VCC to VEE with high-frequency surface-mount
ceramic 0.1µF and 0.01µF capacitors in parallel as
close to the device as possible, with the 0.01µF value
TRANSISTOR COUNT: 162
Pin Configurations (continued)
VCC 1
MAX9321A
8 Q
N.C. 1
7 Q
D 2
VCC
VEE 2
VCC
MAX9321A
8 VCC
60kΩ
60kΩ
7 Q
100kΩ
D 3
100kΩ
6 N.C.
D 3
5 VBB
VBB 4
100kΩ
6 Q
100kΩ
D 4
5 VEE
VEE
SOT23
8
µMAX/SO
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
SOT23, 8L.EPS
8L, SOIC EXP. PAD.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ______________________9
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
MAX9321/MAX9321A
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)