MOTOROLA MRFIC2004

Order this document
by MRFIC2004/D
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
The MRFIC2004 is an integrated Driver and Ramp designed for transmitters
operating in the 800 MHz to 1.0 GHz frequency range. The Ramp is an
integrator which can be used for burst control for TDD/TDMA systems. The
Driver uses a cascode configuration for high gain and reverse isolation. A power
down control is provided to minimize current drain with minimum recovery/turnon time. Also, an on-board inverter is included to provide complementary
control for an antenna switch, such as the MRFIC2003. The design utilizes
Motorola’s advanced MOSAIC 3 silicon bipolar RF process to yield superior
performance in a cost effective monolithic device. Applications for the
MRFIC2004 include CT1 and CT2 cordless telephones, GSM, remote controls,
video and audio short range links, low cost cellular radios, and ISM band
transmitters.
900 MHz DRIVER
& RAMP
SILICON MONOLITHIC
INTEGRATED CIRCUIT
•
•
•
•
•
•
•
•
Small Signal Gain = 21.5 dB (Typ)
Small Signal Gain Control = 34 dB (Typ)
Po 1.0 dB = –1.0 dBm (Typ)
On Board Ramp for Burst Control
Power Down Supply Current = 0.7 mA (Typ)
Low Operating Supply Voltage (2.7 to 4.0 Volts)
Input/Output VSWR Insensitive to Gain Control
Order MRFIC2004R2 for Tape and Reel.
R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel.
• Device Marking = M2004
CASE 751B-05
(SO-16)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Supply Voltages
VCC1
VCC2
4.5
6.0
Vdc
Control Voltages
RXEN, TXEN, Vcont
6.0
Vdc
PRF
+10
dBm
TA
– 35 to + 85
°C
Tstg
– 65 to +150
°C
Input Power, RF IN Port
Operating Ambient Temperature
Storage Temperature
RX EN
1
16 RX EN
GND
2
15 GND
VCC1
3
14 RF OUT/VCC2
GND
4
13 GND
VRAMP
5
C INT
6
DRIVER
12 GND
11 RF IN
RAMP
GND
7
10 GND
TX EN
8
9
Vcont
(GAIN CONTROL)
Pin Connections and Functional Block Diagram
REV 2
RF DEVICE DATA
MOTOROLA
Motorola, Inc. 1997
MRFIC2004
1
RECOMMENDED OPERATING RANGES
Parameter
Supply Voltage Ranges
Symbol
VCC1, VCC2
TX EN, RX EN,
Vcont
f
Control Voltage Ranges
Frequency Range
Value
Unit
2.7 to 4.0
Vdc
0 to VCC1
Vdc
800 to 1000
MHz
ELECTRICAL CHARACTERISTICS (VCC1, VCC2 = 3.0 V, CINT = 2.0 nF, TA = 25°C, f = 900 MHz, VCONT = 1.3 V)
Characteristics (1)
Min
Typ
Max
Unit
Supply Current, TX EN High, RX EN Low
—
11
13
mA
Supply Current, TX EN Low, RX EN High
—
0.7
1.5
mA
19
21.5
24
dB
Driver Characteristics (1)
Gain (Small Signal)
Gain Control (Small Signal)
—
34
—
dB
– 4.0
–1.0
—
dBm
Third Order Intercept Point (out)
—
+ 7.5
—
dBm
Reverse Isolation
—
32
—
dB
Ramp Up Delay Time
Rise Time
Total Time
—
—
—
4.0
18
22
—
—
—
µs
Ramp Down Delay Time
Fall Time
Total Time
—
—
—
4.0
18
22
—
—
—
µs
Power Out @ 1.0 dB Gain Compression
Ramp Characteristics (1)
LOGIC LEVELS (VCC1 = 2.7 to 4.0 V, TA = 25°C)
RX EN & TX EN Input Voltage
High
Low
Min
Typ
Max
Unit
VCC1 – 0.8
—
—
—
—
0.8
V
VCC1 – 0.2
—
—
—
—
0.2
V
RX EN Output Voltage
High
Low
NOTE:
1. All electrical characteristics measured in test circuit schematic shown in Figure 1 below.
MRFIC2004
2
MOTOROLA RF DEVICE DATA
L2
+
VRAMP
–
C5
CINT
+
– VCC 1
C7
C6
+
TX EN –
8
7
6
5
4
+
– RX EN
3
2
1
14
15
16
D.U.T.
9
+
Vcont –
10
11
12
13
+
– RX EN
C9
50 Ω LINE
RF IN
50 Ω
C11
C3
50 Ω LINE
RF OUT
50 Ω
C10
L1
+
VCC 2 –
C1, C7, C9 — 1000 pF Chip Capacitor
C2, C5, C6, C10 — 100 pF Chip Capacitor
C3 — 1.6 pF Chip Capacitor
CINT — 2000 pF Chip Capacitor
R1
C1
C2
C11 — 6.2 pF Chip Capacitor
L1 — 4.7 nH Chip Inductor
L2 — 150 nH Chip Inductor
R1 — 330 Ω Chip Resistor
RF Connectors — SMA Type
Board Material — Epoxy/Glass εr = 4.5,
Dielectric Thickness = 0.014″ (0.36 mm)
Figure 1. Typical Biasing Configuration
f = 500 MHz
Zo = 50 Ω
Vcont = 1.0 V
Vcont = 1.0 or 3.0 V
Zo = 50 Ω
750
1000
f = 500 MHz
1000
750
Vcont = 3.0 V
Figure 2. S11 versus Frequency versus Vcont
Vcont
1.0
f
(MHz)
100
300
500
550
600
650
700
750
800
850
900
950
Figure 3. S22 versus Frequency
S11
|S11|
0.85
0.83
0.79
0.79
0.78
0.77
0.76
0.76
0.75
0.74
0.73
0.73
MOTOROLA RF DEVICE DATA
S21
∠φ
– 11.3
– 32.8
– 56.9
– 62.5
– 68.5
– 74
– 79
– 84.4
– 89.6
– 94.5
– 99.1
– 102
|S21|
10.48
10.33
10.15
10.04
9.85
9.47
9.23
9.02
8.69
8.33
8.13
7.98
S12
∠φ
– 171.5
– 156.3
– 140.5
– 135.9
– 130.2
– 126.9
– 123.6
– 119.4
– 113.8
– 110.8
– 108.9
– 105.4
|S12|
0.0002
0.0020
0.0030
0.0030
0.0040
0.0040
0.0050
0.0050
0.0060
0.0070
0.0080
0.0090
S22
∠φ
142.7
129.0
130.6
132.6
133.3
135.9
137.2
138.1
139.7
140.3
141.2
138.3
|S22|
0.99
0.99
0.98
0.98
0.98
0.98
0.98
0.97
0.97
0.97
0.96
0.96
∠φ
– 2.9
– 7.3
– 15.9
– 17.9
– 20.0
– 22.3
– 24.7
– 27.0
– 29.3
– 31.4
– 33.2
– 36.3
MRFIC2004
3
1000
0.72
– 106.9
7.70
– 101.0
0.0100
133.7
0.95
– 38.4
1.9
100
300
500
550
600
650
700
750
800
850
900
950
1000
0.85
0.86
0.87
0.87
0.88
0.88
0.88
0.89
0.89
0.88
0.87
0.86
0.85
– 11.3
– 33.5
– 59.3
– 65.7
– 73.1
– 78.7
– 84.7
– 90.7
– 98.2
– 104.6
– 110.1
– 114.6
– 118.8
0.53
0.69
0.89
0.96
1.02
1.04
1.07
1.14
1.17
1.22
1.24
1.26
1.27
– 173.5
– 169.7
– 179.5
– 175.1
– 169.9
– 167.3
– 165.0
– 161.5
– 155.8
– 151.2
– 144.6
– 139.9
– 134.1
0.0002
0.0009
0.0010
0.0020
0.0020
0.0020
0.0030
0.0030
0.0040
0.0050
0.0060
0.0070
0.0080
104.3
118.7
134.3
136.3
138.9
142.6
147.8
153.4
161.0
161.8
162.7
160.3
158.2
0.99
0.98
0.98
0.98
0.97
0.97
0.97
0.96
0.96
0.96
0.95
0.95
0.94
– 2.9
– 8.7
– 15.5
– 17.5
– 19.6
– 21.8
– 24.1
– 26.4
– 28.8
– 30.7
– 32.8
– 35.1
– 37.2
3.0
100
300
500
550
600
650
700
750
800
850
900
950
1000
0.85
0.86
0.87
0.88
0.89
0.90
0.90
0.91
0.91
0.92
0.91
0.90
0.89
– 10.9
– 31.9
– 56.9
– 62.4
– 69.4
– 75.1
– 81.3
– 87.3
– 93.8
– 100.7
– 106.8
– 111.4
– 115.2
0.003
0.014
0.032
0.038
0.048
0.058
0.069
0.081
0.092
0.092
0.089
0.083
0.077
– 85.9
– 78.8
– 61.1
– 65.8
– 68.3
– 75.1
– 82.4
– 89.4
– 113.4
– 121.8
– 128.2
– 137.1
– 151.9
0.0001
0.0006
0.0010
0.0010
0.0010
0.0020
0.0020
0.0020
0.0030
0.0040
0.0050
0.0060
0.0060
115.0
121.0
128.0
136.2
140.0
145.1
150.8
156.8
160.3
163.3
163.3
155.2
150.0
0.99
0.99
0.98
0.98
0.98
0.98
0.97
0.97
0.97
0.96
0.96
0.95
0.95
– 2.8
– 8.5
– 15.1
– 17.0
– 19.2
– 21.3
– 23.6
– 25.8
– 28.1
– 30.1
– 32.3
– 34.5
– 36.6
Table 1. Small Signal Deembedded S Parameters
MRFIC2004
4
MOTOROLA RF DEVICE DATA
6
24
18
G, GAIN (dB)
12
Pout , OUTPUT POWER (dBm)
Vcont = 1 V
1.9 V
6
TA = 25°C
VCC1, VCC2 = 3 V
0
–6
–12
3V
3
0
25°C
–3
TA = – 35°C
VCC1, VCC2 = 3 V
Vcont = 1 V
85°C
–6
–18
– 24
500
600
700
800
f, FREQUENCY (MHz)
900
–9
1000
– 30
Figure 4. Small Signal Gain versus Frequency
– 22
–18
Pin, INPUT POWER (dBm)
–14
–1
0
Figure 5. Output Power versus Input Power
13
24
6
–10 dBm
0
–20 dBm
Pin = – 30 dBm
–8
–15 dBm
TA = 25°C
VCC1, VCC2 = 3 V
IC, SUPPLY CURRENT (mA)
12
16
G, GAIN (dB)
– 26
1.4
VCC1, VCC2 = 3 V
TX EN HIGH
RX EN LOW
10
9
8
–16
1
11
1.8
2.2
2.6
Vcont, GAIN CONTROL VOLTAGE (V)
3
7
– 35
Figure 6. Driver Gain versus Gain Control Voltage
–15
5
25
45
TA, AMBIENT TEMPERATURE (°C)
65
85
Figure 7. Supply Current versus Ambient
Temperature
VRAMP, RAMP VOLTAGE (V)
3
2.5
TXEN LOW @ 50 µs
2
TA = 25°C
VCC1, VCC2 = 3 V
CINT = 2 nF
1.5
DRIVER & PA
DRIVER & PA
TURN ON
TURN OFF
1
0.5
0
TXEN HIGH @ 10 µs
0
20
40
60
tr & tf, RISE AND FALL TIME (µs)
80
100
Figure 8. Ramp Voltage versus Rise & Fall Time
MOTOROLA RF DEVICE DATA
MRFIC2004
5
APPLICATIONS INFORMATION
DESIGN PHILOSOPHY
The MRFIC2004 was designed as a support IC for a CT2
chip-set. The other chips making up the chip-set are the
MRFIC2001 downconverter, the MRFIC2002 transmit mixer,
the MRFIC2003 antenna switch and the MRFIC2006 PA. A
complete CT2 front-end solution requires a ramp for burst
control, an inverter for complementary antenna switch control and gain control (or an attenuator) for the transmitter low
power mode. In order to keep the other chips in the chip-set
relatively general purpose, yet provide the system designer
with an easily controlled solution, these functions were combined with a driver amplifier into one IC, the MRFIC2004.
THEORY OF OPERATION
The driver is a cascode design that exits the IC opencollector. Impedance matching must be done externally.
Since the output requires a bias inductor and DC blocking
capacitor, the output can be matched with these two elements. To keep the driver unconditionally stable, it is recommended that a 300 – 400 ohm resistor be placed in parallel
with the bias inductor as close to the IC as possible. Since
the output impedance of the driver by itself is very high, the
resistor sets the output impedance. The input can be
matched with a series inductor followed by a shunt capacitor.
Alternatively, a series transmission line followed by a shunt
capacitor can be used. A DC block is also required on the
input.
Gain control is provided to meet the CT2 low power
mode requirement. The CT2 Common Air Interface specification requires the transmitter to be capable of dropping
the output power by 16 ± 4.0 dB. Although the driver has
34 dB of small signal gain control, it can be reduced by ad-
MRFIC2004
6
ding a resistor in series with the gain control pin. The value
of the resistor depends on the logic levels being used and
the amount of gain compression after the driver. Also, the
amount of gain control is a function of the driver input power
level. The input power should be kept less than –10 dBm to
allow for sufficient gain control to achieve the low power
mode. The gain control can also be used for PA output power
trimming. However, this is not an efficient method.
The ramp is an integrator which is used to slow down the
driver and PA turn-on and turn-off times to reduce AM splatter. By applying a pulse waveform to the input, a linear ramp
waveform is created at the output which is then applied to the
current mirrors of the driver and PA. An external integrating
capacitor is used so that the rise/fall time can be programmed externally. A minimum value of 2.0 – 2.4 nF is
needed to meet the CT2 Common Air Interface splatter specification. For non-TDD/TDMA systems the ramp reverts to an
enable/disable function.
The inverter is CMOS/TTL compatible and was included to
provide complementary control for an antenna switch such
as the MRFIC2003. By applying the receiver enable control
line, RXEN, to the inverter the inverse RXEN will be created.
RXEN and RXEN can then be used to control the
MRFIC2003 antenna switch.
EVALUATION BOARDS
Evaluation boards are available for RF Monolithic Integrated Circuits by adding a “TF” suffix to the device type.
For a complete list of currently available boards and ones
in development for newly introduced product, please contact your local Motorola Distributor or Sales Office.
MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
–A–
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
9
–B–
1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
F
X 45 _
C
–T–
SEATING
PLANE
M
D
J
16 PL
0.25 (0.010)
M
T B
S
A
S
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
CASE 751B–05
ISSUE J
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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MOTOROLA RF DEVICE DATA ◊
MRFIC2004/D
MRFIC2004
7