MYSON
TECHNOLOGY
MTU429B
(Preliminary)
4-Bit Micro-Controller with LCD Driver
FEATURES
GENERAL DESCRIPTION
•
•
•
The MTU429B is an embedded high performance
4-bit microcomputer with an on-chip LCD driver. It
contains all the necessary functions in a single chip:
4-bit parallel processing ALU, ROM, RAM, I/O ports,
timer, clock generator, dual clock, RFC, EL-light,
LCD driver, look-up table, watchdog timer and keyboard scanning. The instruction set includes not only
4-bit operation and manipulation instructions but also
various conditional branch instructions and LCD
driver data transfer instructions which are powerful
and easy to use.
The Halt function stops any internal operations
other than the oscillator, divider and LCD driver in
order to minimize the power dissipation.
The Stop function stops all the clocks in the chip.
•
•
•
•
•
•
•
•
•
•
•
•
•
Low power and low voltage operation.
Powerful instruction set (150 instructions).
Memory capacity.
- Instruction ROM capacity 4096 x 16 bits.
- Index ROM capacity
256 x 8 bits.
- Internal RAM capacity
384 or 256 x 4 bits.
Input/Output ports of up to 20 pins.
8-level subroutine nesting.
Built-in LCD driver, 8 x 42 = 336 segments.
Built-in EL driver, frequency or melody generator.
Built-in Resistance-to-Frequency Converter.
Built-in 2-channel 6/8-bit PWM output.
Built-in key strobe function.(Shared with segment
pin)
Built-in voltage doubler, halver, tripler quadrupler
charge pump circuit.
Two 6-bit programmable timers with programmable clock source.
Watchdog timer.
4 external & 3 internal interrupt resources.
- External: INT, RFC, IOA/IOC/S port, keystrobe.
- Internal: TM1, TM2, Predivider.
Dual clock operation.
HALT and STOP function.
BLOCK DIAGRAM
SEG35~SEG38 SEG31~SEG34 SEG39~SEG42 SEG27~SEG30 COM1~8
...
IOA PORT
/RFC
IOB PORT
/EL, BZ
IOC PORT
/KEY IN
SEG1~SEG26
...................
VDD1~4
LCD DRIVER
IOD PORT
/PWM
SEGMENT PLA
CUP1
CUP2
CUP3
FREQUENCY
GENERATOR
TABLE ROM
256 X 8
PREDIVIDER
2 X 6 BITS
PRESET TIMER
8-LEVEL STACK
WATCHDOG
TIMER
OSCILLATOR
CONTROL
CIRCUIT
12-BIT
PROGRAM
COUNTER
XTIN CFIN
XTOUT CFOUT
PRESET INT
INDEX SRAM
256 X 4
ALU
SRAM
128 X 4
INSTRUCTION
DECODER
MASK ROM
4096 X 16
S1~S4
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice.
No liability is assumed as a result of the use of this procuts. No rights under any patent accompany the sales of the product.
1/20
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
1.0 PAD DIAGRAM
VDD2
VDD1
S4
S3
S2
S1
INT
RESET
TESTA
BAK
XTOUT
XTIN
CFOUT
CFIN
Chip size : 2620 x 2050 µm
Pad size : 100 x 100 µm
Pad window : 90 x 90 µm
Pad pitch : min. 120 µm
70
10
1
20
60
ROM
30
C
GND
COM8
COM7
COM6
COM5
SEG42 / IOC4 / KI4
SEG41 / IOC3 / KI3
SEG40 / IOC2 / KI2
SEG39 / IOC1 / KI1
SEG38 / IOA4 / RH
SEG37 / IOA3 / RT
SEG36 / IOA2 / RR
SEG35 / IOA1 / CX
SEG34 / IOB4 / BZ
SEG33 / IOB3 / BZB
SEG32 / IOB2 / ELP
SEG31 / IOB1 / ELC
SEG30 / IOD4 / PWM2
SEG29 / IOD3 / PWM1
SEG28 / IOD2
SEG27 / IOD1
M
40
50
KO3 / SEG13
KO4 / SEG14
KO5 / SEG15
KO6 / SEG16
KO7 / SEG17
KO8 / SEG18
KO9 / SEG19
KO10 / SEG20
KO11 / SEG21
KO12 / SEG22
KO13 / SEG23
KO14 / SEG24
KO15 / SEG25
KO16 / SEG26
VDD3
VDD4
CUP1
CUP2
CUP3
COM1
COM2
COM3
COM4
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
KO1 / SEG11
KO2 / SEG12
Note: The substrate of die must connect to GND.
2/20
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
2.0 PAD ASSIGNMENT
Pad
No.
Pad Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
CFIN
CFOUT
XTIN
XTOUT
BAK
TESTA
RESET
INT
S1
S2
S3
S4
VDD1
VDD2
VDD3
VDD4
CUP1
CUP2
CUP3
COM1
COM2
COM3
COM4
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11/KO1
SEG12/KO2
Coordinate
X
1971.50
1785.25
1665.25
1545.25
1425.25
1305.25
1185.25
1065.25
945.25
825.25
705.25
585.25
465.25
345.25
225.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
Y
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2544.50
2394.50
2274.50
2154.50
2034.50
1914.50
1785.25
1665.25
1545.25
1425.25
1305.25
1185.25
1065.25
945.25
825.25
705.25
585.25
465.25
345.25
225.25
Coordinate
Pad
No.
Pad Name
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
SEG13/KO3
SEG14/KO4
SEG15/KO5
SEG16/KO6
SEG17/KO7
SEG18/KO8
SEG19/KO9
SEG20/KO10
SEG21/KO11
SEG22/KO12
SEG23/KO13
SEG24/KO14
SEG25/KO15
SEG26/KO16
SEG27/IOD1
SEG28/IOD2
SEG29/IOD3/PWM1
SEG30/IOD4/PWM2
SEG31/IOB1/ELC
SEG32/IOB2/ELP
SEG33/IOB3/BZB
SEG34/IOB4/BZ
SEG35/IOA1/CX
SEG36/IOA2/RR
SEG37/IOA3/RT
SEG38/IOA4/RH
SEG39/IOC1/KI1
SEG40/IOC2/KI2
SEG41/IOC3/KI3
SEG42/IOC4/KI4
COM5
COM6
COM7
COM8
GND
3/20
X
75.25
225.25
345.25
465.25
585.25
705.25
825.25
945.25
1065.25
1185.25
1305.25
1425.25
1545.25
1665.25
1785.25
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
1971.50
Y
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
75.25
225.25
345.25
465.25
585.25
705.25
825.25
945.25
1065.25
1185.25
1305.25
1425.25
1545.25
1665.25
1785.25
1905.25
2034.50
2154.50
2274.50
2394.50
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
3.0 PAD DESCRIPTIONS
Name
I/O
Description
BAK
Positive backup voltage.
In Li mode, connects a 0.1u capacitance to GND.
VDD1, 2, 3, 4
LCD drive voltage and positive supply voltage.
While in Ag mode, connects +1.5V to VDD1.
While in Li/ExtV mode, connects +3.0V to VDD2.
RESET
I
Input pin for LSI reset signal.
With Internal pull-down resistor.
INT
I
Input pin for external INT request signal.
Falling edge or rising edge triggered by mask option.
Internal pull-down or pull-up resistor or floatting to be selected by mask option.
TESTA
I
Test signal input pin, internal pull-down resistor.
CUP1, 2, 3
O
Switching pins for supplying the LCD driving voltage to the VDD1, 2, 3, 4 pins. Connects the CUP1, CUP2 and CUP3 pins with a nonpolarized electronic capacitor if 1/
2, 1/3 or 1/4 bias mode has been selected. In the STATIC mode, these pins should
be open.
XTIN
XTOUT
I
O
Time based counter frequency (Clock specified. LCD alternating frequency. Alarm
signal frequency.) or system clock oscillation.
32KHz crystal oscillator.
Oscillation stops at the execution of STOP instruction.
CFIN
CFOUT
I
O
System clock oscillation.
Connected with ceramic resonator.
Connected with RC oscillation circuit.
Oscillation stops at the execution of STOP or SLOW instruction.
COM1~8
O
Output pins for supplying voltage to drive the common pins of the LCD panel.
SEG1~10
O
Output pins for LCD panel segment.
SEG11~26 /
KO1~16
O
Output pins for LCD panel segment.
Key strobe function, share pins as key scan output.
SEG27~42
O
Output pins for LCD panel segment.
IOA1~4
I/O
Input/Output port A, can use software to define the internal pull-low resistor and
chattering clock in order to reduce input bounce and generate an interrupt.
This port shares pins with SEG35~38 and is set by mask option.
This port also shares pins with CC, RR, RT and RH, and is set by mask option.
IOB1~4
I/O
Input/Output port B.
IOB port shares pins with SEG31~34, and is set by mask option.
This port also shares pins with ELC, ELP, BZB and BZ, and is set by mask option.
IOC1~4
I/O
Input/Output port C, can use software to define internal pull-low / low-level hold
resistor and chattering clock in order to reduce input bounce and generate an interrupt or key_board scanning function with ELC, ELP, BZB and BZ, and is set by
mask option.
IOD1~4
I/O
Input/Output port D.
This port shares pins with SEG27~30 and is set by mask option.
IOD3, 4 shares pins with PWM1, 2 and is set by mask option.
S1~4
I
Input ports by mask option to internal pull-low/low-level hold resistor and chattering
clock in order to reduce input bounce and generate an interrupt or Halt or stop
Release.
4/20
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
Name
I/O
MTU429B
(Preliminary)
Description
KI1~4
I
Key scan input, this port shares pins with IOC1~4 and is set by mask option.
RFC CC
RR
RT
RH
I
O
O
O
1 input pin and 3 output pins for RFC application.
This port shares pins with SEG35~38 and is set by mask option.
This port shares pins with IOA1~4 and is set by mask option.
EL
ELC
ELP
O
O
Output port for EL-light.
This port shares pins with SEG31, 32 and is set by mask option.
This port shares pins with IOB1, 2 and is set by mask option.
ALM BZB
BZ
O
O
Output port for alarm, frequency or melody generator.
This port shares pins with IOB3, 4 and is set by mask option.
PWM1, 2
O
6/8-bit PWM output; set by mask option.
GND
Negative supply voltage.
4.0 FUNCTIONAL DESCRIPTION
4.1 SRAM
The 256 x 4 bits index SRAM and 128 x 4 bits data SRAM are 2 separate regions.
4.2 Index ROM
The 256 x 8 bits index ROM can be used as a 4-bit mode or an 8-bit mode.
4.3 I/O Ports
The IOA port can be selected by software separately as input or output, and with/without internal pull-low and
different chattering clocks in order for HALT release/ interrupt trigger to reduce the bounce of key_scan:
PH6: 512Hz
PH8:128Hz
PH10: 32Hz
The pull-low of the IOA will be masked off for those pins defined as output pins.
The IOA port can be used as a pseudo serial output port.
The IOB port can be selected by software separately as input or output.
The IOC port can be selected by software separately as input or output, and with/without internal pull-low and
different chattering clocks in order for HALT release/ interrupt trigger to reduce the bounce of key_scan.
The IOD port can be selected by software separately as input or output.
The IOD port can be used as a pseudo serial output port.
The initial state of all I/O ports is standard input state and IOA, C have pull-low device.
Before setting some pins from input to output, you can execute the output function to ensure their output
value. The S ports are input pins that contain pull_low. The L_L_H resistor can be selected by mask option
and different chattering clocks in the same manner as the IOA, C ports.
4.4 Resistor-to-Frequency Converter
We use an RC oscillation circuit and a 16-bit counter to calculate the relative resistance of temperature and
humidity sensor. The diagram is shown as Figure 1.
There are two types of methodology for measuring the input frequency: first, set FIN (i.e. CX) as the clock
input, using timer 2 as interval control or using software to directly control the interval. Second, if the FIN (CX)
frequency is too low, either because of a poor resolution for a fixed interval or a longer interval for better resolution but with a longer read-out rate (for example: 10 seconds per read-out), you can switch the measure
mode in order to set FIN (CX) as interval control (it will enable the counter from first FIN rising edge to the next
5/20
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
rising edge, then will generate an interrupt) and use FREQ (internal frequency generator output) as clock
input, hence you can count the interval of CX.
To measure the resistor value of the temperature and humidity sensor, we must first measure the frequency of
Rref, then the frequency of sensor.
Where K is a coefficient for RC-oscillation
and will bw a constant in a short time
period.
Here the Fref = K / Rref * CX
and Fsensor = K / Rsensor * CX,
hence Rsensor = Rref * Freq/ Fsensor.
ELP
RTP
TMS
RT
ENX
EHM
RHM
RH
Timer
&
R/F Controller
MRF
FIN
ERR
Rref
RR
ENX
CX
FIN
PH9
Freq
CL
LD
Freq
CL
LD
16-Bit Counter
CX
4-Bit Data Bus
FIGURE 1.
R to F Converter Diagram
4.5 Key_board Scanning Function
SEG11~26 shares the key_board scanning output, the output of the key_board scanning is a P open-drain to
VDDO (positive power supply) and all other SEGs and COMs are in Hi-z state during this period. This will minimize the effect of the LCD output.
The segment 11-26 also could be used as keyscan output and LCD still could be displayed with only slightly
affected.
SPK 00b5 b4 b3 b2 b1 b0.
b5: 1 will disable key-scan output.
b4: 1 will set all keyscan output as high, if b5=0.
b3~b0: will set the corresponding segment output as 1, if b5=0 and b4=0.
During power on, LCD off, STOP condition. All the common & segment output will be the chips supply power.
4.6 EL-Light
Set the ELC and ELP clock and duty cycle by ELC X instruction, then turn on and off the ELC and ELP output
by SF X and RF X instruction. With external transistor, diode, inductor and resistor, we can pump the ELpanel to AC 100~250V.
While the light is turned on, the ELC will turn on before the ELP, but when the light is turned off, the ELP and
ELC will turn off after the next falling edge of the ELC to make sure no voltage is left on the EL- panel.
4.7 Timer
The 6-bit programmable timer can select PH3/PH9/PH15/FREQ (timer 2 can also select PH5/PH7/PH11/
PH13 by TM2X instruction) as the clock source. When it underflows, the HALT release signal is generated.
6/20
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
Q1
L1
D1
R1
Q2
ELP
EL-plane
R2
ELC
LIT
ELP
ELC
4.8 Predivider
The predivider is a 15-stage counter that uses PH0 as the clock source. The output of T-F/F is changed when
the input signal is changed from H to L. PH11~15 are reset to L when PLC 100H instruction is executed, or
power-on or external reset is used. When PH14 is changed from H to L, the HALT release signal is generated.
4.9 Alarm/Frequency/Melody
There is an 8-bit programmable counter and an 8-bit envelope control for alarm, frequency or melody output
from BZ/BZB.
The frequency counter can use software to select 1/2 duty, 1/3 duty or 1/4 duty drive mode.
FREQ
1/2 DUTY FREQ
1/3 DUTY FREQ
1/4 DUTY FREQ
4.10 INT Function
The INT pin can be selected by mask option as pull-high/pull-low or none, and rising edge/falling edge trigger.
4.11 Watchdog Timer
The watchdog timer automatically generates a device reset when it overflows. The interval of overflow is 8/64/
512 x PH10 (set by mask option). You can use software to enable and disable this function. The watchdog
enable flag will be disabled by power-on reset or reset-pin reset condition, but can not be disabled by watchdog reset itself.
4.12 HALT Function
The HALT instruction will disable all clocks except the predivider, timer, frequency counter, PWM, EL-light
generator and chattering clock to minimize the operating current.
4.13 STOP Function
The STOP instruction will disable all clocks to minimize the standby current, so only two external factors (INT,
IOA/IOC/S port, keyscan) can release the STOP condition.
7/20
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
5.0 BSOLUTE MAXIMUM RATINGS
at Ta=0 to 70 oC, GND=0V
Name
Maximum Supply Voltage
Maximum Input Voltage
Maximum Output Voltage
Maximum Operating Temperature
Maximum Storage Temperature
Symbol
VDD1
VDD2
VDD3
VDD4
Vin
Vout1
Vout2
Range
-0.3 to 5.5
-0.3 to 5.5
-0.3 to 8.5
-0.3 to 8.5
-0.3 to VDD 1/2 +0.3
-0.3 to VDD1/2 + 0.3
-0.3 to VDD3 + 0.3
Topq
0 to +70
o
C
-25 to +125
o
C
Tstg
Unit
V
V
V
V
V
V
V
6.0 ALLOWABLE OPERATING CONDITIONS
at Ta=0 to 70 oC, GND=0V
Name
Supply Voltage
Oscillator Start-up Voltage
Oscillator Sustain Voltage
Supply Voltage
Supply Voltage
Input 'H' Voltage
Input 'L' Voltage
Input 'H' Voltage
Input 'L' Voltage
Input 'H' Voltage
Input 'L' Voltage
Input 'H' Voltage
Input 'L' Voltage
Input 'H' Voltage
Input 'L' Voltage
Input 'H' Voltage
Input 'L' Voltage
Operating Freq
Symb.
VDD1
VDD2
VDD3
VDD4
VDDB
VDDB
VDD1
VDD2
Vih1
Vil1
Vih2
Vil2
Vih3
Vil3
Vih4
Vil4
Vih5
Vil5
Vih6
Vil6
Fopg1
Fopg2
Fopg3
Condition
Crystal Mode
Crystal Mode
Ag Mode
EXT-V, Li Mode
Ag Battery Mode
Li Battery Mode
OSCIN at Ag Battery
Mode
OSCIN at Li Battery
Mode
CFIN at Li Battery or
EXT-V Mode
RC Mode
Crystal Mode
External RC Mode
CF Mode
8/20
Min.
1.2
2.4
2.4
2.4
1.3
1.2
1.2
2.4
VDD1-0.7
-0.7
VDD2-0.7
-0.7
0.8 x VDD1
0
0.8 x VDD2
0
0.8 x VDD2
0
0.8 x VDDO
0
32
32
1000
Max.
5.25
5.25
8.0
8.0
1.65
5.25
VDD1+0.7
0.7
VDD2+0.7
0.7
VDD1
0.2 x VDD1
VDD2
0.2 x VDD2
VDD2
0.2 x VDD2
VDDO
0.2 x VDDO
3580
1000
3580
MTU429B Revision 3.0
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
KHz
KHz
KHz
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
7.0 ELECTRICAL CHARACTERISTICS
At #1: VDD1 = 1.2V (Ag); at #2: VDD2 = 2.4V (Li); at #3: VDD2 = 4V (Ext-V)
7.1 Input Resistance
Name
'L'-level Hold Tr (IOC)
IOC/IOA Pull-down Tr
INT Pull-up Tr
INT Pull-down Tr
RES Pull-down R
Symb.
Rllh1
Rllh2
Rllh3
Rmad1
Rmad2
Rmad3
Rintu1
Rintu2
Rintu3
Rintd1
Rintd2
Rintd3
Rres1
Rres2
Rres3
Condition
Vi=0.2VDD1, #1
Vi=0.2VDD2, #2
Vi=0.2VDD3, #3
Vi=VDD1, #1
Vi=VDD2, #2
Vi=VDD3, #3
Vi=VDD1, #1
Vi=VDD2, #2
Vi=VDD3, #3
Vi=GND, #1
Vi=GND, #2
Vi=GND, #3
Vi=GND or VDD1, #1
Vi=GND or VDD2, #2
Vi=GND or VDD3, #3
Min.
10
10
5
200
200
100
200
200
100
200
200
100
5
5
5
Typ.
40
40
20
500
500
250
500
500
250
500
500
250
20
20
20
Max.
100
100
50
1000
1000
500
1000
1000
500
1000
1000
500
50
50
50
Unit
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
Kohm
7.2 DC Output Characteristics
Name
Output 'H' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'L' Voltage
Symb.
Voh1a
Voh2a
Voh3a
Vol1a
Vol2a
Vol3a
Voh1c
Voh2c
Voh3c
Vol1c
Vol2c
Vol3c
Condition
Ioh=-10uA, #1
Ioh=-50uA, #2
Ioh=-200uA, #3
Iol=20uA, #1
Iol=100uA, #2
Iol=400uA, #3
Ioh=-200uA, #1
Ioh=-1mA, #2
Ioh=-3mA, #3
Iol=400uA, #1
Iol=2mA, #2
Iol=6mA, #3
Port
SEG1~26
SEG27~42
IOA, B, C,D
9/20
Min.
0.8
1.5
2.5
0.2
0.3
0.5
0.8
1.5
2.5
0.2
0.3
0.5
Typ.
0.9
1.8
3
0.3
0.6
1
0.9
1.8
3
0.3
0.6
1
Max.
1.0
2.1
3.5
0.4
0.9
1.5
1.0
2.1
3.5
0.4
0.9
1.5
MTU429B Revision 3.0
Unit
V
V
V
V
V
V
V
V
V
V
V
V
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
7.3 Segment Driver Output Characteristics
Name
Output 'H' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'M' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'M1' Voltage
Output 'M2' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'M1' Voltage
Output 'M2' Voltage
Output 'L' Voltage
Symb.
Voh1d
Voh2d
Voh3d
Vol1d
Vol2d
Vol3d
Voh1e
Voh2e
Voh3e
Vol1e
Vol2e
Vol3e
Condition
For
Static Display Mode
Ioh=-1uA, #1
Ioh=-1uA, #2
Ioh=-1uA, #3
SEG-n
Iol=1uA, #1
Iol=1uA, #2
Iol=1uA, #1
Ioh=-10uA, #1
Ioh=-10uA, #2
Ioh=-10uA, #3
COM-n
Ioh=10uA, #1
Ioh=10uA, #2
Ioh=10uA, #3
1/2 Bias Display Mode
Voh12f
Ioh=-1uA, #1, #2
Voh3f
Ioh=-1uA, #3
SEG-n
Vol12f
Iol=1uA, #1, #2
Vol3f
lol=1uA, #3
Voh12g Ioh=-10uA, #1, #2
Voh3g
Ioh=-10uA, #3
Vom12g Iol/h=+/-10uA, #1, #2
COM-n
Vom3g
Iol/h=+/-10uA, #3
Vol12g
lol=10uA, #1, #2
Vol3g
lol=10uA, #3
Voh12i
Voh3i
Vom12i
Vom13i
Vom22i
Vom23i
Vol12i
Vol3i
Voh12j
Voh3j
Vom12j
Vom13j
Vom22j
Vom23j
Vol12j
Vol3j
1/3 Bias Display Mode
loh=-1uA, #1, #2
loh=-1uA, #3
lol/h=+/-10uA, #1, #2
lol/h=+/-10uA, #3
SEG-n
lol/h=+/-10uA, #1, #2
lol/h=+/-10uA, #3
lol=1uA, #1, #2
lol=1uA, #3
loh=-10uA, #1, #2
loh=-10uA, #3
lol/h=+/-10uA, #1, #2
lol/h=+/-10uA, #3
COM-n
lol/h=+/-10uA, #1, #2
lol/h=+/-10uA, #3
loh=10uA, #1, #2
loh=10uA, #3
10/20
Min.
Typ.
Max.
1.0
2.2
3.8
0.2
0.2
0.2
1.0
2.2
3.8
0.2
0.2
0.2
2.2
3.8
0.2
0.2
2.2
3.8
1.0
1.8
3.4
5.8
1.0
1.8
2.2
3.8
3.4
5.8
1.0
1.8
2.2
3.8
1.4
2.2
0.2
0.2
1.4
2.2
2.6
4.2
0.2
0.2
1.4
2.2
2.6
4.2
0.2
0.2
MTU429B Revision 3.0
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
28/Oct/1999
MYSON
TECHNOLOGY
Name
Output 'H' Voltage
Output 'M1' Voltage
Output 'M2' Voltage
Output 'M3' Voltage
Output 'L' Voltage
Output 'H' Voltage
Output 'M1' Voltage
Output 'M2' Voltage
Output 'M3' Voltage
Output 'L' Voltage
Symb.
Condition
MTU429B
(Preliminary)
For
1/4 Bias Display Mode
Voh12i
loh=-1uA, #1, #2
Voh3i
loh=-1uA, #3
Vom12i lol/h=+/-10uA, #1, #2
Vom13i lol/h=+/-10uA, #3
Vom22i lol/h=+/-10uA, #1, #2
SEG-n
Vom23i lol/h=+/-10uA, #3
Vom32i lol/h=+/-10uA, #1, #2
Vom33i lol/h=+/-10uA, #3
Vol12i
lol=1uA, #1, #2
Vol3i
lol=1uA, #3
Voh12m loh=-10uA, #1, #2
Voh3j
loh=-10uA, #3
Vom12j lol/h=+/-10uA, #1, #2
Vom13j lol/h=+/-10uA, #3
Vom22j lol/h=+/-10uA, #1, #2
COM-n
Vom23j lol/h=+/-10uA, #3
Vom32m lol/h=+/-10uA, #1, #2
Vom33m lol/h=+/-10uA, #3
Vol12j
loh=10uA, #1, #2
Vol3j
loh=10uA, #3
11/20
Min.
4.6
7.3
1.0
1.8
2.2
3.8
3.4
5.8
4.6
7.3
1.0
1.8
2.2
3.8
3.4
5.8
Typ.
Max.
1.4
2.2
2.6
4.2
3.8
6.2
0.2
0.2
1.4
2.2
2.6
4.2
3.8
6.2
0.2
0.2
MTU429B Revision 3.0
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
8.0 INSTRUCTION TABLE ( Total 150 instructions )
Instruction
NOP
LCT
Lz, Ry
LCB
Lz, Ry
LCP
Lz, Ry
LCD
Lz, @HL
LCT
Lz, @HL
LCB
Lz, @HL
LCP
Lz, @HL
OPA
Rx
OPAS Rx, D
OPB
Rx
OPC
Rx
OPD
Rx
OPDS Rx, D
FRQ
D, Rx
FRQ
FRQX
MVL
MVH
MPW1
MPW2
ADC
ADC
ADC*
ADC*
SBC
SBC
SBC*
SBC*
ADD
ADD
ADD*
ADD*
SUB
SUB
SUB*
SUB*
ADN
ADN
ADN*
D, @HL
D, X
Rx
Rx
Rx
Rx
Rx
@HL
Rx
@HL
Rx
@HL
Rx
@HL
Rx
@HL
Rx
@HL
Rx
@HL
Rx
@HL
Rx
@HL
Rx
Machine Code
0000 0000 0000 0000
0000 001Z ZZZZ YYYY
0000 010Z ZZZZ YYYY
0000 011Z ZZZZ YYYY
0000 100Z ZZZZ Z-00
0000 100Z ZZZZ Z-01
0000 100Z ZZZZ Z-10
0000 100Z ZZZZ Z-11
0000 1010 0XXX XXXX
0000 1011 DXXX XXXX
0000 1100 0XXX XXXX
0000 1101 0XXX XXXX
0000 1110 0XXX XXXX
0000 1111 DXXX XXXX
0001 00DD 0XXX XXXX
0001 01DD 0000 0000
0001 10DD XXXX XXXX
0001 1100 0XXX XXXX
0001 1101 0XXX XXXX
0001 1110 0XXX XXXX
0001 1111 0XXX XXXX
0010 0000 0XXX XXXX
0010 0000 1000 0000
0010 0001 0XXX XXXX
0010 0001 1000 0000
0010 0010 0XXX XXXX
0010 0010 1000 0000
0010 0011 0XXX XXXX
0010 0011 1000 0000
0010 0100 0XXX XXXX
0010 0100 1000 0000
0010 0101 0XXX XXXX
0010 0101 1000 0000
0010 0110 0XXX XXXX
0010 0110 1000 0000
0010 0111 0XXX XXXX
0010 0111 1000 0000
0010 1000 0XXX XXXX
0010 1000 1000 0000
0010 1001 0XXX XXXX
Function
No Operation
Lz
Lz
Lz
Lz
Lz
Lz
Lz
Port(A)
A1, 2, 3, 4
Port(B)
Port(C)
Port(D)
D1, 2, 3, 4
FREQ
DD=00
DD=01
DD=10
DD=11
FREQ
FREQ
@L
@H
PW1
PW2
AC
AC
AC, Rx
AC, @HL
AC
AC
AC, Rx
AC, @HL
AC
AC
AC, Rx
AC, @HL
AC
AC
AC, Rx
AC, @HL
AC
AC
AC, Rx
12/20
Flag/Remark
⇐ {7SEG ⇐ Ry}
⇐ {7SEG ⇐ Ry}
Ry, AC
T@HL
{7SEG @HL
{7SEG @HL
@HL, AC
Rx
Rx0, Rx1, D, Pulse
Rx
Rx
Rx
Rx0, Rx1, D, Pulse
Rx, AC
: 1/4 Duty
: 1/3 Duty
: 1/2 Duty
: 1/1 Duty
T@HL
X
Rx
Rx
Rx, AC
Rx, AC
Rx+AC+CF
@HL+AC+CF
Rx+AC+CF
@HL+AC+CF
Rx+ACB+CF
@HL+ACB+CF
Rx+ACB+CF
@HL+ACB+CF
Rx+AC
@HL+AC
Rx+AC
@HL+AC
Rx+ACB+1
@HL+ACB+1
Rx+ACB+1
@HL+ACB+1
Rx+AC
@HL+AC
Rx+AC
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
Instruction
ADN*
@HL
AND
Rx
AND
@HL
AND*
Rx
AND*
@HL
EOR
Rx
EOR
@HL
EOR*
Rx
EOR*
@HL
OR
Rx
OR
@HL
OR*
Rx
OR*
@HL
ADCI
Ry, D
ADCI* Ry, D
SBCI
Ry, D
SBCI*
Ry, D
ADDI
Ry, D
ADDI* Ry, D
SUBI
Ry, D
SUBI*
Ry, D
ADNI
Ry, D
ADNI* Ry, D
ANDI
Ry, D
ANDI* Ry, D
EORI
Ry, D
EORI* Ry, D
ORI
Ry, D
ORI*
Ry, D
INC
Rx
INC*
@HL
DEC
Rx
DEC*
@HL
IPA
Rx
IPB
Rx
IPS
Rx
IPC
Rx
IPD
Rx
Machine Code
0010 1001 1000 0000
0010 1010 0XXX XXXX
0010 1010 1000 0000
0010 1011 0XXX XXXX
0010 1011 1000 0000
0010 1100 0XXX XXXX
0010 1100 1000 0000
0010 1101 0XXX XXXX
0010 1101 1000 0000
0010 1110 0XXX XXXX
0010 1110 1000 0000
0010 1111 0XXX XXXX
0010 1111 1000 0000
0011 0000 DDDD YYYY
0011 0001 DDDD YYYY
0011 0010 DDDD YYYY
0011 0011 DDDD YYYY
0011 0100 DDDD YYYY
0011 0101 DDDD YYYY
0011 0110 DDDD YYYY
0011 0111 DDDD YYYY
0011 1000 DDDD YYYY
0011 1001 DDDD YYYY
0011 1010 DDDD YYYY
0011 1011 DDDD YYYY
0011 1100 DDDD YYYY
0011 1101 DDDD YYYY
0011 1110 DDDD YYYY
0011 1111 DDDD YYYY
0100 0000 0XXX XXXX
0100 0000 1000 0000
0100 0001 0XXX XXXX
0100 0001 1000 0000
0100 0010 0XXX XXXX
0100 0100 0XXX XXXX
0100 0110 0XXX XXXX
0100 0111 0XXX XXXX
0100 1000 0XXX XXXX
AC, @HL
AC
AC
AC, Rx
AC, @HL
AC
AC
AC, Rx
AC, @HL
AC
AC
AC, Rx
AC, @HL
AC
AC, Ry
AC
AC, Ry
AC
AC, Ry
AC
AC, Ry
AC
AC, Ry
AC
AC, Ry
AC
AC, Ry
AC
AC, Ry
AC, Rx
AC, @HL
AC, Rx
AC, @HL
AC, Rx
AC, Rx
AC, Rx
AC, Rx
AC, Rx
MTU429B
(Preliminary)
Function
@HL+AC
Rx AND AC
@HL AND AC
Rx AND AC
@HL AND AC
Rx EOR AC
@HL EOR AC
Rx EOR AC
@HL EOR AC
Rx OR AC
@HL OR AC
Rx OR AC
@HL OR AC
Ry+D+CF
Ry+D+CF
Ry+DB+CF
Ry+DB+CF
Ry+D
Ry+D
Ry+DB+1
Ry+DB+1
Ry+D
Ry+D
Ry AND D
Ry AND D
Ry EOR D
Ry EOR D
Ry OR D
Ry OR D
Rx+1
@HL+1
Rx-1
@HL-1
Port(A)
Port(B)
Port(S)
Port(C)
Port(D)
MAF
Rx
0100 1010 0XXX XXXX AC, Rx
STS1
MSB
Rx
0100 1011 0XXX XXXX AC, Rx
STS2
13/20
Flag/Remark
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
CF
B3: CF
B2: ZERO
B1: (No use)
B0: (No use)
B3: (No use)
B2: SCF2(HRx)
B1: SCF1(CPT)
B0: BCF
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
Instruction
Machine Code
MTU429B
(Preliminary)
Function
MSC
Rx
0100 1100 0XXX XXXX AC, Rx
STS3
MCX
Rx
0100 1101 0XXX XXXX AC, Rx
STS3X
MSD
Rx
0100 1110 0XXX XXXX AC, Rx
STS4
SR0
Rx
0101 0000 0XXX XXXX
SR1
Rx
0101 0001 0XXX XXXX
SL0
Rx
0101 0010 0XXX XXXX
SL1
Rx
0101 0011 0XXX XXXX
Rx
@HL
0101 0101 0XXX XXXX
DAA
DAA*
DAA*
DAS
DAS*
DAS*
LDS
LDH
0101 0100 0000 0000
0101 0101 1000 0000
0101 0110 0000 0000
0101 0111 0XXX XXXX
Rx
0101 0111 1000 0000
@HL
0101 1DDD DXXX XXXX
Rx, D
Rx, @HL 0110 0000 0XXX XXXX
LDH*
Rx, @HL
0110 0001 0XXX XXXX
LDL
Rx, @HL
0110 0010 0XXX XXXX
LDL*
Rx, @HL
0110 0011 0XXX XXXX
MRF1
MRF2
MRF3
MRF4
STA
STA
LDA
LDA
MRA
MRW
MWR
MRW
MWR
JB0
Rx
Rx
Rx
Rx
Rx
@HL
Rx
@HL
Rx
@HL, Rx
RX, @HL
Ry, Rx
Rx, Ry
X
0110 0100 0XXX XXXX
0110 0101 0XXX XXXX
0110 0110 0XXX XXXX
0110 0111 0XXX XXXX
0110 1000 0XXX XXXX
0110 1000 1000 0000
0110 1100 0XXX XXXX
0100 1100 1000 0000
0110 1101 0XXX XXXX
0110 1110 0XXX XXXX
0110 1111 0XXX XXXX
0111 0YYY YXXX XXXX
0111 1YYY YXXX XXXX
1000 0XXX XXXX XXXX
ACn, Rxn
AC3, Rx3
ACn, Rxn
AC3, Rx3
ACn, Rxn
AC0, Rx0
ACn, Rxn
AC0, Rx0
AC
AC, Rx
AC, @HL
AC
AC, Rx
AC, @HL
AC, Rx
AC, Rx
AC, Rx
@HL
AC, Rx
AC, Rx
@HL
AC, Rx
AC, Rx
AC, Rx
AC, Rx
Rx
@HL
AC
AC
CF
AC, @HL
AC, Rx
AC, Ry
AC, Rx
PC
14/20
Rx(n+1)
0
Rx(n+1)
1
Rx(n-1)
0
Rx(n-1)
1
BCD(AC)
BCD(AC)
BCD(AC)
BCD(AC)
BCD(AC)
BCD(AC)
D
H(T@HL)
L(T@HL)
@HL+1
L(T@HL)
L(T@HL)
@HL+1
RFC3-0
RFC7-4
RFC11-8
RFC15-12
AC
AC
Rx
@HL
Rx3
Rx
@HL
Rx
Ry
X
Flag/Remark
B3: SCF7(PDV)
B2: PH15
B1: SCF5(TMR1)
B0: SCF4(INT)
B3: SCF9(RFC)
B2: SCF0(APT)
B1: SCF6(TMR2)
B0: (No use)
B3: (No use)
B2: RFOVF
B1: WDF
B0: CSF
CF
CF
CF
CF
CF
CF
if AC0=1
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
Instruction
JB1
X
JB2
X
JB3
X
JNZ
X
JNC
X
JZ
X
JC
X
CALL
X
JMP
RTS
X
SCC
X
SCA
(SMS)
X
SPA
X
SPB
X
SPC
X
SPD
TMS
TMS
X
Rx
@HL
TMSX
X
SPK
Rx
TM2
TM2
Rx
@HL
Machine Code
MTU429B
(Preliminary)
Function
X
1001 0XXX XXXX XXXX PC
X
1001 1XXX XXXX XXXX PC
X
1010 0XXX XXXX XXXX PC
X
1010 1XXX XXXX XXXX PC
X
1011 0XXX XXXX XXXX PC
X
1011 1XXX XXXX XXXX PC
X
STACK
PC+1
1100 XXXX XXXX XXXX
PC
X
1101 0XXX XXXX XXXX PC
X
1101 1000 0000 0000 PC
STACK
X6=1
: Cfq=BCLK
X6=0
: Cfq=PH0
X5=1
: Cpw=BCLK
X5=1
: Cpw=PH0
X4, 3=1X
: Set P(A)
1101 1001 0XXX XXXX
X4, 3=01
: Set P(S)
X4, 3=00
: Set P(C)
X2, 1, 0=001 : Cch=PH10
X2, 1, 0=010 : Cch=PH8
X2, 1, 0=1XX : Cch=PH6
X0~3
: S1-4 Enable (SEF0~3)
1101 1010 00XX XXXX X5
: A1-4 Enable (SEF5)
X4
: C1-4 Enable (SEF4)
X4
: Set A4-1 Pull-low
1101 1100 000X XXXX
X3~0
: Set A4-1 I/O
1101 1101 0000 XXXX X3-0
: Set D4-1 I/O
X4
: Set C4-1 Pull-low /
1101 1110 000X XXXX
Low-level hold
X3-0
: Set C4-1 I/O
1101 1111 0000 XXXX X3-0
: Set D4-1 I/O
1110 0000 0XXX XXXX Timer1
(Rx), (AC)
1110 0001 0000 0000 Timer1
(T@HL)
X7, 6=11
: Ctm=FREQ
X7, 6=10
: Ctm=PH15
1110 0010 XXXX XXXX X7, 6=01
: Ctm=PH3
X7, 6=00
: Ctm=PH9
X5~0
: Set Timer1 Value
X5=1
: Set all Hi-z
1110 0011 00XX XXXX X4=1
: Set all=1
X3~0
: Set n of 16
1110 0100 0XXX XXXX Timer2
Rx, AC
1110 0101 0000 0000 Timer2
T@HL
1000 1XXX XXXX XXXX PC
15/20
Flag/Remark
if AC1=1
if AC2=1
if AC3=1
if AC≠0
if CF=0
if AC0=0
if CF=1
CALL Return
IOC=normal
IOC=key_scan
IOC=key_scan
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
Instruction
Machine Code
TM2X
X
1110 011X XXXX XXXX
SHE
X
1110 1000 0XXX XXX0
SIE*
X
1110 1001 0XXX XXXX
PLC
X
1110 101X 0XXX XXXX
SRF
X
1110 1100 00XX XXXX
SRE
X
1110 1101 XXXX XXXX
FAST
SLOW
SF
RF
1110 1110 0000 0000
1110 1111 0000 0000
X
X
1111 0000 X0XX XXXX
1111 0100 X0XX 0XXX
X8,7,6=111
X8,7,6=110
X8,7,6=101
X8,7,6=000
X8,7,6=011
X8,7,6=010
X8,7,6=001
X8,7,6=000
X5~0
X6
X5
X4
X3
X2
X1
X6
X5
X4
X3
X2
X1
X0
X8
X6, 4-0
X5
X4
X3
X2
X1
X0
X7
X6
X5
X4
X0~3
SCLK
SCLK
X7
X5
X4
X3
X2
X1
X0
X7
X5
X4
X2
X1
X0
16/20
MTU429B
(Preliminary)
Function
: Ctm=PH13
: Ctm=PH11
: Ctm=PH7
: Ctm=PH5
: Ctm=FREQ
: Ctm=PH15
: Ctm=PH3
: Ctm=PH9
: Set Timer2 Value
: Enable HEF6(RFC)
: Enable HEF5(KEY_S)
: Enable HEF4(TMR2)
: Enable HEF3(PDV)
: Enable HEF2(INT)
: Enable HEF1(TMR1)
: Enable IEF6(RFC)
: Enable IEF5(KEY_S)
: Enable IEF4(TMR2)
: Enable IEF3(PDV)
: Enable IEF2(INT)
: Enable IEF1(TMR1)
: Enable IEF0(A, CPT)
: Reset PH15~11
: Reset HRF6, 5-0
: Enable Cx Control
: Enable Timer2 Control
: Enable Counter
: Enable RH Output
: Enable RT Output
: Enable RR Output
: Enable SRF7
: Enable SRF6
: Enable SRF5
: Enable SRF4
: Enable SRF0~3
: High Speed Clock
: High Speed Clock
: Reload Set
: S-port Pull-low
: WDT Enable
: HALT after EL-light
: EL-light On
: BCF Set
: CF Set
: Reload Reset
: S-port L_L H
: WDT Reset
: EL-Light Off
: BCF Reset
: CF Reset
Flag/Remark
ENX
EHM
ETP
ERR
SRF7(KEY_S)
SRF6(A Port)
SRF5(INT)
SRF4(C Port)
SRF0~3(S Port)
RL1
WDF
BCF
CF
RL1
WDF
BCF
CF
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
Instruction
SF2
RF2
ALM
ELC
HALT
STOP
X
X
X
X
Machine Code
MTU429B
(Preliminary)
Function
: Reload Set
: Disable Dis-ENX Set
1111 1000 0000 0XXX
: Close all segments
: Jump to next page
: Reload Reset
: Disable Dis-ENX
1111 1001 0000 0XXX
Reset
X2
: Release all segments
X8,7,6=111 : FREQ
X8,7,6=100 : DC1
X8,7,6=011 : PH3
1111 101X XXXX XXXX X8,7,6=010
: PH4
X8,7,6=001 : PH5
X8,7,6=000 : DC0
X5~0
PH15~10
X8=1
BCLKX
X8=0
PH0
X7,6=11
BCLK/8
X7,6=10
BCLK/4
X7,6=01
BCLK/2
X7,6=00
BCLK
X5,4=11
1/1
X5,4=10
1/2
X5,4=01
1/3
1111 110X XXXX XXXX
X5,4=00
1/4
X3,2 =11
PH5
X3,2=10
PH6
X3,2=01
PH7
X3,2=00
PH8
X1,0=11
1/1
X1,0=10
1/2
X1,0=01
1/3
X1,0=00
1/4
1111 1110 0000 0000 HALT Operation
1111 1111 0000 0000 STOP Operation
X0
X1
X2
X3
X0
X1
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Flag/Remark
RL2
DED
RSOFF
RL2
DED
REOFF
ELP-CLK
BCLKX
ELP-DUTY
ELC-CLK
ELC-DUTY
MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
8.1 Symbol Description
AC
ACn
X
Rx
Rxn
Ry
BCF
: Accumulator
: Accumulator Bit N
: Address
: Memory of Address X
: Memory Bit N of Address X
: Memory of Working Register Y
: Backup Flag
D
PC
CF
ZERO
WDF
HL
BCLK
: Immediate Date
: Program Counter
: Carry Flag
: Zero Flag
: Watchdog Timer Enable Flag
Index Register
System clock stops only in STOP condition
@HL
: Address of Index
IEFn
: Interrupt Enable Flag
HRFn
: HALT Release Flag
SRFn
: STOP Release Enable Flag
HEFn
: HALT Release Enable Flag
SCFn
: Start Condition Flag
Cfq
: Clock Source of Frequency Generator Cch
: Clock Source of Chattering Detector
Ctm
: Clock Source of Timer
TMR
: Timer Overflow Release Flag
Fout
: RFC Frequency
( )
: Content of Register
PDV
: Predivider
SEFn
: Switch Enable Flag
Lz
: LCD Latch
FREQ
: Frequency Generator Setting Value
T@HL
: Address of Index ROM
ADF
: ADC Flag
CSF
: Clock Source Flag
DAC
: Digital-to-Analog Converter Output
Signal
@L
: Low Address of Index
@H
: High Address of Index
RFOVF : RFC Overflow Flag
H(T@HL) : High Nibble of Index ROM
L(T@HL) : Low Nibble of Index ROM
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MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
9.0 APPENDIX ( Important Issue for MTU419/419B/428/429B )
9.1 Chip’s internal vlotage V.S. power mode and external connection
VDD1
VDD2
VDD3 *1
VDD4 *2
BAK *3
AG
Vsupply
2 x VDD1
3 x VDD1
4 x VDD1
VDD1
LI
1/2 x Vsupply
Vsupply
3/2 x Vsupply
2 x Vsupply
BCF = 0
BCF=1
VDD1
VDD2
EXT-V
1/2 x Vsupply
Vsupply
3/2 x Vsupply
2 x Vsupply
VDD2
Note *1: VDD3 is only used for LCD operating in 1/3 bias and 1/4 bias. If 1/2 bias chosen, VDD3 need be
connected to VDD2 (VDD3 is equal to VDD2).
*2: VDD4 is only used for LCD operating in 1/4 bias. If 1/3 bias chosen, VDD4 need be connected to
VDD3 (VDD4 is equal to VDD3). If 1/2 bias chosen, VDD4 need be connected to VDD2 (VDD4 is
equal to VDD2).
*3: BAK is defined as chip’s internal power supply node, which is used only for internal logic circuitry.
A. Whatever the power mode used, all external VDD# pins must connect a capacitor (0.05uF or 0.1uF) to
GND for decoupling power noise using.
B. All VDD# pins other than Vsupply are from voltage charge pump, i.e. If no clock, then VDD# pins can not
supply out.
C. Vsupply is the power supply for Chip and depends on the power mode used, all the input and output pins
voltage range follow the Vsupply.
9.2 The capacitor connected between CUP2 and CUP3 is only when MTU429B operating in 1/4 bias.
9.3 Some notes for BCF flag
BCF is always set to “High” automatically after Power on, Reset and Stop mode.
A. For power saving use, BCF may be set to “Low” which can reduce chip’s current consumption.
B. Ag and Li battery mode applications:
After Power on, Reset or release from Stop mode. Need to wait 2 seconds long, then can set BCF to
“Low”.
C. Larger current load and fast clock:
a. BCF should be set to “High” for the case of fast clock or larger current load (such as RFC, ADC, DAC,
EL-light and Buzzer output) use.
b. After set BCF to “high”, need wait 2 ms long at least, then can enable larger current load. Or after
disable Larger current load, need wait 2ms long at least, then can set BCF to “Low”
D. Li battery mode applications:
Especially for Li battery mode, BCF switching will cause a temporary current surge (or power noise)
on BAK. Furthermore if not necessary, don’t switch BCF too often as possible.
E. Improperly use of BCF will cause malfunction to chips.
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MTU429B Revision 3.0
28/Oct/1999
MYSON
TECHNOLOGY
MTU429B
(Preliminary)
F. Lower current consumption and reliability:
The chip’s reliability will greatly decrease if invalid use BCF, especially for Li-battery mode. Because the
chip’s internal power also switches between VDD1 and VDD2, which also cause a temporary power
noise.
9.4 Input pin
Any input pins floating will cause chips in malfunction and large current consumption.
9.5 32.768KHz X’tal oscillator
Always layout the X’tal as close the Chips as possible and don’t place any signals across the layout routing.
Since X’tal oscillation circuit consumes current only 0.5uA to 1uA, any power noise will disturb the oscillation.
The proper external capacitors for Xin and Xout are necessary for the accuracy and stability of oscillation.
1/( Cin+Cpcb ) + 1/( Cout+Cpcb ) = 1/CL
The Chip’s Xout pin has an internal capacitor around 10~20pf connected to BAK (chip’s internal Node).
For example
Epson’s C-001R 20ppm, CL=12.5pf
Cin = 25pf
Cout = 15pf
The time accuracy will be around +/- 0.5 second/day
Note: The parasitic capacitors of X’tal pins in PCB layout need be considered in above calculation.
9.6 RFC / Event counter / IOA for MTU429B
If anyone uses RFC / Event counter function and IOAs in the same application, make sure the pin IOA1
(which is corresponding to CX by mask option) must set as IOA’s output mode by SPA instruction. Or the
signal changes on CX pin may cause halt release or interrupt for IOA’s port. In this case the program couldn’t
function properly.
Myson Technology, Inc.
No. 2, Industry E. Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
Tel: +886-3-5784866
Fax: +886-3-5785002
http://www.myson.com.tw
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MTU429B Revision 3.0
28/Oct/1999