NCP100 Sub 1.0 V Precision Adjustable Shunt Regulator The NCP100 is a precision low voltage shunt regulator that is programmable over a voltage range of 0.9 V to 6.0 V. This device features a guaranteed reference accuracy of ±1.7% at 25°C and ±2.6% over the entire temperature range of −40°C to 85°C. The NCP100 exhibits a sharp low current turn−on characteristic with a low dynamic impedance of 0.20 over an operating current range of 100 A to 20 mA. These characteristics make this device an ideal replacement for zener diodes in numerous application circuits that require a precise low voltage reference. When combined with an optocoupler, the NCP100 can be used as an error amplifier for controlling the feedback loop in isolated low output voltage (2.3 V) switching power supplies. This device is available in TO−92 and in an economical space saving TSOP−5 package. http://onsemi.com TO−92 (TO−226) LP SUFFIX CASE 029 1 2 Pin 1. Reference 2. Anode 3. Cathode 3 5 1 Features Programmable Output Voltage Range of 0.9 V to 6.0 V Voltage Reference Tolerance of ±1.7% Sharp Low Current Turn−ON Characteristic Low Dynamic Output Impedance of 0.2 from 100 A to 20 mA Wide Operating Current Range of 80 A to 20 mA TO−92 and Space Saving TSOP−5 Package Pb−Free Package is Available PIN CONNECTIONS AND MARKING DIAGRAM NC 1 Anode 2 Cathode 3 Reference for Single Cell Alkaline, NiCD and NiMH Applications Low Output Voltage (2.3 V) Switching Power Supply Error Amp Battery Powered Consumer Products Portable Test Equipment and Instrumentation Cathode (K) XXXXX XXXXX ALYWWG G Cathode (K) Reference (R) Reference (R) 5 Anode 4 Reference (Top View) Applications • • • • RABAYWG G • • • • • • • TSOP−5 SN SUFFIX CASE 483 0.7 V RAB = Device Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) Anode (A) ORDERING INFORMATION Anode (A) Figure 1. Symbol Figure 2. Representative Block Diagram Package Shipping † TSOP−5 3000 / Tape & Reel NCP100SNT1G TSOP−5 (Pb−Free) 3000 / Tape & Reel NCP100ALPRPG TO−92 (Pb−Free) 2000 / Ammo Pack Device NCP100SNT1 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 10 1 Publication Order Number: NCP100/D NCP100 MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁ Rating Cathode to Anode Voltage (Note 1) Cathode Current Range, Continuous (Note 2) Reference Input Current Range, Continuous (Note 1) Symbol Value Unit VKA 7.0 V IK −20 to 25 mA IREF −0.05 to 2.0 mA °C/W Thermal Resistance LP Suffix, TO−92 Package Thermal Resistance, Junction−to−Ambient Thermal Resistance, Junction−to−Lead SN Suffix, TSOP−5 Package Thermal Resistance, Junction−to−Ambient RJA Rpsi−J−Anode lead 168 32 RJA 225 Operating Junction Temperature Range TJ −40 to 125 °C Storage Temperature Range Tstg −65 to 150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 4000 V per JESD−22, Method A114B. Machine Model Method 400 V. 2. The maximum package power dissipation limit must not be exceeded. TJ(max) * TA PD + RJA RECOMMENDED OPERATING CONDITIONS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ Condition Cathode−to−Anode Voltage Range (Note 3) Cathode Current Range Symbol Min Max Unit VKA 0.9 6.0 V IK 0.1 20 mA 3. Valid device operation is not guaranteed if Vka is allowed to fall below 0.875 V at any time over the operating temperature range of −40°C to +85°C. http://onsemi.com 2 NCP100 ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.) ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ Characteristic Symbol Reference Voltage (IKA = 10 mA, Figure 3) VKA = 0.9 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 85°C VKA = 1.0 V TA = 25°C TA = 0°C to 70°C TA = −40°C to 85°C Min Typ Max VREF Reference Input Voltage Change Over Temperature VKA = 1.0 V, IK = 10 mA, TA = −40°C to 85°C, Figure 3 (Notes 4, 5) VREF Reference Input Voltage Change Over Programmed Cathode Voltage (IK = 10 mA, Figure 3) VKA = 0.9 V to 1.0 V VKA = 1.0 V to 6.0 V Regline Ratio of Reference Input Voltage Change to Cathode Voltage Change VKA = 0.9 V to 6.0 V, IK = 10 mA, Figure 3 VREF Unit V 0.684 0.682 0.678 0.696 − − 0.708 0.710 0.714 0.686 0.684 0.680 0.698 − − 0.710 0.712 0.716 − 1.0 12 mV mV −5.0 0 0.2 6.7 5.0 12 − 1.3 2.4 mV/V IREF −100 −30 100 nA Minimum Cathode Current for Regulation IK(min) − 80 − A Cathode Off−State Current (VKA = 6.0 V, VREF = 0 V) IK(off) − 70 90 A Dynamic Output Impedance VKA = 1.0 V, IK = 100 A to 20 mA, f v 1.0 kHz, Figure 3 |ZKA| − 0.2 − VKA Reference Input Current (VKA = 1.0 V, IK = 10 mA) 4. Low duty cycle pulse techniques are used during testing to maintain the junction temperatures as close to ambient as possible. 5. The VREF parameter is defined as the difference between the maximum and minimum values obtained over the ambient temperature range of −40°C to 85°C. VREF (max) VREF = VREF (max) − VREF (min) TA = T2 − T1 VREF (min) T1 T2 AMBIENT TEMPERATURE http://onsemi.com 3 NCP100 1.0 k 1.0 k Vin Vin VKA IK R1 VKA IK 10 k + + CL VREF 100 k VREF R2 Figure 3. General Test Circuit Figure 4. Test Circuit for Reference Input Voltage Change vs. Cathode Voltage 110 k 1.0 k R1 50 k IK Output + VKA + Input 100 k 22 F 100 k 0.1 F 0.01 F VKA = 0.9 V Figure 6. Test Circuit for Spectral Noise Density 2.0 IK = 250 A f v 1.0 kHz CL = 22 F Figure 3 CATHODE VOLTAGE CHANGE (%) REFERENCE INPUT VOLTAGE CHANGE (%) Figure 5. Test Circuit for Dynamic Impedance vs. Frequency 1.0 VKA = 1.0 V 0 VKA = 6.0 V −1.0 −50 −25 0 25 IK R1 CL + 22 F 50 75 100 1.0 VKA = 0.9 V VKA = 1.0 V 0 −1.0 VKA = 6.0 V VKA = 0.9 V VKA = 6.0 V −2.0 −50 125 IK = 250 A f v 1.0 kHz CL = 22 F Figure 3 TA, TEMPERATURE (C°) −25 0 25 50 75 100 TA, TEMPERATURE (C°) Figure 7. Reference Input Voltage Change vs. Ambient Temperature Figure 8. Cathode Voltage Change vs. Ambient Temperature http://onsemi.com 4 125 NCP100 200 VKA = 1.0 V CL = 3.3 F TA = 25°C Figure 3 15 IK, CATHODE CURRENT (A) IK, CATHODE CURRENT (mA) 20 10 5.0 0 −5.0 −10 −0.8 −0.6 −0.4 −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 VKA = 1.0 V CL = 3.3 F TA = 25°C Figure 3 150 100 50 0 −50 −100 −0.6 −0.4 VKA, CATHODE VOLTAGE (V) −0.2 0 0.6 0.8 1.0 1.2 10 6.0 |ZKA|, DYNAMIC IMPEDANCE () IK = 10 mA CL = 22 F TA = 25°C Figure 4 4.0 2.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 VKA = 1.0 V IK = 9.5 mA to 10.5 mA CL = 3.3 F TA = 25°C Figure 5 1.0 0.1 0.01 1.0 10 VKA, CATHODE VOLTAGE (V) 50 60 PHASE 0 10 −60 VKA = 1.0 V IK = 10 mA TA = 25°C 1.0k 10k 100k 10k 706 EXCESS PHASE (°) VREF, REFERENCE VOLTAGE (mV) 30 100 1.0k Figure 12. Dynamic Impedance vs. Frequency 120 GAIN −10 100 FREQUENCY (Hz) Figure 11. Reference Input Voltage Change vs. Cathode Voltage AV, VOLTAGE GAIN (dB) 0.4 Figure 10. Cathode Current vs. Cathode Voltage 8.0 −30 10 0.2 VKA, CATHODE VOLTAGE (V) Figure 9. Cathode Current vs. Cathode Voltage VREF, REFERENCE INPUT VOLTAGE CHANGE (mV) IK(min) −120 1.0 M TA = −40°C 700 = 25°C 694 f ≤ 1.0 kHz CL = 3.3 F Figure 3 = 70°C 688 = 85°C = 105°C 682 50 FREQUENCY (Hz) 100 150 200 250 300 IK, CATHODE CURRENT (A) Figure 13. Small−Signal Voltage Gain and Phase vs. Frequency Figure 14. Reference Voltage vs. Cathode Current for VKA = 0.9 V http://onsemi.com 5 NCP100 708 VREF, REFERENCE VOLTAGE (mV) VREF, REFERENCE VOLTAGE (mV) 698 TA = −40°C 697 = 25°C = 70°C = 85°C = 105°C f ≤1.0 kHz CL = 3.3 F Figure 3 696 50 100 150 200 250 300 = 105°C 704 700 = 70°C = 85°C = 25°C TA = −40°C 696 692 50 100 IK, CATHODE CURRENT (A) 150 200 250 300 IK, CATHODE CURRENT (A) Figure 15. Reference Voltage vs. Cathode Current for VKA = 1.0 V Figure 16. Reference Voltage vs. Cathode Current for VKA = 6.0 V 714 1000 = 85°C 710 = 70°C = 25°C 706 = −40°C 702 698 694 f ≤ 1.0 kHz Figure 3 CL = 22 F TA = −40°C 690 0 2.0 VKA = 1.0 V IK = 10 mA CL = 3.3 F TA = 25°C Figure 6 = 105°C NOISE VOLTAGE (nV/pHz) VREF, REFERENCE VOLTAGE (mV) f ≤ 1.0 kHz CL = 22 F Figure 3 4.0 800 600 400 200 0 10 6.0 100 VKA, CATHODE VOLTAGE (V) 1.0 k 10 k 100 k FREQUENCY (Hz) Figure 17. Reference Voltage vs. Cathode Current Figure 18. Spectral Noise Density IK = 10 mA CL = 3.3 F TA = 25°C 1.0 5.0 VKA (V) IK = 0.08 mA to 30 mA CESR ≤ 4.0 TA = −40°C to 85°C UNSTABLE OPERATION 4.0 0.5 3.0 STABLE OPERATION 2.0 0 VIN (V) VKA, CATHODE VOLTAGE (V) 6.0 1.0 NON−OPERATIONAL 2.0 0 0 1.0 10 100 0 CL, LOAD CAPACITANCE (F) 200 400 600 800 1000 1200 1400 1600 t, TURN−ON TIME (s) Figure 19. Stability Boundary Conditions Figure 20. Turn−On Time http://onsemi.com 6 NCP100 APPLICATIONS INFORMATION In Figure 21, the input resistor (Rin) is nominally set to 1.0 k For proper operation, once Vin, R1 and R2 are set, the resistance and power value of Rin can be determined by the following equation. The NCP100 is an adjustable shunt regulator similar to the industry standard 431−type regulators. Each device is laser trimmed at wafer probe to allow for tight reference accuracy and low reference voltage shift over the full operating temperature range of −40°C to +85°C (Figure 7). The nominal value for the reference is 0.698 V. This lower voltage allows the device to be used in low voltage applications where the traditional 1.25 V and 2.5 V references are not suitable. Rin Rin + 1 LOAD IK R1 Once these values are determined, it should be verified that the minimum and maximum values of IK are within the recommended range of 0.1 mA to 20 mA under the worst case conditions. For stability, the NCP100 requires an output capacitor between the cathode and anode. Figure 19 shows the capacitance boundary values required for stable operation across the −40°C to 85°C temperature range. The goal is to remain to the right of the curve for any programmed cathode voltages. For example, if the VKA is programmed to 1.0 V, then a load capacitor value of 3.0 F or greater would be selected. The load capacitor’s Equivalent Series Resistance, ESR, should be less than 4.0 . Both the capacitance and ESR values should be checked across the anticipated application temperature range to insure that the values meet the requirements stated above. VREF Figure 21. Typical Application Circuit The typical application circuit for this device is shown in Figure 21. The cathode voltage can be programmed between 0.9 V to 6.0 V to allow for proper operation by setting the R1/R2 resistor divider network values. The following equation can be used in calculating the cathode voltage (VKA). Note, if VKA is known then the ratio of R1 and R2 can be determined from this equation as well. ǒ Ǔ Pin + (Iin)2 Rin CL R2 2 The maximum current that will flow through Rin must be determined. This is the sum of the maximum values of cathode current, resistor divider network current, and load current. With Vin, set, the difference (Vin−VKA) is now constant. This value is divided by the maximum current calculated above to arrive at the value of Rin. Once the value of Rin is calculated, it’s minimum power rating is easily derived by: VKA Vin Vin * VKA VKA IK ) IL ) ǒR )R Ǔ VKA + VREF 1 ) R1 ) IREF R1 R2 The table below shows the required R1/R2 values using 1.0% resistors for commonly used voltages. VKA (V) R1 (k) R2 (k) 0.9 30 100 1.0 43.2 100 1.8 158 100 Vin ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ 3.3 374 100 5.0 619 100 6.0 750 100 Because the error amplifier is a CMOS design the value of IREF is extremely low allowing it to be neglected for most applications. The low IREF also allows for higher R1 and R2 values keeping current consumption very low. The NCP100 is especially well suited for lower voltage applications, particularly at VKA = 1.0 V. As is seen in Figures 7 and 8, this device exhibits excellent cathode and reference voltage flatness across the −40°C to +85°C temperature range. 1.0 k Vcomp Iin Rcomp R1 VKA IK + CL 100 k VREF Figure 22. Negative Dynamic Impedance Circuit One unique use for the NCP100 is that it can be configured for negative dynamic impedance as shown in Figure 22. This circuit is equivalent to Figure 21 with the addition of a small value resistor Rcomp in the cathode circuit. The regulated voltage output remains across the NCP100 cathode and anode leads. The voltage programming and stability requirements remain the same as in the typical application shown in Figure 21. http://onsemi.com 7 NCP100 The circuit performs the same as the one in Figure 21 with the exception of the effects of Rcomp. As IK increases, the voltage across Rcomp also increases by: Figure 23 shows this phenomenon for a program voltage of 1.0 V. The NCP100 intrinsic positive dynamic impedance response is the Rcomp = 0 curve. A 0 dynamic impedance regulator response is realized with Rcomp = 0.15 . Negative dynamic impedance responses are achieved with Rcomp u 0.15 Figure 24 shows the characteristic at a programmed VKA of 6.0 V. The 0 dynamic impedance value corresponds to Rcomp = 2.9 . Figure 25 shows the dynamic impedance versus cathode compensation resistance for programmed voltages of 1.0 V, 3.3 V and 6.0 V. It can be seen that any value up to the positive intrinsic dynamic impedance of the NCP100 can be realized. The other limit is that with a high enough negative dynamic impedance, the NCP100 V may drop below the minimum operating VKA voltage of 0.9 V, which can result in unpredictable performance. Vcomp + IKA Rcomp Vcomp effectively adjusts the NCP100 programmed VKA voltage slightly down since the R1/R2 voltage divider will try to hold the point it is connected to at the programmed voltage. The regulator VKA will now be lowered by the value of the Vcomp. This effect can compensate for the NCP100’s intrinsic positive impedance versus cathode current (IK) to allow for 0 or even a negative dynamic impedance. Rcomp= 3.1 20 = 1.5 IK, CATHODE CURRENT (mA) IK, CATHODE CURRENT (mA) 20 = 0.15 15 =0 10 5.0 Rcomp 0 0.15 1.5 3.1 |ZKA| 0.2 0 −1.4 −1.6 IK = 0.1 mA to 20 mA TA = 25° C Figure 22 0 0.94 0.95 0.96 0.97 0.98 0.99 1.00 = 4.4 = 1.5 15 =0 10 5.0 IK = 0.1 to 20 mA TA = 25° C Figure 22 5.96 VKA, CATHODE VOLTAGE (V) 5.98 |ZKA|, DYNAMIC IMPEDANCE () IK = 1.0 mA to 20 mA f ≤1.0 kHz Figure 22 TA = 25° C 2.0 = 6.0 V 1.0 = 3.3 V −1.0 VKA= 1.0 V −2.0 1.0 6.02 6.04 6.06 Figure 24. Cathode Current vs. Cathode Voltage for Programmed VKA = 6.0 V 3.0 −3.0 0 6.00 |ZKA| 2.9 1.4 0 −1.6 −2.9 VKA, CATHODE VOLTAGE (V) Figure 23. Cathode Current vs. Cathode Voltage for Programmed VKA = 1.0 V 0 Rcomp 0 1.5 2.9 4.4 5.8 Rcomp= 5.8 0 5.94 1.01 = 2.9 2.0 3.0 4.0 5.0 Rcomp, CATHODE COMPENSATION RESISTANCE () Figure 25. Dynamic Impedance vs. Cathode Compensation Resistance http://onsemi.com 8 NCP100 Vin Rin Vin Vout Vout R1 R1 R2 V out + R2 ǒ1 ) R1 ǓV R2 REF V out + V out min + 0.9 V ) V be ǒ1 ) R1 ǓV R2 REF V out min + V REF Figure 27. Low Dropout Series Pass Regulator + Figure 26. High Current Shunt Regulator 1/2 Opto AC Line Input R1 Isolated DC Output NCP 100 − + − + 1/2 Opto R2 − UC3842 Minimum Vout = (0.9 + 1.4) = 2.3 V + S Q R − + − + Figure 28. Offline Converter with Isolated DC Output The circuit in Figure 28 uses the NCP100 as a compensated amplifier for controlling the feedback loop of an isolated output line powered converter. This device allows the converter to directly regulate the output voltage at a significantly lower level than obtainable with the common TL431 device family. The output voltage is programmed by the resistors R1 and R2. The minimum regulated DC output is limited to the sum of the lowest allowable cathode to anode voltage (0.9 V) and the forward drop of the optocoupler light emitting diode (1.4 V). http://onsemi.com 9 NCP100 TO−92 EIA RADIAL TAPE ON REEL H2A H2A H2B H2B H W2 H4 H5 T1 L1 H1 W1 W L F1 T2 F2 P2 D P2 P1 T P Figure 29. Device Positioning on Tape Specification Inches Symbol Item Millimeter Min Max Min Max 0.1496 0.1653 3.8 4.2 D Tape Feedhole Diameter D2 Component Lead Thickness Dimension 0.015 0.020 0.38 0.51 Component Lead Pitch 0.0945 0.110 2.4 2.8 F1, F2 H Bottom of Component to Seating Plane H1 Feedhole Location .059 .156 1.5 4.0 0.3346 0.3741 8.5 9.5 1.0 H2A Deflection Left or Right 0 0.039 0 H2B Deflection Front or Rear 0 0.051 0 1.0 0.7086 0.768 18 19.5 H4 Feedhole to Bottom of Component H5 Feedhole to Seating Plane 0.610 0.649 15.5 16.5 L Defective Unit Clipped Dimension 0.3346 0.433 8.5 11 L1 Lead Wire Enclosure 0.09842 — 2.5 — P Feedhole Pitch 0.4921 0.5079 12.5 12.9 P1 Feedhole Center to Center Lead 0.2342 0.2658 5.95 6.75 First Lead Spacing Dimension 0.1397 0.1556 3.55 3.95 0.06 0.08 0.15 0.20 — 0.0567 — 1.44 P2 T Adhesive Tape Thickness T1 Overall Taped Package Thickness T2 Carrier Strip Thickness 0.014 0.027 0.35 0.65 W Carrier Strip Width 0.6889 0.7481 17.5 19 W1 Adhesive Tape Width 0.2165 0.2841 5.5 6.3 W2 Adhesive Tape Position .0059 0.01968 .15 0.5 NOTES: 1. Maximum alignment deviation between leads not to be greater than 0.2 mm. 2. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm. 3. Component lead to tape adhesion must meet the pull test requirements. 4. Maximum non−cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 5. Hold down tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 6. No more than 1 consecutive missing component is permitted. 7. A tape trailer and leader, having at least three feed holes is required before the first and after the last component. 8. Splices will not interfere with the sprocket feed holes. http://onsemi.com 10 NCP100 PACKAGE DIMENSIONS TO−92 (TO−226) CASE 29−11 ISSUE AL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. B R P L SEATING PLANE K D X X G J H V C SECTION X−X 1 N N http://onsemi.com 11 DIM A B C D G H J K L N P R V INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 −−− 0.250 −−− 0.080 0.105 −−− 0.100 0.115 −−− 0.135 −−− MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 −−− 6.35 −−− 2.04 2.66 −−− 2.54 2.93 −−− 3.43 −−− NCP100 PACKAGE DIMENSIONS TSOP−5 SN SUFFIX PLASTIC PACKAGE CASE 483−02 ISSUE C D S 5 4 1 2 3 B L MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181 G A J C 0.05 (0.002) H M K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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