PI74FCT16952T/162952/162H952T PI74FCT16952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT162952T PI74FCT162H952T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 16-Bit Registered Transceivers Product Features: Common Features: • PI74FCT16952T, PI74FCT162952T, and PI74FCT2H952T are high-speed, low power devices with high current drive • VCC = 5V ±10% • Hysteresis on all inputs • Packages available: – 56-pin 240 mil wide plastic TSSOP (A) – 56-pin 300 mil wide plastic SSOP (V) PI74FCT16952T Features: • High output drive: IOH = –32 mA; IOL = 64 mA • Power off disable outputs permit “live insertion” • Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C PI74FCT162952T Features: • Balanced output drivers: ±24 mA • Reduced system switching noise • Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V, TA = 25°C PI74FCT162H952T Features: • Bus Hold retains last active bus state during 3-state • Eliminates the need for external pull-up resistors Product Description: Pericom Semiconductor’s PI74FCT series of logic circuits are produced in the Company’s advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74FCT16952T, PI74FCT162952T, and PI74FCT162H952T are 16-bit registered transceivers organized with two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (xCEAB) input must be LOW in order to enter data from xAx. The data present on the A port will be clocked on the B register when xCLKAB toggles from LOW-to-HIGH. The xOEAB control performs the output enable function on the B port. Control of data from B to A is similar, but uses the xCEBA, xCLKBA, and xOEBA inputs. By connecting the control pins of the two independent transceivers together, a full 16-bit operation can be achieved. The output buffers are designed with a Power-Off disable allowing “live insertion” of boards when used as backplane drivers. The PI74FCT16952T output buffers are designed with a PowerOff disable function allowing “live insertion” of boards when used as backplane drivers. The PI74FCT162952T has ±24 mA balanced output drivers. It is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. This eliminates the need for external terminating resistors for most interface applications. The PI74FCT162H952T has “Bus Hold” which retains the input’s last state whenever the input goes to high-impedance preventing “floating” inputs and eliminating the need for pull-up/down resistors. Logic Block Diagram 1OEBA 2OEBA 1CEBA 2CEBA 1CLKBA 2CLKBA 1OEAB 2OEAB 1CEAB 2CEAB 1CLKAB 2CLKAB C C 1A0 2A0 D 1B0 D C 2B0 C D D TO 7 OTHER CHANNELS TO 7 OTHER CHANNELS 1 PS2042A 03/11/96 PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Product Pin Configuration Product Pin Description 1OEAB 1 56 1OEBA 1CLKAB 55 54 53 52 1CLKBA GND 1A0 2 3 4 5 1A1 VCC 1A2 6 7 8 51 50 49 1B1 9 48 10 47 11 56-PIN 46 12 V56 45 13 A56 44 1B3 43 42 1B7 2A0 14 15 2A1 16 41 2B1 2A2 17 18 19 20 40 39 38 37 2B2 21 22 23 36 35 34 2B5 33 32 31 30 2B7 GND 2CEAB 2CLKAB 24 25 26 27 2OEAB 28 29 2OEBA 1CEAB 1A3 1A4 GND 1A5 1A6 1A7 GND 2A3 2A4 2A5 VCC 2A6 2A7 Pin Name xOEAB xOEBA xCEAB xCEBA xCLKAB xCLKBA xAx Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Clock Enable Input (Active LOW) B-to-A Clock Enable Input (Active LOW) A-to-B Clock Input B-to-A clock Input A-to-B Data Inputs or B-to-A 3-State Outputs (1) xBx B-to-A Data Inputs or B-to-A 3-State Outputs (1) GND Ground VCC Power Note: 1. For the PI74FCT162H952T, these pins have “Bus Hold”. All other pins are standard, outputs, or I/Os. 1CEBA GND 1B0 VCC 1B2 1B4 GND 1B5 1B6 2B0 GND 2B3 2B4 Truth Table(1,2) VCC Inputs Outputs 2B6 GND 2CEBA 2CLKBA xCEAB xCLKAB xOEAB xAx xBx H X L L X X L ↑ ↑ X L L L L H X X L H X B(3) B(3) L H High Z 1. H = High Voltage Level L = Low Voltage Level X = Don’t Care or Irrelevant ↑ = LOW-to-HIGH Transition Z = High Impedance 2. A-to-B data flow shown, B-to-A flow control is the same, except using xCEBA, xCLKBA, and xOEBA. 3. Level of B before the indicated steady-state input conditions were established. 2 PS2042A 03/11/96 PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................. –55°C to +125°C Ambient Temperature with Power Applied ................................ –40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V DC Input Voltage ......................................................................... –0.5V to +7.0V DC Output Current ................................................................................... 120 mA Power Dissipation ......................................................................................... 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%) Parameters Description VIH VIL IIH IIH IIH IIH IIL IIL IIL IIL IBHH IBHL IOZH(5) IOZL(5) VIK IOS IO VH Input HIGH Voltage Input LOW Voltage Input HIGH Current Input HIGH Current Input HIGH Current Input HIGH Current Input LOW Current Input LOW Current Input LOW Current Input LOW Current Bus Hold Sustain Current High-Impedance Output Current (3-STATE OUTPUTS) Clamp Diode Voltage Short Circuit Current Output Drive Current Input Hysteresis Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Standard Input, VCC = Max. Standard I/O, VCC = Max. Bus Hold Input(4), VCC = Max. Bus Hold I/O(4), VCC = Max. Standard Input, VCC = Min. Standard I/O, VCC = Min. Bus Hold Input(4), VCC = Min. Bus Hold I/O(4), VCC = Min. Bus Hold Input(4), VCC = Min. VCC = Max. VCC = Max. VCC = Min., IIN = –18 mA VCC = Max.(3), VOUT = GND VCC = Max.(3), VOUT = 2.5V Min. Typ(2) Max. Units 0.8 1 1 ±100 ±100 –1 –1 ±100 ±100 V V µA µA µA µA µA µA µA µA µA 1 –1 µA µA –1.2 –200 –180 V mA mA mV 2.0 VIN = VCC VIN = VCC VIN = VCC VIN = VCC VIN = GND VIN = GND VIN = GND VIN = GND VIN = 2.0V VIN = 0.8V VOUT = 2.7V VOUT = 0.5V –50 +50 –80 –50 –0.7 –140 100 Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Pins with Bus Hold are identified in the pin description. 5. This specification does not apply to bi-directional functionalities with Bus Hold. 3 PS2042A 03/11/96 PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT16952T Output Drive Characteristics (Over the Operating Range) Test Conditions(1) Parameters Description VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL VOL IOFF Output LOW Voltage Power Down Disable VCC = Min., VIN = VIH or VIL VCC = 0V, VIN or VOUT ≤ 4.5V IOH = –3.0 mA IOH = –15.0 mA IOH = –32.0 mA IOL = 64 mA Min. Typ(2) 2.5 2.4 2.0 3.5 3.5 3.0 0.2 — 0.55 ±100 V µA Min. Typ(2) Max. Units 2.4 3.3 0.3 115 –115 0.55 150 –150 V V mA mA — Max. Units V PI74FCT162952T/162H952T Output Drive Characteristics (Over the Operating Range) Test Conditions(1) Parameters Description VOH VOL IODL IODH Output HIGH Voltage Output LOW Voltage Output LOW Current Output HIGH Current VCC = Min., VIN = VIH or VIL IOH = –24.0 mA VCC = Min., VIN = VIH or VIL IOL = 24 mA VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) 60 –60 Capacitance (TA = 25°C, f = 1 MHz) Parameters(4) CIN COUT Description Test Conditions Typ Max. Units Input Capacitance Output Capacitance VIN = 0V VOUT = 0V 4.5 5.5 6 8 pF pF Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested. 4 PS2042A 03/11/96 PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Power Supply Characteristics Test Conditions(1) Parameters Description Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 500 µA ∆ICC Supply Current per Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) 0.5 1.5 mA ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open xOEAB or xOEBA = GND One Input Toggling 50% Duty Cycle VIN = VCC VIN = GND 75 120 µA/ MHz IC Total Power Supply Current(6) VCC = Max., Outputs Open fCP = 10 MHZ (XCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEAB = VCC One Bit Toggling fI = 5 MHz VCC = Max., Outputs Open fCP = 10 MHZ (XCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEAB = VCC 16 Bits Toggling fI = 2.5 MHZ 50% Duty Cycle VIN = VCC VIN = GND 0.8 1.7(5) mA VIN = 3.4V VIN = GND 1.3 3.2(5) VIN = VCC VIN = GND 3.8 6.5(5) VIN = 3.4 VIN = GND 8.3 20.5(5) Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. 5 PS2042A 03/11/96 PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT16952T Switching Characteristics over Operating Range 16952AT 16952BT Com. Parameters Description tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tSU tH tW TSK(O) Propagation Delay XCLKAB, XCLKBA TO XBX, XAX (1) 16952CT 16952DT 16952ET Com. Com. Com. Com. Conditions Min Max Min Max Min Max Min Max Min Max Unit CL = 50 pF RL = 500Ω 2.0 10.0 2.0 7.5 2.0 6.3 2.0 4.4 1.5 3.7 ns 1.5 10.5 1.5 8.0 1.5 7.0 1.5 4.8 1.5 4.4 ns 1.5 10.0 1.5 7.5 1.5 6.5 1.5 4.0 1.5 4.0 ns 2.5 — 2.5 — 2.5 — 2.0 — 1.5 — ns 2.0 — 2.0 — 1.5 — 1.0 — 0.0 — ns 3.0 — 3.0 — 3.0 — 2.0 — 2.0 — ns 2.0 — 2.0 — 2.0 — 1.5 — 0.0 — ns 3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns Output Enable Time XOEBA, XOEAB to XAX, XBX Output Disable Time(3) XOEBA, XOEAB to XAX, XBX Setup Time HIGH or LOW XAX, XBX TO XCLKAB, XCLKBA Hold Time HIGH or LOW XAX, XBX TO XCLKAB, XCLKBA Setup Time HIGH or LOW XCEAB, xCEBA to to xCLKAB, xCLKBA Hold Time HIGH or LOW XCEAB, xCEBA to to xCLKAB, xCLKBA Pulse Width HIGH(3) or LOW, xCLKAB or xCLKBA OUTPUT SKEW (4) PI74FCT162952T Switching Characteristics over Operating Range 16952AT 16952BT Com. Parameters Description tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tSU tH tW TSK(O) Propagation Delay XCLKAB, XCLKBA TO XBX, XAX Output Enable Time XOEBA, XOEAB to XAX, XBX Output Disable Time(3) XOEBA, XOEAB to XAX, XBX Setup Time HIGH or LOW XAX, XBX TO XCLKAB, XCLKBA Hold Time HIGH or LOW XAX, XBX TO XCLKAB, XCLKBA Setup Time HIGH or LOW XCEAB, xCEBA to to xCLKAB, xCLKBA Hold Time HIGH or LOW XCEAB, xCEBA to to xCLKAB, xCLKBA Pulse Width HIGH(3) or LOW, xCLKAB or xCLKBA OUTPUT SKEW (4) (1) 16952CT 16952DT 16952ET Com. Com. Com. Com. Conditions Min Max Min Max Min Max Min Max Min Max Unit CL = 50 pF RL = 500Ω 2.0 10.0 2.0 7.5 2.0 6.3 2.0 4.4 1.5 3.7 ns 1.5 10.5 1.5 8.0 1.5 7.0 1.5 4.8 1.5 4.4 ns 1.5 10.0 1.5 7.5 1.5 6.5 1.5 4.0 1.5 4.0 ns 2.5 — 2.5 — 2.5 — 2.0 — 1.5 — ns 2.0 — 2.0 — 1.5 — 1.0 — 0.0 — ns 3.0 — 3.0 — 3.0 — 2.0 — 2.0 — ns 2.0 — 2.0 — 2.0 — 1.5 — 0.0 — ns 3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 6 PS2042A 03/11/96 PI74FCT16952T/162952/162H952T 16-BIT REGISTERED TRANSCEIVERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74FCT162H952T Switching Characteristics over Operating Range 16952AT 16952BT Com. Parameters Description tPLH tPHL tPZH tPZL tPHZ tPLZ tSU Propagation Delay XCLKAB, XCLKBA TO XBX, XAX tH tSU tH tW TSK(O) Output Enable Time XOEBA, XOEAB to XAX, XBX Output Disable Time(3) XOEBA, XOEAB to XAX, XBX Setup Time HIGH or LOW XAX, XBX TO XCLKAB, XCLKBA Hold Time HIGH or LOW XAX, XBX TO XCLKAB, XCLKBA Setup Time HIGH or LOW XCEAB, xCEBA to to xCLKAB, xCLKBA Hold Time HIGH or LOW XCEAB, xCEBA to to xCLKAB, xCLKBA Pulse Width HIGH(3) or LOW, xCLKAB or xCLKBA OUTPUT SKEW (4) 16952CT Com. 16952DT Com. 16952ET Com. Com. Conditions(1) Min Max Min Max Min Max Min Max Min Max Unit CL = 50 pF RL = 500Ω 2.0 10.0 2.0 7.5 2.0 6.3 2.0 4.4 1.5 3.7 ns 1.5 10.5 1.5 8.0 1.5 7.0 1.5 4.8 1.5 4.4 ns 1.5 10.0 1.5 7.5 1.5 6.5 1.5 4.0 1.5 4.0 ns 2.5 — 2.5 — 2.5 — 2.0 — 1.5 — ns 2.0 — 2.0 — 1.5 — 1.0 — 0.0 — ns 3.0 — 3.0 — 3.0 — 2.0 — 2.0 — ns 2.0 — 2.0 — 2.0 — 1.5 — 0.0 — ns 3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns — 0.5 — 0.5 — 0.5 — 0.5 — 0.5 ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 7 PS2042A 03/11/96