PLL PLL620

PLL620-38/39
PECL and LVDS Low Phase Noise XO (32.5 to 130MHz output)
PIN CONFIGURATION
FEATURES
•
•
•
•
•
•
65MHz to 130MHz Crystal input.
Output range: 32.5MHz – 130MHz (no PLL).
Low Injection Power for crystal, 50uW.
PECL (PLL620-38) or LVDS output (PLL620-39).
Supports 2.5V or 3.3V-Power Supply.
Available in 16-Pin TSSOP.
DESCRIPTION
The PLL620-38/-39 is a family of XO IC’s specifically
designed to work with high frequency fundamental or
3 rd OT crystals from 65MHz to 130MHz, with
selectable PECL or LVDS outputs. They achieve
very low current into the crystal resulting in better
overall stability. Their very low jitter makes them
ideal for the most demanding timing requirements.
!
Note: ^ designates internal pull-up resistor.
BLOCK DIAGRAM
OE
Q
XIN
XOUT
Q
Oscillator
Amplifier
S2
PLL620-38/-39
OUTPUT ENABLE LOGICAL LEVELS
Part #
OE
PLL620-38
PLL620-39
0
(Default)
1
0
1
(Default)
State
Output enabled
Tri-state
Tri-state
Output enabled
OE input: Logical states defined by PECL levels for PLL620-38
Logical states defined by CMOS levels for PLL620-39
OUTPUT FREQUENCY SELECTOR
S2
Output
0
Input/2
1(Default)*
Input
*Internally set to ‘Default’ through 60K
pull-up resistor
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/15/05 Page 1
PLL620-38/-39
PECL and LVDS Low Phase Noise XO (for 32.5-130MHz Output)
PIN DESCRIPTIONS
Name
Number
Type
Description
XIN
XOUT
2
3
I
I
S2
5
I
OE_CTRL
GND
CLKT
6
8, 14
11
I
P
O
Crystal input. See Crystal Specifications on page 2.
Crystal output. See Crystal Specifications on page 2.
When pulled low the output is equal to the input divided by 2. Internal
pull up.
Output enable. See Output Enable Logic table on page 1.
Ground.
True output PECL (PLL620-38) or LVDS (PLL620-39).
CLKC
DNC
VDD
13
4,7,10,15,16
1, 12
O
P
Complementary output PECL (PLL620-38) or LVDS (PLL620-39).
Do Not connect.
Power supply.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
Supply Voltage
Input Voltage, dc
V DD
VI
Output Voltage, dc
Storage Temperature
Ambient Operating Temperature*
Junction Temperature
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
VO
TS
TA
TJ
MIN.
MAX.
UNITS
-0.5
4.6
V DD +0.5
V
V
V DD +0.5
150
85
125
260
2
V
-0.5
-65
-40
°C
°C
°C
°C
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS
Crystal Loading Rating
Inter-electrode capacitance
Crystal Resonator Frequency
SYMBOL
CONDITIONS
C L (xtal)
65MHz to 130MHz
(VDD=3.3V)
C0
F XIN
Fund.
MIN.
TYP.
MAX.
8.5
pF
2.6
65
UNITS
130
MHz
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/15/05 Page 2
PLL620-38/-39
PECL and LVDS Low Phase Noise XO (for 32.5-130MHz Output)
3. General Electrical Specifications
PARAMETERS
SYMBOL
Supply Current (Loaded
Outputs)
Operating Voltage
I DD
CONDITIONS
MIN.
PECL/LVDS
V DD
2.97
45
45
@ 1.25V (LVDS)
@ V DD – 1.3V (PECL)
Output Clock Duty Cycle
TYP.
50
50
±50
Short Circuit Current
MAX.
UNITS
100/80
mA
3.63
55
55
V
%
mA
4. Jitter Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Period jitter RMS
77.76MHz
2.5
ps
Period jitter peak-to-peak
Integrated jitter RMS
77.76MHz
Integrated 12kHz to 20MHz at 77.76MHz
18.5
0.5
ps
ps
5. Phase Noise Specifications
PARAMETERS
Phase Noise relative
to carrier
FREQUENCY
@10Hz
@100Hz
@1kHz
@10kHz
@100kHz
UNITS
77.76MHz
-75
-95
-125
-145
-155
dBc/Hz
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/15/05 Page 3
PLL620-38/-39
PECL and LVDS Low Phase Noise XO (for 32.5-130MHz Output)
6. LVDS Electrical Characteristics
PARAMETERS
SYMBOL
Output Differential Voltage
V DD Magnitude Change
CONDITIONS
V OD
∆V OD
V OH
V OL
V OS
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
R L = 100 Ω
(see figure)
I OXD
Output Short Circuit Current
I OSD
TYP.
MAX.
UNITS
247
-50
355
454
50
mV
mV
1.4
1.1
1.2
3
1.6
1.375
25
V
V
V
mV
±1
±10
uA
-5.7
-8
mA
0.9
1.125
0
∆V OS
Power-off Leakage
MIN.
V out = V DD or GND
V DD = 0V
7. LVDS Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Differential Clock Rise Time
tr
0.2
0.7
1.0
ns
Differential Clock Fall Time
tf
R L = 100 Ω
C L = 10 pF
(see figure)
0.2
0.7
1.0
ns
LVDS Levels Test Circuit
LVDS Switching Test Circuit
OUT
OUT
CL = 10pF
50Ω
VOD
VOS
VDIFF
50Ω
RL = 100Ω
CL = 10pF
OUT
OUT
LVDS Transistion Time Waveform
OUT
0V (Differential)
OUT
80%
VDIFF
80%
0V
20%
20%
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/15/05 Page 4
PLL620-38/-39
PECL and LVDS Low Phase Noise XO (for 32.5-130MHz Output)
8. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
V OH
V OL
R L = 50 Ω to (V DD – 2V)
(see figure)
V DD – 1.025
Output High Voltage
Output Low Voltage
MAX.
UNITS
V DD – 1.620
V
V
9. PECL Switching Characteristics
PARAMETERS
SYMBOL
Clock Rise Time
Clock Fall Time
tr
tf
CONDITIONS
MIN.
@20/80% - PECL
@80/20% - PECL
PECL Levels Test Circuit
OUT
MAX.
UNITS
0.6
0.5
1.5
1.5
ns
ns
PECL Output Skew
VDD
50Ω
TYP.
OUT
2.0V
50%
50Ω
OUT
tSKEW
OUT
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
tR
tF
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/15/05 Page 5
PLL620-38/-39
PECL and LVDS Low Phase Noise XO (for 32.5-130MHz Output)
PACKAGE INFORMATION
16 PIN TSSO P ( m m )
Sym bol
A
A1
B
C
D
E
H
L
e
M in.
M ax.
1.20
0.05
0.15
0.19
0.30
0.09
0.20
4.90
5.10
4.30
4.50
6.40 B SC
0.45
0.75
0.65 B SC
E
H
D
A
A1
C
L
B
e
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
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Part / Order Number
PLL620-3XOC
PLL620-3XOC-R
PLL620-3XOCL
PLL620-3XOCL-R
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Marking
P620-3XDC
P620-3XSC
P620-3XSCL
P620-3XSCL
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Package Option
TSSOP
TSSOP
TSSOP
TSSOP
- Tube
(Tape and Reel)
– Tube (GREEN)
(Tape and Reel) (GREEN)
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/15/05 Page 6